| /OK3568_Linux_fs/u-boot/drivers/pinctrl/rockchip/ |
| H A D | pinctrl-rk3308.c | 1 // SPDX-License-Identifier: GPL-2.0+
13 #include "pinctrl-rockchip.h"
22 .route_val = BIT(16 + 0) | BIT(0),
29 .route_val = BIT(16 + 2) | BIT(16 + 3),
36 .route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
43 .route_val = BIT(16 + 4),
50 .route_val = BIT(16 + 4) | BIT(4),
52 /* i2s-8ch-1-sclktxm0 */
57 .route_val = BIT(16 + 3),
59 /* i2s-8ch-1-sclkrxm0 */
[all …]
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| H A D | pinctrl-rk3328.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 #include "pinctrl-rockchip.h"
19 .bit = 8,
25 .bit = 0,
31 .bit = 14,
43 .route_val = BIT(16) | BIT(16 + 1),
50 .route_val = BIT(16) | BIT(16 + 1) | BIT(0),
52 /* gmac-m1_rxd0 */
57 .route_val = BIT(16 + 2) | BIT(2),
59 /* gmac-m1-optimized_rxd3 */
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| H A D | pinctrl-rk322x.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 #include "pinctrl-rockchip.h"
16 /* pwm0-0 */
21 .route_val = BIT(16),
23 /* pwm0-1 */
28 .route_val = BIT(16) | BIT(0),
30 /* pwm1-0 */
35 .route_val = BIT(16 + 1),
37 /* pwm1-1 */
42 .route_val = BIT(16 + 1) | BIT(1),
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| /OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/ |
| H A D | nand_ids.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNRGAMA 64G 3.3V 8-bit",
50 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
54 {"TH58NVG2S3HBAI4 4G 3.3V 8-bit",
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| /OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/ |
| H A D | nand_ids.c | 28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
46 {"TC58NVG2S0F 4G 3.3V 8-bit",
49 {"TC58NVG2S0H 4G 3.3V 8-bit",
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| /OK3568_Linux_fs/kernel/drivers/media/platform/omap3isp/ |
| H A D | ispreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * TI OMAP3 ISP - Registers definitions
48 #define ISPCCP2_SYSCONFIG_SOFT_RESET BIT(1)
58 #define ISPCCP2_SYSSTATUS_RESET_DONE BIT(0)
61 #define ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ BIT(11)
62 #define ISPCCP2_LC01_IRQSTATUS_LC0_LE_IRQ BIT(10)
63 #define ISPCCP2_LC01_IRQSTATUS_LC0_LS_IRQ BIT(9)
64 #define ISPCCP2_LC01_IRQSTATUS_LC0_FE_IRQ BIT(8)
65 #define ISPCCP2_LC01_IRQSTATUS_LC0_COUNT_IRQ BIT(7)
66 #define ISPCCP2_LC01_IRQSTATUS_LC0_FIFO_OVF_IRQ BIT(5)
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| /OK3568_Linux_fs/kernel/drivers/staging/sm750fb/ |
| H A D | ddk750_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 #define DE_STATE1_DE_ABORT BIT(0)
10 #define DE_STATE2_DE_FIFO_EMPTY BIT(3)
11 #define DE_STATE2_DE_STATUS_BUSY BIT(2)
12 #define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
20 #define SYSTEM_CTRL_PCI_BURST BIT(29)
21 #define SYSTEM_CTRL_PCI_MASTER BIT(25)
22 #define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
23 #define SYSTEM_CTRL_DE_FIFO_EMPTY BIT(23)
24 #define SYSTEM_CTRL_DE_STATUS_BUSY BIT(22)
[all …]
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| H A D | sm750_accel.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
25 #define DE_SOURCE_WRAP BIT(31)
26 #define DE_SOURCE_X_K1_SHIFT 16
27 #define DE_SOURCE_X_K1_MASK (0x3fff << 16)
28 #define DE_SOURCE_X_K1_MONO_MASK (0x1f << 16)
32 #define DE_DESTINATION_WRAP BIT(31)
33 #define DE_DESTINATION_X_SHIFT 16
34 #define DE_DESTINATION_X_MASK (0x1fff << 16)
38 #define DE_DIMENSION_X_SHIFT 16
39 #define DE_DIMENSION_X_MASK (0x1fff << 16)
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/fw_ax/inc_hdr/ |
| H A D | fwcmd_intf.h | 36 //H2CPKT - CAT(TEST)
48 // CLASS 0 - CMD_PATH
51 // CLASS 1 - SND_Test
53 // CLASS 2 - PLATFORM_AUTO_TEST
70 // CLASS 3 - MAC_TEST
73 // CLASS 4 - FW_AUTO_TEST
77 // CLASS 5 - FW_STATUS_TEST
81 //H2CPKT - CAT(MAC)
107 // CLASS 0 - FW_INFO
114 // CLASS 1 - WOW
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/fw_ax/inc_hdr/ |
| H A D | fwcmd_intf.h | 36 //H2CPKT - CAT(TEST)
48 // CLASS 0 - CMD_PATH
51 // CLASS 1 - SND_Test
53 // CLASS 2 - PLATFORM_AUTO_TEST
70 // CLASS 3 - MAC_TEST
73 // CLASS 4 - FW_AUTO_TEST
77 // CLASS 5 - FW_STATUS_TEST
81 //H2CPKT - CAT(MAC)
107 // CLASS 0 - FW_INFO
114 // CLASS 1 - WOW
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/mediatek/ |
| H A D | mtk_dpi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #define EN BIT(0)
13 #define RST BIT(0)
16 #define INT_VSYNC_EN BIT(0)
17 #define INT_VDE_EN BIT(1)
18 #define INT_UNDERFLOW_EN BIT(2)
21 #define INT_VSYNC_STA BIT(0)
22 #define INT_VDE_STA BIT(1)
23 #define INT_UNDERFLOW_STA BIT(2)
26 #define BG_ENABLE BIT(0)
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| /OK3568_Linux_fs/kernel/include/soc/mscc/ |
| H A D | ocelot_dev.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
11 #define DEV_CLOCK_CFG_MAC_TX_RST BIT(7)
12 #define DEV_CLOCK_CFG_MAC_RX_RST BIT(6)
13 #define DEV_CLOCK_CFG_PCS_TX_RST BIT(5)
14 #define DEV_CLOCK_CFG_PCS_RX_RST BIT(4)
15 #define DEV_CLOCK_CFG_PORT_RST BIT(3)
16 #define DEV_CLOCK_CFG_PHY_RST BIT(2)
20 #define DEV_PORT_MISC_FWD_ERROR_ENA BIT(4)
21 #define DEV_PORT_MISC_FWD_PAUSE_ENA BIT(3)
22 #define DEV_PORT_MISC_FWD_CTRL_ENA BIT(2)
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/marvell/ |
| H A D | skge.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
131 /* B0_CTST 16 bit Control/Status register */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
138 CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */
142 CS_STOP_MAST = 1<<4, /* Command Bit to stop the master */
148 /* B0_LED 8 Bit LED register */
149 /* Bit 7.. 2: reserved */
153 /* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/media/platform/vsp1/ |
| H A D | vsp1_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * vsp1_regs.h -- R-Car VSP1 Registers Definitions
13 /* -----------------------------------------------------------------------------
18 #define VI6_CMD_UPDHDR BIT(4)
19 #define VI6_CMD_STRCMD BIT(0)
28 #define VI6_SRESET_SRTS(n) BIT(n)
31 #define VI6_STATUS_FLD_STD(n) BIT((n) + 28)
32 #define VI6_STATUS_SYS_ACT(n) BIT((n) + 8)
35 #define VI6_WFP_IRQ_ENB_DFEE BIT(1)
36 #define VI6_WFP_IRQ_ENB_FREE BIT(0)
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwxgmac2.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
28 #define XGMAC_CONFIG_JD BIT(16)
29 #define XGMAC_CONFIG_TE BIT(0)
32 #define XGMAC_CONFIG_ARPEN BIT(31)
33 #define XGMAC_CONFIG_GPSL GENMASK(29, 16)
34 #define XGMAC_CONFIG_GPSL_SHIFT 16
38 #define XGMAC_CONFIG_S2KP BIT(11)
39 #define XGMAC_CONFIG_LM BIT(10)
40 #define XGMAC_CONFIG_IPC BIT(9)
41 #define XGMAC_CONFIG_JE BIT(8)
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/vc4/ |
| H A D | vc4_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2014-2015 Broadcom
27 ('D' << 16))
33 # define V3D_IDENT1_NSEM_MASK VC4_MASK(23, 16)
34 # define V3D_IDENT1_NSEM_SHIFT 16
47 # define V3D_L2CACTL_L2CCLR BIT(2)
48 # define V3D_L2CACTL_L2CDIS BIT(1)
49 # define V3D_L2CACTL_L2CENA BIT(0)
54 # define V3D_SLCACTL_T0CC_MASK VC4_MASK(19, 16)
55 # define V3D_SLCACTL_T0CC_SHIFT 16
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/ |
| H A D | rockchip-mipi-csi-tx.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #define DRIVER_NAME "rockchip-mipi-csi"
12 #define m_CONFIG_DONE BIT(0)
13 #define m_CONFIG_DONE_IMD BIT(4)
14 #define m_CONFIG_DONE_MODE BIT(8)
24 #define m_CSITX_EN BIT(0)
25 #define m_CPHY_EN BIT(1)
26 #define m_DPHY_EN BIT(2)
28 #define m_IDI_48BIT_EN BIT(9)
37 #define m_SOFT_RESET BIT(0)
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| /OK3568_Linux_fs/u-boot/drivers/pinctrl/ |
| H A D | pinctrl-rockchip.c | 4 * SPDX-License-Identifier: GPL-2.0+
15 #include <dt-bindings/pinctrl/rockchip.h>
37 (GENMASK(((h) + 16), ((l) + 16)) | (((v) << (l)) & GENMASK((h), (l))))
42 #define IOMUX_GPIO_ONLY BIT(0)
43 #define IOMUX_WIDTH_4BIT BIT(1)
44 #define IOMUX_SOURCE_PMU BIT(2)
45 #define IOMUX_UNROUTED BIT(3)
46 #define IOMUX_WIDTH_3BIT BIT(4)
47 #define IOMUX_8WIDTH_2BIT BIT(5)
48 #define IOMUX_WRITABLE_32BIT BIT(6)
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7603/ |
| H A D | regs.h | 1 /* SPDX-License-Identifier: ISC */
28 #define MT_INT_RX_DONE(_n) BIT(_n)
31 #define MT_INT_TX_DONE(_n) BIT((_n) + 4)
33 #define MT_INT_RX_COHERENT BIT(20)
34 #define MT_INT_TX_COHERENT BIT(21)
35 #define MT_INT_MAC_IRQ3 BIT(27)
37 #define MT_INT_MCU_CMD BIT(30)
40 #define MT_WPDMA_GLO_CFG_TX_DMA_EN BIT(0)
41 #define MT_WPDMA_GLO_CFG_TX_DMA_BUSY BIT(1)
42 #define MT_WPDMA_GLO_CFG_RX_DMA_EN BIT(2)
[all …]
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| /OK3568_Linux_fs/u-boot/drivers/serial/ |
| H A D | serial_sh.h | 2 * Copy and modify from linux/drivers/serial/sh-sci.h
26 # define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */
27 # define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */
38 * SCIF2 (0xA4410000) -> External clock, SCK pin used as clock input
39 * SCIF0 (0xA4400000) -> Internal clock, SCK pin as serial clock output
41 # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
52 # define SCIF_ORER 0x0200 /* overrun error bit */
54 # define SCSPTR1 0xFFE0001C /* 8 bit SCIF */
55 # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
56 # define SCIF_ORER 0x0001 /* overrun error bit */
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| /OK3568_Linux_fs/kernel/drivers/infiniband/hw/ocrdma/ |
| H A D | ocrdma_sli.h | 3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
16 * - Redistributions of source code must retain the above copyright notice,
19 * - Redistributions in binary form must reproduce the above copyright
36 * linux-drivers@emulex.com
77 OCRDMA_CMD_QUERY_NSMR = 16,
122 #define OCRDMA_MAX_SGID 16
139 OCRDMA_DB_SQ_SHIFT = 16,
149 #define OCRDMA_DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
150 #define OCRDMA_DB_CQ_RING_ID_EXT_MASK 0x0C00 /* bits 10-11 of qid at 12-11 */
151 /* qid #2 msbits at 12-11 */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/v3d/ |
| H A D | v3d_regs.h | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2017-2018 Broadcom */
30 # define V3D_HUB_IDENT1_WITH_MSO BIT(19)
31 # define V3D_HUB_IDENT1_WITH_TSY BIT(18)
32 # define V3D_HUB_IDENT1_WITH_TFU BIT(17)
33 # define V3D_HUB_IDENT1_WITH_L3C BIT(16)
44 # define V3D_HUB_IDENT2_WITH_MMU BIT(8)
60 # define V3D_HUB_INT_MMU_WRV BIT(5)
61 # define V3D_HUB_INT_MMU_PTI BIT(4)
62 # define V3D_HUB_INT_MMU_CAP BIT(3)
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/lib/gcc/arm-none-linux-gnueabihf/10.3.1/include/ |
| H A D | mmintrin.h | 1 /* Copyright (C) 2002-2020 Free Software Foundation, Inc.
28 #error mmintrin.h included without enabling WMMX/WMMX2 instructions (e.g. -march=iwmmxt or -march=i…
34 /* Intrinsics use C name-mangling. */
76 /* Pack the four 16-bit values from M1 into the lower four 8-bit values of
77 the result, and the four 16-bit values from M2 into the upper four 8-bit
85 /* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
86 the result, and the two 32-bit values from M2 into the upper two 16-bit
94 /* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
95 the 64-bit value from M2 into the upper 32-bits of the result, all with
96 signed saturation for values that do not fit exactly into 32-bits. */
[all …]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/ |
| H A D | elf.h | 2 Copyright (C) 1995-2021 Free Software Foundation, Inc.
26 /* Type for a 16-bit quantity. */
30 /* Types for signed and unsigned 32-bit quantities. */
36 /* Types for signed and unsigned 64-bit quantities. */
50 /* Type for section indices, which are 16-bit quantities. */
61 #define EI_NIDENT (16)
72 Elf32_Word e_flags; /* Processor-specific flags */
90 Elf64_Word e_flags; /* Processor-specific flags */
121 #define ELFCLASS32 1 /* 32-bit objects */
122 #define ELFCLASS64 2 /* 64-bit objects */
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/ |
| H A D | elf.h | 2 Copyright (C) 1995-2021 Free Software Foundation, Inc.
26 /* Type for a 16-bit quantity. */
30 /* Types for signed and unsigned 32-bit quantities. */
36 /* Types for signed and unsigned 64-bit quantities. */
50 /* Type for section indices, which are 16-bit quantities. */
61 #define EI_NIDENT (16)
72 Elf32_Word e_flags; /* Processor-specific flags */
90 Elf64_Word e_flags; /* Processor-specific flags */
121 #define ELFCLASS32 1 /* 32-bit objects */
122 #define ELFCLASS64 2 /* 64-bit objects */
[all …]
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