1 // SPDX-License-Identifier: GPL-2.0+
12 #include "pinctrl-rockchip.h"
19 		.bit = 8,
25 		.bit = 0,
31 		.bit = 14,
43 		.route_val = BIT(16) | BIT(16 + 1),
50 		.route_val = BIT(16) | BIT(16 + 1) | BIT(0),
52 		/* gmac-m1_rxd0 */
57 		.route_val = BIT(16 + 2) | BIT(2),
59 		/* gmac-m1-optimized_rxd3 */
64 		.route_val = BIT(16 + 10) | BIT(10),
71 		.route_val = BIT(16 + 3),
78 		.route_val =  BIT(16 + 3) | BIT(3),
85 		.route_val =  BIT(16 + 4) | BIT(16 + 5) | BIT(5),
92 		.route_val = BIT(16 + 6),
99 		.route_val =  BIT(16 + 6) | BIT(6),
106 		.route_val =  BIT(16 + 7) | BIT(7),
110 		.pin = 16,
113 		.route_val =  BIT(16 + 8) | BIT(8),
117 		.pin = 16,
120 		.route_val =  BIT(16 + 9) | BIT(9),
126 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3328_set_mux()
130 	u8 bit;  in rk3328_set_mux()  local
133 	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)  in rk3328_set_mux()
134 				? priv->regmap_pmu : priv->regmap_base;  in rk3328_set_mux()
137 	mux_type = bank->iomux[iomux_num].type;  in rk3328_set_mux()
138 	reg = bank->iomux[iomux_num].offset;  in rk3328_set_mux()
139 	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);  in rk3328_set_mux()
141 	if (bank->recalced_mask & BIT(pin))  in rk3328_set_mux()
142 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);  in rk3328_set_mux()
144 	data = (mask << (bit + 16));  in rk3328_set_mux()
145 	data |= (mux & mask) << bit;  in rk3328_set_mux()
155 					 int *reg, u8 *bit)  in rk3328_calc_pull_reg_and_bit()  argument
157 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3328_calc_pull_reg_and_bit()
159 	*regmap = priv->regmap_base;  in rk3328_calc_pull_reg_and_bit()
161 	*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;  in rk3328_calc_pull_reg_and_bit()
164 	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);  in rk3328_calc_pull_reg_and_bit()
165 	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;  in rk3328_calc_pull_reg_and_bit()
173 	u8 bit, type;  in rk3328_set_pull()  local
177 		return -ENOTSUPP;  in rk3328_set_pull()
179 	rk3328_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);  in rk3328_set_pull()
180 	type = bank->pull_type[pin_num / 8];  in rk3328_set_pull()
188 	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);  in rk3328_set_pull()
189 	data |= (ret << bit);  in rk3328_set_pull()
199 					int *reg, u8 *bit)  in rk3328_calc_drv_reg_and_bit()  argument
201 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3328_calc_drv_reg_and_bit()
203 	*regmap = priv->regmap_base;  in rk3328_calc_drv_reg_and_bit()
205 	*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;  in rk3328_calc_drv_reg_and_bit()
208 	*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);  in rk3328_calc_drv_reg_and_bit()
209 	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;  in rk3328_calc_drv_reg_and_bit()
218 	u8 bit;  in rk3328_set_drive()  local
219 	int type = bank->drv[pin_num / 8].drv_type;  in rk3328_set_drive()
221 	rk3328_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);  in rk3328_set_drive()
229 	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);  in rk3328_set_drive()
230 	data |= (ret << bit);  in rk3328_set_drive()
237 #define RK3328_SCHMITT_PINS_PER_REG		16
244 					   int *reg, u8 *bit)  in rk3328_calc_schmitt_reg_and_bit()  argument
246 	struct rockchip_pinctrl_priv *priv = bank->priv;  in rk3328_calc_schmitt_reg_and_bit()
248 	*regmap = priv->regmap_base;  in rk3328_calc_schmitt_reg_and_bit()
251 	*reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE;  in rk3328_calc_schmitt_reg_and_bit()
253 	*bit = pin_num % RK3328_SCHMITT_PINS_PER_REG;  in rk3328_calc_schmitt_reg_and_bit()
263 	u8 bit;  in rk3328_set_schmitt()  local
266 	rk3328_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);  in rk3328_set_schmitt()
268 	data = BIT(bit + 16) | (enable << bit);  in rk3328_set_schmitt()
304 		.compatible = "rockchip,rk3328-pinctrl",