| e1168bc3 | 13-Nov-2024 |
Levi Yun <yeoreum.yun@arm.com> |
feat(el3_spmc): ffa error handling in direct msg
When an FFA_ERROR happens while handling a direct message from normal world, return to normal world with FFA_ERROR. Otherwise, the system would re-en
feat(el3_spmc): ffa error handling in direct msg
When an FFA_ERROR happens while handling a direct message from normal world, return to normal world with FFA_ERROR. Otherwise, the system would re-enter the secure partition with FFA_ERROR.
Change-Id: I3d9a68a41b4815c1a8e10354cfcf68fec9f4b800 Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
show more ...
|
| 09a580b7 | 07-Aug-2024 |
Levi Yun <yeoreum.yun@arm.com> |
feat(ff-a): support FFA_MSG_SEND_DIRECT_REQ2/RESP2
StandaloneMm which is S-EL0 partition uses FFA_MSG_SEND_DIRECT_REQ2/RESP2 to handle multiple services. For this, add support for FFA_MSG_SEND_DIREC
feat(ff-a): support FFA_MSG_SEND_DIRECT_REQ2/RESP2
StandaloneMm which is S-EL0 partition uses FFA_MSG_SEND_DIRECT_REQ2/RESP2 to handle multiple services. For this, add support for FFA_MSG_SEND_DIRECT_REQ2/RESP2 in el3_spmc restrictly up to use 8 registers. although FF-A v1.2 defines FFA_MSG_SEND_DIRECT_REQ2/RESP2 with ability to pass/return up to 18 registers.
Signed-off-by: Levi Yun <yeoreum.yun@arm.com> Change-Id: I8ab1c332d269d9d131330bb2debd10d75bdba1ee
show more ...
|
| 8db17052 | 25-Oct-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
feat(smccc): implement SMCCC_ARCH_FEATURE_AVAILABILITY
SMCCC_ARCH_FEATURE_AVAILABILITY [1] is a call to query firmware about the features it is aware of and enables. This is useful when a feature is
feat(smccc): implement SMCCC_ARCH_FEATURE_AVAILABILITY
SMCCC_ARCH_FEATURE_AVAILABILITY [1] is a call to query firmware about the features it is aware of and enables. This is useful when a feature is not enabled at EL3, eg due to an older FW image, but it is present in hardware. In those cases, the EL1 ID registers do not reflect the usable feature set and this call should provide the necessary information to remedy that.
The call itself is very lightweight - effectively a sanitised read of the relevant system register. Bits that are not relevant to feature enablement are masked out and active low bits are converted to active high.
The implementation is also very simple. All relevant, irrelevant, and inverted bits combined into bitmasks at build time. Then at runtime the masks are unconditionally applied to produce the right result. This assumes that context managers will make sure that disabled features do not have their bits set and the registers are context switched if any fields in them make enablement ambiguous.
Features that are not yet supported in TF-A have not been added. On debug builds, calling this function will fail an assert if any bits that are not expected are set. In combination with CI this should allow for this feature to to stay up to date as new architectural features are added.
If a call for MPAM3_EL3 is made when MPAM is not enabled, the call will return INVALID_PARAM, while if it is FEAT_STATE_CHECK, it will return zero. This should be fairly consistent with feature detection.
The bitmask is meant to be interpreted as the logical AND of the relevant ID registers. It would be permissible for this to return 1 while the ID returns 0. Despite this, this implementation takes steps not to. In the general case, the two should match exactly.
Finally, it is not entirely clear whether this call replies to SMC32 requests. However, it will not, as the return values are all 64 bits.
[1]: https://developer.arm.com/documentation/den0028/galp1/?lang=en
Co-developed-by: Charlie Bareham <charlie.bareham@arm.com> Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I1a74e7d0b3459b1396961b8fa27f84e3f0ad6a6f
show more ...
|
| ddf72e6a | 07-Aug-2024 |
Levi Yun <yeoreum.yun@arm.com> |
feat(ff-a): add FFA_MEM_PERM_GET/SET_SMC64
FF-A memory management protocol v1.1 specifies not only FFA_MEM_PERM_GET_SMC32/FFA_MEM_PERM_SET_SMC32 but also FFA_MEM_PERM_GET_SMC64/FFA_MEM_PERM_SET_SMC6
feat(ff-a): add FFA_MEM_PERM_GET/SET_SMC64
FF-A memory management protocol v1.1 specifies not only FFA_MEM_PERM_GET_SMC32/FFA_MEM_PERM_SET_SMC32 but also FFA_MEM_PERM_GET_SMC64/FFA_MEM_PERM_SET_SMC64.
Change former FFA_MEM_PERM_GET/SET definitions to separate operations and add handler for FFA_MEM_PERM_GET/SET_SMC64 in spmc_smc_handler().
Signed-off-by: Levi Yun <yeoreum.yun@arm.com> Change-Id: I175063654703db26c1ffc3cfd7fa428b94d2bfc9
show more ...
|
| 4053a647 | 08-Feb-2024 |
Levi Yun <yeoreum.yun@arm.com> |
feat(el3-spmc): support Hob list to boot S-EL0 SP
The EDKII/StandaloneMm module runs as a S-EL0 partition on top of the EL3 FF-A SPMC.
In the past the StandaloneMm partition received its boot infor
feat(el3-spmc): support Hob list to boot S-EL0 SP
The EDKII/StandaloneMm module runs as a S-EL0 partition on top of the EL3 FF-A SPMC.
In the past the StandaloneMm partition received its boot information through the use of a device tree (DT) passed through the FF-A boot protocol. The StandaloneMm itself converted the DT into a HOB.
To better match the UEFI PI spec, the EL3 SPMC must now produce the HOB including the PHIT (Phase Handoff Information Table) as first item in the HOB list. The SPMC then passes the HOB through the FF-A boot protocol for the StandaloneMm consumption.
This discards the use of a DT between the SPMC and the StandaloneMm partition.
Signed-off-by: Levi Yun <yeoreum.yun@arm.com> Change-Id: I22fb02c710169bd5a5ba1d1f60dce977a5a59ab6
show more ...
|
| 19082c20 | 08-Aug-2024 |
Levi Yun <yeoreum.yun@arm.com> |
fix(el3-spmc): use write_el1_ctx_timer() macro to set cntkctl_el1 value
commit 42e35d2f8c0e ("refactor(cm): convert el1 ctx assembly offset entries to c structure") moves cntkctl_el1 register from e
fix(el3-spmc): use write_el1_ctx_timer() macro to set cntkctl_el1 value
commit 42e35d2f8c0e ("refactor(cm): convert el1 ctx assembly offset entries to c structure") moves cntkctl_el1 register from el1_sysregs_t's common to arch_timer structure. To set cntkctl_el1, it should use write_el1_ctx_timer() instead of write_el1_ctx_common() otherwise, build failed.
Signed-off-by: Levi Yun <yeoreum.yun@arm.com> Change-Id: Ifa1ca6e056fa95bd07598d20705856e208670808
show more ...
|
| 42cf6026 | 10-Jul-2024 |
Juan Pablo Conde <juanpablo.conde@arm.com> |
refactor(rmmd): plat token requests in pieces
Until now, the attestation token size was limited by the size of the shared buffer between RMM and TF-A. With this change, RMM can now request the token
refactor(rmmd): plat token requests in pieces
Until now, the attestation token size was limited by the size of the shared buffer between RMM and TF-A. With this change, RMM can now request the token in pieces, so they fit in the shared buffer. A new output parameter was added to the SMC call, which will return (along with the size of bytes copied into the buffer) the number of bytes of the token that remain to be retrieved.
TF-A will keep an offset variable that will indicate the position in the token where the next call will retrieve bytes from. This offset will be increased on every call by adding the number number of bytes copied. If the received hash size is not 0, TF-A will reset the offset to 0 and copy from that position on.
The SMC call will now return at most the size of the shared buffer in bytes on every call. Therefore, from now on, multiple SMC calls may be needed to be issued if the token size exceeds the shared buffer size.
Change-Id: I591f7013d06f64e98afaf9535dbea6f815799723 Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
show more ...
|