xref: /rk3399_ARM-atf/plat/arm/board/tc/platform.mk (revision 42cf602662d70ae4bd0c21a2d831e5d97c19a7b3)
1# Copyright (c) 2021-2024, Arm Limited. All rights reserved.
2#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
6include common/fdt_wrappers.mk
7
8TARGET_FLAVOUR			:=	fvp
9# DPU with SCMI may not necessarily work, so allow its independence
10TC_DPU_USE_SCMI_CLK		:=	1
11# SCMI power domain control enable
12TC_SCMI_PD_CTRL_EN		:=	1
13
14# System setup
15CSS_USE_SCMI_SDS_DRIVER		:=	1
16HW_ASSISTED_COHERENCY		:=	1
17USE_COHERENT_MEM		:=	0
18GIC_ENABLE_V4_EXTN		:=      1
19GICV3_SUPPORT_GIC600		:=	1
20override NEED_BL2U		:=	no
21override ARM_PLAT_MT		:=	1
22
23# CPU setup
24ARM_ARCH_MINOR			:=	7
25BRANCH_PROTECTION		:=	1
26ENABLE_FEAT_MPAM		:=	1 # default is 2, optimise
27ENABLE_SVE_FOR_NS		:=	2 # to show we use it
28ENABLE_SVE_FOR_SWD		:=	1
29ENABLE_SME_FOR_NS		:=	2
30ENABLE_SME2_FOR_NS		:=	2
31ENABLE_SME_FOR_SWD		:=	1
32ENABLE_TRBE_FOR_NS		:=	1
33ENABLE_SYS_REG_TRACE_FOR_NS	:=	1
34ENABLE_FEAT_AMU			:=	1
35ENABLE_AMU_FCONF		:=	1
36ENABLE_AMU_AUXILIARY_COUNTERS	:=	1
37ENABLE_MPMM			:=	1
38ENABLE_MPMM_FCONF		:=	1
39ENABLE_FEAT_MTE2	        :=	2
40ENABLE_SPE_FOR_NS		:=	3
41
42CTX_INCLUDE_AARCH32_REGS	:=	0
43
44ifeq (${SPD},spmd)
45	SPMD_SPM_AT_SEL2	:=	1
46	CTX_INCLUDE_PAUTH_REGS	:=	1
47endif
48
49# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
50TC_RESOLUTION_OPTIONS		:= 	640x480p60 \
51					1920x1080p60
52# Set default to the 640x480p60 resolution mode
53TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS))
54
55# Check resolution option for FVP
56ifneq ($(filter ${TARGET_FLAVOUR}, fvp),)
57ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),)
58        $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS})
59endif
60endif
61
62ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
63        $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
64          Some of the features might not work as expected)
65endif
66
67ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0)
68        $(error TARGET_PLATFORM must be less than or equal to 4)
69endif
70
71ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
72        $(error TARGET_FLAVOUR must be fvp or fpga)
73endif
74
75$(eval $(call add_defines, \
76	TARGET_PLATFORM \
77	TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
78	TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \
79	TC_DPU_USE_SCMI_CLK \
80	TC_SCMI_PD_CTRL_EN \
81))
82
83CSS_LOAD_SCP_IMAGES	:=	1
84
85# Save DSU PMU registers on cluster off and restore them on cluster on
86PRESERVE_DSU_PMU_REGS		:= 1
87
88# Specify MHU type based on platform
89ifneq ($(filter ${TARGET_PLATFORM}, 2),)
90	PLAT_MHU_VERSION	:= 2
91else
92	PLAT_MHU_VERSION	:= 3
93endif
94
95# Include GICv3 driver files
96include drivers/arm/gic/v3/gicv3.mk
97
98ENT_GIC_SOURCES		:=	${GICV3_SOURCES}		\
99				plat/common/plat_gicv3.c	\
100				plat/arm/common/arm_gicv3.c
101
102TC_BASE	=	plat/arm/board/tc
103
104PLAT_INCLUDES		+=	-I${TC_BASE}/include/ \
105				-I${TC_BASE}/fdts/
106
107# CPU libraries for TARGET_PLATFORM=1
108ifeq (${TARGET_PLATFORM}, 1)
109TC_CPU_SOURCES	+=	lib/cpus/aarch64/cortex_a510.S \
110			lib/cpus/aarch64/cortex_a715.S \
111			lib/cpus/aarch64/cortex_x3.S
112endif
113
114# CPU libraries for TARGET_PLATFORM=2
115ifeq (${TARGET_PLATFORM}, 2)
116ERRATA_A520_2938996	:=	1
117ERRATA_X4_2726228	:=	1
118
119TC_CPU_SOURCES	+=	lib/cpus/aarch64/cortex_a520.S \
120			lib/cpus/aarch64/cortex_a720.S \
121			lib/cpus/aarch64/cortex_x4.S
122endif
123
124# CPU libraries for TARGET_PLATFORM=3
125ifeq (${TARGET_PLATFORM}, 3)
126ERRATA_A520_2938996	:=	1
127
128TC_CPU_SOURCES	+=	lib/cpus/aarch64/cortex_a520.S \
129			lib/cpus/aarch64/cortex_a725.S \
130			lib/cpus/aarch64/cortex_x925.S
131endif
132
133# CPU libraries for TARGET_PLATFORM=4
134ifeq (${TARGET_PLATFORM}, 4)
135TC_CPU_SOURCES	+=	lib/cpus/aarch64/cortex_gelas.S \
136			lib/cpus/aarch64/nevis.S \
137			lib/cpus/aarch64/travis.S
138endif
139
140INTERCONNECT_SOURCES	:=	${TC_BASE}/tc_interconnect.c \
141				plat/arm/common/arm_ni.c
142
143PLAT_BL_COMMON_SOURCES	+=	${TC_BASE}/tc_plat.c	\
144				${TC_BASE}/include/tc_helpers.S
145
146BL1_SOURCES		+=	${INTERCONNECT_SOURCES}	\
147				${TC_CPU_SOURCES}	\
148				${TC_BASE}/tc_trusted_boot.c	\
149				${TC_BASE}/tc_bl1_setup.c \
150				${TC_BASE}/tc_err.c	\
151				drivers/arm/sbsa/sbsa.c
152
153BL2_SOURCES		+=	${TC_BASE}/tc_security.c	\
154				${TC_BASE}/tc_err.c		\
155				${TC_BASE}/tc_trusted_boot.c		\
156				${TC_BASE}/tc_bl2_setup.c		\
157				lib/utils/mem_region.c			\
158				drivers/arm/tzc/tzc400.c		\
159				plat/arm/common/arm_nor_psci_mem_protect.c
160
161ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0)
162BL2_SOURCES		+=	plat/arm/common/arm_tzc400.c
163endif
164
165BL31_SOURCES		+=	${INTERCONNECT_SOURCES}	\
166				${TC_CPU_SOURCES}	\
167				${ENT_GIC_SOURCES}			\
168				${TC_BASE}/tc_bl31_setup.c	\
169				${TC_BASE}/tc_topology.c	\
170				lib/fconf/fconf.c			\
171				lib/fconf/fconf_dyn_cfg_getter.c	\
172				drivers/arm/css/dsu/dsu.c			\
173				drivers/cfi/v2m/v2m_flash.c		\
174				lib/utils/mem_region.c			\
175				plat/arm/common/arm_nor_psci_mem_protect.c	\
176				drivers/arm/sbsa/sbsa.c
177
178BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
179
180# Add the FDT_SOURCES and options for Dynamic Config
181FDT_SOURCES		+=	${TC_BASE}/fdts/${PLAT}_fw_config.dts	\
182				${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \
183				${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts
184FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
185TB_FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
186FVP_NT_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
187
188# Add the FW_CONFIG to FIP and specify the same to certtool
189$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
190# Add the TB_FW_CONFIG to FIP and specify the same to certtool
191$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
192# Add the NT_FW_CONFIG to FIP and specify the same to certtool
193$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
194
195ifeq (${SPD},spmd)
196ifeq ($(ARM_SPMC_MANIFEST_DTS),)
197ARM_SPMC_MANIFEST_DTS	:=	${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
198endif
199
200FDT_SOURCES		+=	${ARM_SPMC_MANIFEST_DTS}
201TC_TOS_FW_CONFIG	:=	${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
202
203# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
204$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
205endif
206
207#Device tree
208TC_HW_CONFIG_DTS	:=	fdts/${PLAT}${TARGET_PLATFORM}.dts
209TC_HW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}.dtb
210FDT_SOURCES		+=	${TC_HW_CONFIG_DTS}
211$(eval TC_HW_CONFIG	:=	${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
212
213# Add the HW_CONFIG to FIP and specify the same to certtool
214$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
215
216# Include Measured Boot makefile before any Crypto library makefile.
217# Crypto library makefile may need default definitions of Measured Boot build
218# flags present in Measured Boot makefile.
219$(info Including rse_comms.mk)
220ifeq (${MEASURED_BOOT},1)
221        $(info Including rse_comms.mk)
222        include drivers/arm/rse/rse_comms.mk
223
224	BL1_SOURCES	+=	${RSE_COMMS_SOURCES}
225	BL2_SOURCES	+=	${RSE_COMMS_SOURCES}
226	PLAT_INCLUDES	+=	-Iinclude/lib/psa
227
228    ifeq (${DICE_PROTECTION_ENVIRONMENT},1)
229        $(info Including qcbor.mk)
230        include drivers/measured_boot/rse/qcbor.mk
231        $(info Including dice_prot_env.mk)
232        include drivers/measured_boot/rse/dice_prot_env.mk
233
234	BL1_SOURCES	+=	${QCBOR_SOURCES} \
235				${DPE_SOURCES} \
236				plat/arm/board/tc/tc_common_dpe.c \
237				plat/arm/board/tc/tc_bl1_dpe.c \
238				lib/psa/dice_protection_environment.c \
239				drivers/arm/css/sds/sds.c \
240				drivers/delay_timer/delay_timer.c \
241				drivers/delay_timer/generic_delay_timer.c
242
243	BL2_SOURCES	+=	${QCBOR_SOURCES} \
244				${DPE_SOURCES} \
245				plat/arm/board/tc/tc_common_dpe.c \
246				plat/arm/board/tc/tc_bl2_dpe.c \
247				lib/psa/dice_protection_environment.c
248
249	PLAT_INCLUDES	+=	-I${QCBOR_INCLUDES} \
250				-Iinclude/lib/dice
251    else
252        $(info Including rse_measured_boot.mk)
253        include drivers/measured_boot/rse/rse_measured_boot.mk
254
255	BL1_SOURCES	+=	${MEASURED_BOOT_SOURCES} \
256				plat/arm/board/tc/tc_common_measured_boot.c \
257				plat/arm/board/tc/tc_bl1_measured_boot.c \
258				lib/psa/measured_boot.c
259
260	BL2_SOURCES		+=	${MEASURED_BOOT_SOURCES} \
261				plat/arm/board/tc/tc_common_measured_boot.c \
262				plat/arm/board/tc/tc_bl2_measured_boot.c \
263				lib/psa/measured_boot.c
264    endif
265endif
266
267ifeq (${TRNG_SUPPORT},1)
268	BL31_SOURCES	+=	plat/arm/board/tc/tc_trng.c
269endif
270
271ifneq (${PLATFORM_TEST},)
272    # Add this include as first, before arm_common.mk. This is necessary
273    # because arm_common.mk builds Mbed TLS, and platform_test.mk can
274    # change the list of Mbed TLS files that are to be compiled
275    # (LIBMBEDTLS_SRCS).
276    include plat/arm/board/tc/platform_test.mk
277endif
278
279
280include plat/arm/common/arm_common.mk
281include plat/arm/css/common/css_common.mk
282include plat/arm/board/common/board_common.mk
283