fix(drtm): map DLME and DRTM parameter region as execute-never

Replace MT_MEMORY | MT_NS | MT_RO with MT_NS | MT_RO_DATA for the DRTM
parameter and DLME dynamic mappings. This maps the regions as re

fix(drtm): map DLME and DRTM parameter region as execute-never

Replace MT_MEMORY | MT_NS | MT_RO with MT_NS | MT_RO_DATA for the DRTM
parameter and DLME dynamic mappings. This maps the regions as read-only
data and execute-never. This is as per DRTM specification.

Change-Id: I3e0f555e9a26726389a7c5f6b4fef65cb4078ee2
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(optee): initialize the structure

This corrects the MISRA violation C2012-9.1:
Initialize the structure with memset to ensures the structure
contains predictable zero values before being passed t

fix(optee): initialize the structure

This corrects the MISRA violation C2012-9.1:
Initialize the structure with memset to ensures the structure
contains predictable zero values before being passed to functions,
preventing potential undefined behavior from uninitialized
automatic storage.

Change-Id: Ib89b45b8aeefa211afacc77f948a5888815f9e68
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement. Enclosed statement body

fix(optee): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement. Enclosed statement body within the curly
braces.

Change-Id: Ic8523f1d6ffa367c1ea3753de367a9c88008b55d
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): add parenthesis for macro expressions

This corrects MISRA violation C2012‑20.7:
macro parameters used within expressions
were not enclosed in parentheses, risking
incorrect operator prec

fix(optee): add parenthesis for macro expressions

This corrects MISRA violation C2012‑20.7:
macro parameters used within expressions
were not enclosed in parentheses, risking
incorrect operator precedence after expansion.

The fix wraps all macro parameters in expressions
with parentheses to ensure intended evaluation
order and compliance with the rule.

Change-Id: Iaf5626afab2d8d8d945caf96798e0a8b33b32e53
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): move function to conditional block

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Mo

fix(optee): move function to conditional block

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Moving the function definition to match its usage scope.
The function is only called within a conditional compilation
block, so it should be defined within the same conditional scope.

Change-Id: I51071c9bb18591a3017e9ae4a2de1d7fca37de16
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): add boolean type for expressions

This corrects MISRA violation C2012‑14.4:
conditional or loop constructs were using non‑Boolean
expressions directly instead of comparisons or Boolean ty

fix(optee): add boolean type for expressions

This corrects MISRA violation C2012‑14.4:
conditional or loop constructs were using non‑Boolean
expressions directly instead of comparisons or Boolean types.

The fix replaces them with explicit Boolean tests enforcing
that all controlling expressions have essentially Boolean type
and improving code clarity and type safety.

Change-Id: I150a8a674e8abf9c5409cc3d557af0e288ba1668
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.

The condition is compared

fix(optee): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.

The condition is compared with NULL to get boolean result.

Change-Id: Ib386b5a3c3a7febbbcb5da7546e72ea6269744dc
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(optee): typecast operands to match data type

This corrects the MISRA violation C2012-10.1:

Operands of different essential types were used in
bitwise, arithmetic, or logical operations, violati

fix(optee): typecast operands to match data type

This corrects the MISRA violation C2012-10.1:

Operands of different essential types were used in
bitwise, arithmetic, or logical operations, violating
type uniformity.

The fix suffixes integer literals with 'U' to specify
them as unsigned constants, ensuring operands in
bitwise, arithmetic, or logical operations have
consistent unsigned types. This approach avoids implicit
type promotions and maintains type safety by properly
declaring the intended type of literals.

Change-Id: Iead89348f107772175bbf7768554258b0095a922
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(el3-runtime): resolve essential-type mismatch

This resolves MISRA C:2012 Rule 10.7 violation
where a composite expression involved operands of differing
essential types, causing unintended impli

fix(el3-runtime): resolve essential-type mismatch

This resolves MISRA C:2012 Rule 10.7 violation
where a composite expression involved operands of differing
essential types, causing unintended implicit conversions.

The fix ensures all operands in the expression have matching
essential types by introducing explicit casts,
preventing unsafe or inconsistent arithmetic operations.

Change-Id: If01dfe78e7a5cffc8b0efa6ac969b262e236852b
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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fix(spmd): remove a racy assert in g0 int. handler

handle_interrupt_exception calls plat_ic_get_pending_interrupt_type to
perform a first triage and route to the corresponding interrupt handler
base

fix(spmd): remove a racy assert in g0 int. handler

handle_interrupt_exception calls plat_ic_get_pending_interrupt_type to
perform a first triage and route to the corresponding interrupt handler
based on the interrupt type.
A registered handler must not assume that the HPPI hasn't changed from
the top level handler until reaching to it. The first thing a handler
must do is attempting to acknowledge the interrupt and process it if
it's a valid INTID. Meanwhile, it may have happened the interrupt has
been acknowledged by another PE, or another high priority interrupt got
asserted, or any other valid reason for the HPPI to change.
The reasoning is the same for an interrupt delegated by lower EL through
the FFA_EL3_INTR_HANDLE interface. For a G0 interrupt triggered while
secure world runs, the first triage is done by lower EL e.g. S-EL2 and
routes it to EL3 for handling. Once there, the HPPI might have changed
so the same rules as above apply.

Remove the assert from SPMD g0 interrupt handlers that is reading again
the HPPI which may unwillingly trigger in a racy situation.

Change-Id: I35f30ec3c0358953301e2b99949a6b758dabf36c
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>

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Merge "feat(spm-mm): fix wrong range of SPM_MM" into integration

refactor(drtm): use crypto-agile measured boot

Update the DRTM boot flow to use the crypto-agile API. Replace the
previous single-algorithm hash configuration with dynamic algorithm
selection. Align

refactor(drtm): use crypto-agile measured boot

Update the DRTM boot flow to use the crypto-agile API. Replace the
previous single-algorithm hash configuration with dynamic algorithm
selection. Align image measurement and event log header generation with
the new hashing model and update platform glue code accordingly.

Change-Id: I22930440476895c23dbd4e04502757d2f6726e33
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge changes I6e44c7f1,Id4320cbf,Ibb05dd47,Icec70861 into integration

* changes:
fix(morello): don't define get_mem_client_mode() when it won't be used
fix(rdn2): don't use V1 as a label
fix(

Merge changes I6e44c7f1,Id4320cbf,Ibb05dd47,Icec70861 into integration

* changes:
fix(morello): don't define get_mem_client_mode() when it won't be used
fix(rdn2): don't use V1 as a label
fix(tspd): don't forward declare tsp_vectors_t
fix(cpufeat): drop feature_panic() as unused

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feat(spm-mm): fix wrong range of SPM_MM

According to SMCCC specification [1],
Table 6-4: Reserved Standard Secure Service Call range,

fid 0x40-0x4f are reserved for Management Mode,
fid 0x50-0x5f a

feat(spm-mm): fix wrong range of SPM_MM

According to SMCCC specification [1],
Table 6-4: Reserved Standard Secure Service Call range,

fid 0x40-0x4f are reserved for Management Mode,
fid 0x50-0x5f are reserved for TRNG interface and
fid 0x60-0x7f are not reserved yet for Standard Secure Service Calls
and current SPM_MM's implementation uses the 0x40-0x4f and 0x60-0x7f fids.

However, the is_spm_mm_fid() is checking TRNG range too
so it returns false positive and
TRNG request couldn't be handled properly.

To resolve this, remove the TRNG range check in is_spm_mm_fid().

Link: https://developer.arm.com/documentation/den0028/latest/ [1]
Change-Id: Ide41cf3451412676f604e31f3d88aeb2e601c5f2
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(per-cpu): migrate spm_core_context to per-cpu framework

migrate spm_core_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed

feat(per-cpu): migrate spm_core_context to per-cpu framework

migrate spm_core_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: Sammit Joshi <sammit.joshi@arm.com>
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Ie600ae755cfb738adde51cfc4af3cddbbccbbaef

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feat(per-cpu): migrate rmm_context to per-cpu framework

migrate rmm_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: S

feat(per-cpu): migrate rmm_context to per-cpu framework

migrate rmm_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: Sammit Joshi <sammit.joshi@arm.com>
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I72d49c3d860dac10bd3930ce400b0199bedd887b

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feat(lfa): introduce support for call_again for LFA_PRIME

LFA_PRIME is a single-threaded operation that is not pinned to
a specific CPU. The implementation must support calls being
issued from diffe

feat(lfa): introduce support for call_again for LFA_PRIME

LFA_PRIME is a single-threaded operation that is not pinned to
a specific CPU. The implementation must support calls being
issued from different CPUs, even for several calls to prime the
same component.

This patch checks if the plat_lfa_load_auth_image return -EAGAIN
indicating that the platform expects the LFA_PRIME call to be
issued again. This is done by returning LFA_SUCCESS and setting
flags[0] to 1, indicating that LFA_PRIME is incomplete and must
be called again.

Change-Id: Ia3046b5467c50c4c51392bac3fb9e9533f2438db
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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feat(lfa): allow LFA_PRIME from one CPU at a time

LFA_PRIME is a single-threaded operation that is not pinned
to a specific CPU. The implementation must support calls being
issued from different CPU

feat(lfa): allow LFA_PRIME from one CPU at a time

LFA_PRIME is a single-threaded operation that is not pinned
to a specific CPU. The implementation must support calls being
issued from different CPUs, even for several calls to prime
the same component. However, those calls must not happen
concurrently.

This patch introduces a spinlock across the LFA_PRIME call to
support this requirement. In case of concurrent calls, the
LFA_BUSY error code is returned to the caller.

Change-Id: I0574a155ea66b527e26b0dd73272a103e4f936b1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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fix(tspd): don't forward declare tsp_vectors_t

Everyone who needs it can (and does) include tsp.h which has the whole
definition.

Building with clang throws up errors otherwise.

Change-Id: Ibb05dd

fix(tspd): don't forward declare tsp_vectors_t

Everyone who needs it can (and does) include tsp.h which has the whole
definition.

Building with clang throws up errors otherwise.

Change-Id: Ibb05dd47fdc135f3110ea4c4744f675ce7e81184
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(smccc): don't panic on a feature availability call with FEAT_RNG_TRAP

FEAT_RNG_TRAP requires a little bit of extra care to be reported
correctly, which we do. However, the check value isn't upda

fix(smccc): don't panic on a feature availability call with FEAT_RNG_TRAP

FEAT_RNG_TRAP requires a little bit of extra care to be reported
correctly, which we do. However, the check value isn't updated
accordingly leading to a panic. Update it to avoid.

Change-Id: Id5086b3cd1c6dd74287397b9636088fe1ccb5703
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "fix(rmmd): correct activation condition check" into integration

Merge changes from topic "mb/lfa-rmm-test" into integration

* changes:
fix(rmmd): avoid race conditions in CPU finish
fix(arm): move lfa componet header to common and fix the helper
chore(lfa)

Merge changes from topic "mb/lfa-rmm-test" into integration

* changes:
fix(rmmd): avoid race conditions in CPU finish
fix(arm): move lfa componet header to common and fix the helper
chore(lfa): rename component_id to lfa_component_id

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Merge "feat(el3-spmc): allow physical partitions to have multiple UUIDs" into integration

feat(el3-spmc): allow physical partitions to have multiple UUIDs

Physical partitions can now be assigned multiple UUIDs. This updates
- FFA_PARTITION_INFO_GET handling to return all the required

feat(el3-spmc): allow physical partitions to have multiple UUIDs

Physical partitions can now be assigned multiple UUIDs. This updates
- FFA_PARTITION_INFO_GET handling to return all the required
parttion descriptors
- device tree parsing to read multiple UUIDs

Change-Id: Ib9a961130aace75ba31b6610873138f35d355f09
Signed-off-by: Jay Monkman <jmonkman@google.com>
Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>

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Merge "feat(el3-spmc): update FF-A version checks" into integration