| fcb7b260 | 26-Nov-2025 |
Chris Kay <chris.kay@arm.com> |
Merge changes I6e44c7f1,Id4320cbf,Ibb05dd47,Icec70861 into integration
* changes: fix(morello): don't define get_mem_client_mode() when it won't be used fix(rdn2): don't use V1 as a label fix(
Merge changes I6e44c7f1,Id4320cbf,Ibb05dd47,Icec70861 into integration
* changes: fix(morello): don't define get_mem_client_mode() when it won't be used fix(rdn2): don't use V1 as a label fix(tspd): don't forward declare tsp_vectors_t fix(cpufeat): drop feature_panic() as unused
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| f5dca2a9 | 29-Jan-2025 |
Rohit Mathew <rohit.mathew@arm.com> |
feat(per-cpu): migrate spm_core_context to per-cpu framework
migrate spm_core_context objects to the NUMA-aware per-cpu framework to optimize memory access and to efficiently utilize memory.
Signed
feat(per-cpu): migrate spm_core_context to per-cpu framework
migrate spm_core_context objects to the NUMA-aware per-cpu framework to optimize memory access and to efficiently utilize memory.
Signed-off-by: Sammit Joshi <sammit.joshi@arm.com> Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Change-Id: Ie600ae755cfb738adde51cfc4af3cddbbccbbaef
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| f708e9dd | 29-Jan-2025 |
Rohit Mathew <rohit.mathew@arm.com> |
feat(per-cpu): migrate rmm_context to per-cpu framework
migrate rmm_context objects to the NUMA-aware per-cpu framework to optimize memory access and to efficiently utilize memory.
Signed-off-by: S
feat(per-cpu): migrate rmm_context to per-cpu framework
migrate rmm_context objects to the NUMA-aware per-cpu framework to optimize memory access and to efficiently utilize memory.
Signed-off-by: Sammit Joshi <sammit.joshi@arm.com> Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Change-Id: I72d49c3d860dac10bd3930ce400b0199bedd887b
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| 59b826ce | 15-Oct-2025 |
Varun Wadekar <vwadekar@nvidia.com> |
feat(lfa): introduce support for call_again for LFA_PRIME
LFA_PRIME is a single-threaded operation that is not pinned to a specific CPU. The implementation must support calls being issued from diffe
feat(lfa): introduce support for call_again for LFA_PRIME
LFA_PRIME is a single-threaded operation that is not pinned to a specific CPU. The implementation must support calls being issued from different CPUs, even for several calls to prime the same component.
This patch checks if the plat_lfa_load_auth_image return -EAGAIN indicating that the platform expects the LFA_PRIME call to be issued again. This is done by returning LFA_SUCCESS and setting flags[0] to 1, indicating that LFA_PRIME is incomplete and must be called again.
Change-Id: Ia3046b5467c50c4c51392bac3fb9e9533f2438db Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| c8e08212 | 14-Oct-2025 |
Varun Wadekar <vwadekar@nvidia.com> |
feat(lfa): allow LFA_PRIME from one CPU at a time
LFA_PRIME is a single-threaded operation that is not pinned to a specific CPU. The implementation must support calls being issued from different CPU
feat(lfa): allow LFA_PRIME from one CPU at a time
LFA_PRIME is a single-threaded operation that is not pinned to a specific CPU. The implementation must support calls being issued from different CPUs, even for several calls to prime the same component. However, those calls must not happen concurrently.
This patch introduces a spinlock across the LFA_PRIME call to support this requirement. In case of concurrent calls, the LFA_BUSY error code is returned to the caller.
Change-Id: I0574a155ea66b527e26b0dd73272a103e4f936b1 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| cc1c867d | 04-Nov-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(tspd): don't forward declare tsp_vectors_t
Everyone who needs it can (and does) include tsp.h which has the whole definition.
Building with clang throws up errors otherwise.
Change-Id: Ibb05dd
fix(tspd): don't forward declare tsp_vectors_t
Everyone who needs it can (and does) include tsp.h which has the whole definition.
Building with clang throws up errors otherwise.
Change-Id: Ibb05dd47fdc135f3110ea4c4744f675ce7e81184 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| f610c8c3 | 22-Oct-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(smccc): don't panic on a feature availability call with FEAT_RNG_TRAP
FEAT_RNG_TRAP requires a little bit of extra care to be reported correctly, which we do. However, the check value isn't upda
fix(smccc): don't panic on a feature availability call with FEAT_RNG_TRAP
FEAT_RNG_TRAP requires a little bit of extra care to be reported correctly, which we do. However, the check value isn't updated accordingly leading to a panic. Update it to avoid.
Change-Id: Id5086b3cd1c6dd74287397b9636088fe1ccb5703 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| d5388ff9 | 28-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(rmmd): correct activation condition check" into integration |
| f8a9aa10 | 28-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge changes from topic "mb/lfa-rmm-test" into integration
* changes: fix(rmmd): avoid race conditions in CPU finish fix(arm): move lfa componet header to common and fix the helper chore(lfa)
Merge changes from topic "mb/lfa-rmm-test" into integration
* changes: fix(rmmd): avoid race conditions in CPU finish fix(arm): move lfa componet header to common and fix the helper chore(lfa): rename component_id to lfa_component_id
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| 234519ee | 24-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(el3-spmc): allow physical partitions to have multiple UUIDs" into integration |
| 0322d7af | 30-Jan-2025 |
Jay Monkman <jmonkman@google.com> |
feat(el3-spmc): allow physical partitions to have multiple UUIDs
Physical partitions can now be assigned multiple UUIDs. This updates - FFA_PARTITION_INFO_GET handling to return all the required
feat(el3-spmc): allow physical partitions to have multiple UUIDs
Physical partitions can now be assigned multiple UUIDs. This updates - FFA_PARTITION_INFO_GET handling to return all the required parttion descriptors - device tree parsing to read multiple UUIDs
Change-Id: Ib9a961130aace75ba31b6610873138f35d355f09 Signed-off-by: Jay Monkman <jmonkman@google.com> Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>
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| ae4b70d6 | 24-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(el3-spmc): update FF-A version checks" into integration |
| 52a502f9 | 24-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(el3-spmc): enable FFA_MEM_RETRIEVE_MEM_REQ from the hypervisor" into integration |
| 3f1c63dd | 05-Feb-2025 |
Jay Monkman <jmonkman@google.com> |
feat(el3-spmc): update FF-A version checks
Fixed several version checks that failed with FF-A 1.2.
Change-Id: Idb37795e25eaa6f38ac4f065f68f8c8183cd26ea Signed-off-by: Jay Monkman <jmonkman@google.c
feat(el3-spmc): update FF-A version checks
Fixed several version checks that failed with FF-A 1.2.
Change-Id: Idb37795e25eaa6f38ac4f065f68f8c8183cd26ea Signed-off-by: Jay Monkman <jmonkman@google.com> Signed-off-by: Andrei Homescu <ahomescu@google.com>
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| 030e4d0c | 23-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(el3-spmc): validate fragment offset" into integration |
| 6d113285 | 16-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
fix(sdei): fix coverity finding array index read
Fix - CID 463142: (#1 of 1): Overflowed array index read (INTEGER_OVERFLOW)
Based on issue - https://scan4.scan.coverity.com/#/project-view/68818/1
fix(sdei): fix coverity finding array index read
Fix - CID 463142: (#1 of 1): Overflowed array index read (INTEGER_OVERFLOW)
Based on issue - https://scan4.scan.coverity.com/#/project-view/68818/11439?selectedIssue=463142
Add boundary checks overflow checks.
Change-Id: I56022b605008f8d35231d70d058c4d449d618d34 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 5ba2ad35 | 21-Oct-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(rmmd): correct activation condition check
Update the activation condition in rmmd_primary_activate to ensure the function behaves correctly when the return code is zero. This change prevents pot
fix(rmmd): correct activation condition check
Update the activation condition in rmmd_primary_activate to ensure the function behaves correctly when the return code is zero. This change prevents potential issues during the activation process.
Change-Id: I94d76c1e491f114b7fb32dd85dbfcfe2f5f1d3da Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 57824063 | 21-Oct-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(rmmd): avoid race conditions in CPU finish
Create a local copy of entry point info to prevent race conditions when accessing shared data. This change ensures that the CPU finish handler operates
fix(rmmd): avoid race conditions in CPU finish
Create a local copy of entry point info to prevent race conditions when accessing shared data. This change ensures that the CPU finish handler operates on a consistent state without interference from other threads, improving stability and reliability of the service.
Change-Id: I84fbc21672dde0f19176f63ee94afafc0084004e Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| b17fc0a6 | 22-Oct-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
chore(lfa): rename component_id to lfa_component_id
Refactor the function lfa_is_prime_complete to use a more specific parameter name, lfa_component_id, enhancing code clarity. This change improves
chore(lfa): rename component_id to lfa_component_id
Refactor the function lfa_is_prime_complete to use a more specific parameter name, lfa_component_id, enhancing code clarity. This change improves readability and reduces potential confusion with other component identifiers in the codebase.
Change-Id: I00285fce4b7149bd97d6386ef471e9d1598a3fed Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 7d34c9bb | 17-Oct-2024 |
Andrei Homescu <ahomescu@google.com> |
feat(el3-spmc): enable FFA_MEM_RETRIEVE_MEM_REQ from the hypervisor
pKVM calls this FF-A function to retrieve the descriptors for regions donated/lent/shared by a VM with an SP.
Change-Id: I55f1d67
feat(el3-spmc): enable FFA_MEM_RETRIEVE_MEM_REQ from the hypervisor
pKVM calls this FF-A function to retrieve the descriptors for regions donated/lent/shared by a VM with an SP.
Change-Id: I55f1d675db741bc8ddaaacae0d4d60245000fb34 Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>
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| c55b519e | 17-Oct-2025 |
Andrei Homescu <ahomescu@xwf.google.com> |
fix(el3-spmc): validate fragment offset
Per Table 4.3 of DEN 0140 1.3ALP0, the fragment offset passed to FFA_MEM_FRAG_RX has the following requirement:
Offset must be equal to one of the followin
fix(el3-spmc): validate fragment offset
Per Table 4.3 of DEN 0140 1.3ALP0, the fragment offset passed to FFA_MEM_FRAG_RX has the following requirement:
Offset must be equal to one of the following: – The number of bytes of the transaction descriptor transmitted prior to the invocation of this interface. – The offset used in the previous invocation of this interface. This allows the Sender to re-transmit the previous fragment if the Receiver could not receive it due to an IMPLEMENTATION DEFINED reason.
Keep track of the last and next fragment offsets between calls to FFA_MEM_RETRIEVE_REQ and FFA_MEM_FRAG_RX and validate the fragment offset, returning INVALID_PARAMETERS if it doesn't match one of the two expected values.
BREAKING CHANGE: no longer accepts invalid fragment offsets
Change-Id: If549bb62a1960e9367d14bae842cb4e289429669 Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>
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| 9f3f4d87 | 20-Oct-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
perf(spmd): don't initialise context on boot, do it on CPU_ON
Normal and Realm worlds setup their contexts whenever a core comes online. This speeds up boot and as a side effect allows any cores tha
perf(spmd): don't initialise context on boot, do it on CPU_ON
Normal and Realm worlds setup their contexts whenever a core comes online. This speeds up boot and as a side effect allows any cores that are never turned on to not be initialised.
So do this for spmd's Secure world too. This makes all three worlds consistent.
Change-Id: I8676d2a03a472074176e4db06910fc2b6cbf269a Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| 169505a4 | 20-Oct-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "fix(el3-spmc): do not check NS bit for fragments" into integration |
| 153eb4c8 | 18-Oct-2025 |
Andrei Homescu <ahomescu@xwf.google.com> |
fix(el3-spmc): do not check NS bit for fragments
We set the internal NS bit for memory transaction descriptors after the first fragment. Skip the validation check on that NS bit on every fragment af
fix(el3-spmc): do not check NS bit for fragments
We set the internal NS bit for memory transaction descriptors after the first fragment. Skip the validation check on that NS bit on every fragment after the first one, because by then the bit will always be 1.
Change-Id: I2a9bff12ed5c3979b9d626ab33aac0115d81e2d1 Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>
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| 634f6742 | 17-Oct-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(trp): report argument errors before bailing out" into integration |