xref: /rk3399_ARM-atf/plat/xilinx/common/plat_clkfunc.c (revision 7623e085cb5396054b72f1ea3f02e8c7a34568b5)
1 /*
2  * Copyright (c) 2023-2024, Advanced Micro Devices, Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #include <common/debug.h>
7 #include <lib/mmio.h>
8 #include <plat/common/platform.h>
9 
10 #include <platform_def.h>
11 #include <plat_clkfunc.h>
12 #include <plat_private.h>
13 
14 uint32_t plat_get_syscnt_freq2(void)
15 {
16 	uint32_t counter_freq = 0;
17 	uint32_t ret = 0;
18 
19 	counter_freq = mmio_read_32(IOU_SCNTRS_BASE +
20 				    IOU_SCNTRS_BASE_FREQ_OFFSET);
21 	if (counter_freq != 0U) {
22 		ret = counter_freq;
23 	} else {
24 		INFO("Indicates counter frequency %dHz setting to %dHz\n",
25 		     counter_freq, cpu_clock);
26 		ret = cpu_clock;
27 	}
28 
29 	return ret;
30 }
31 
32 void set_cnt_freq(void)
33 {
34 	uint64_t counter_freq;
35 
36 	/* Configure counter frequency */
37 	counter_freq = read_cntfrq_el0();
38 	if (counter_freq == 0U) {
39 		write_cntfrq_el0(plat_get_syscnt_freq2());
40 	}
41 }
42