| f7e7ea1f | 22-Aug-2024 |
Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> |
feat(imx95): implement a semaphore for GIC quiescing
As there is no way to reset the GIC on iMX95, SM(System Controller)
needs to quiesce the GIC using the GIC waker. But AP can also be
touching GIC
feat(imx95): implement a semaphore for GIC quiescing
As there is no way to reset the GIC on iMX95, SM(System Controller)
needs to quiesce the GIC using the GIC waker. But AP can also be
touching GIC waker register during entry/exit from low power modes.
Add a semaphore to provide a critical section for GIC waker. The last
two words in the TF-A MU 1K SRAM space is used to hold the semaphore
(follow the Peterson'salgorithm for mutual exclusion).
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ic5d696ac83668e72d9c3204d7ec047ac9f751e94
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| 7c0f67a1 | 18-Jun-2025 |
Jacky Bai <ping.bai@nxp.com> |
refactor(imx): drop the __dead2 attribute
Drop the __dead2 attribute to make sure these functions can be
implemented as no dead.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I93129cdc6dae
refactor(imx): drop the __dead2 attribute
Drop the __dead2 attribute to make sure these functions can be
implemented as no dead.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I93129cdc6daea494ac5dd6868a05d97eaf1a610c
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| 108146ce | 13-Mar-2024 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
fix(imx): disable DRAM retention by default on i.MX8MQ
Building the default upstream configuration for the imx8mq-evk is no longer
possible: The linker will complain that the TF-A image will no long
fix(imx): disable DRAM retention by default on i.MX8MQ
Building the default upstream configuration for the imx8mq-evk is no longer
possible: The linker will complain that the TF-A image will no longer
fit On-Chip SRAM.
In order to make the i.MX8MQ Image buildable again, let's make the DRAM
retention feature optional: It was added in v2.9 and it's possible to
boot the systems without it. Users that make space elsewhere and wish to
enable it can use the newly introduced IMX_DRAM_RETENTION parameter to
configure it. The parameter is added to all i.MX8M variants, but only
for i.MX8MQ, we disable it by default, as that's the one that currently
has binary size problems.
Change-Id: I714f8ea96f18154db02390ba500f4a2dc5329ee7
Fixes: dd108c3c1fe3 ("feat(imx8mq): add the dram retention support for imx8mq")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| bcca70b9 | 27-Jul-2021 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8ulp): enable 512KB cache after resume on imx8ulp
The L2 cache size config will be reset to default 256KB,
So we need to switch to 512KB after resume to make sure
the L2 cache size is same a
feat(imx8ulp): enable 512KB cache after resume on imx8ulp
The L2 cache size config will be reset to default 256KB,
So we need to switch to 512KB after resume to make sure
the L2 cache size is same as before suspend.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: Ifd9b3e01829fbd7b1ae4ba00611359330f1a4f83
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