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Searched refs:_VPU_Write2Byte (Results 1 – 25 of 62) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/vpu/
H A DhalVPU.c315 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_CPUSetting()
318 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_CPUSetting()
319 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_CPUSetting()
320 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_CPUSetting()
321 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_CPUSetting()
322 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/vpu/
H A DhalVPU.c315 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_CPUSetting()
318 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_CPUSetting()
319 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_CPUSetting()
320 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_CPUSetting()
321 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_CPUSetting()
322 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/vpu/
H A DhalVPU.c315 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_CPUSetting()
318 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_CPUSetting()
319 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_CPUSetting()
320 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_CPUSetting()
321 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_CPUSetting()
322 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/vpu/
H A DhalVPU.c315 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_CPUSetting()
318 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_CPUSetting()
319 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_CPUSetting()
320 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_CPUSetting()
321 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_CPUSetting()
322 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/vpu/
H A DhalVPU.c315 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_CPUSetting()
318 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_CPUSetting()
319 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_CPUSetting()
320 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_CPUSetting()
321 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_CPUSetting()
322 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/vpu/
H A DhalVPU.c315 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_CPUSetting()
318 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_CPUSetting()
319 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_CPUSetting()
320 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_CPUSetting()
321 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_CPUSetting()
322 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/vpu_ex/
H A DhalVPU_EX.c1887 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
1890 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
1891 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
1892 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_EX_CPUSetting()
1893 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
1894 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_EX_CPUSetting()
1920 _VPU_Write2Byte(MAU1_REG_REGION_MASK0_L, (MS_U16)0xffff); in HAL_VPU_EX_CPUSetting()
1921 _VPU_Write2Byte(MAU1_REG_REGION_MASK0_H, (MS_U16)0xffff); in HAL_VPU_EX_CPUSetting()
1922 _VPU_Write2Byte(MAU1_REG_REGION_START0_L, (MS_U16)(u32BSStartDiv8 & 0xffff)); in HAL_VPU_EX_CPUSetting()
1923 _VPU_Write2Byte(MAU1_REG_REGION_START0_H, (MS_U16)((u32BSStartDiv8 >> 16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/vpu_ex/
H A DhalVPU_EX.c1887 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
1890 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
1891 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
1892 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_EX_CPUSetting()
1893 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
1894 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_EX_CPUSetting()
1920 _VPU_Write2Byte(MAU1_REG_REGION_MASK0_L, (MS_U16)0xffff); in HAL_VPU_EX_CPUSetting()
1921 _VPU_Write2Byte(MAU1_REG_REGION_MASK0_H, (MS_U16)0xffff); in HAL_VPU_EX_CPUSetting()
1922 _VPU_Write2Byte(MAU1_REG_REGION_START0_L, (MS_U16)(u32BSStartDiv8 & 0xffff)); in HAL_VPU_EX_CPUSetting()
1923 _VPU_Write2Byte(MAU1_REG_REGION_START0_H, (MS_U16)((u32BSStartDiv8 >> 16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DhalVPU_EX.c1182 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAStart & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1183 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAStart >> 16)); in _VPU_EX_InitAddressLimiter()
1186 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAStart & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1187 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAStart >> 16)); in _VPU_EX_InitAddressLimiter()
1191 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAEnd & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1192 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAEnd >> 16)); in _VPU_EX_InitAddressLimiter()
1195 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAEnd & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1196 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAEnd >> 16)); in _VPU_EX_InitAddressLimiter()
1200 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32WriteReplaceAddr & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1201 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32WriteReplaceAddr >> 16)); in _VPU_EX_InitAddressLimiter()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DhalVPU_EX.c1181 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAStart & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1182 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAStart >> 16)); in _VPU_EX_InitAddressLimiter()
1185 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAStart & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1186 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAStart >> 16)); in _VPU_EX_InitAddressLimiter()
1190 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAEnd & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1191 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAEnd >> 16)); in _VPU_EX_InitAddressLimiter()
1194 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAEnd & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1195 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAEnd >> 16)); in _VPU_EX_InitAddressLimiter()
1199 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32WriteReplaceAddr & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1200 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32WriteReplaceAddr >> 16)); in _VPU_EX_InitAddressLimiter()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DhalVPU_EX.c1178 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAStart & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1179 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAStart >> 16)); in _VPU_EX_InitAddressLimiter()
1182 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAStart & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1183 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAStart >> 16)); in _VPU_EX_InitAddressLimiter()
1187 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAEnd & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1188 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAEnd >> 16)); in _VPU_EX_InitAddressLimiter()
1191 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_L, (MS_U16)(u32fwPAEnd & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1192 _VPU_Write2Byte(REG_VDR2_I_ACCESS_RANGE_ADDR_H, (MS_U16)(u32fwPAEnd >> 16)); in _VPU_EX_InitAddressLimiter()
1196 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_L, (MS_U16)(u32WriteReplaceAddr & 0xFFFF)); in _VPU_EX_InitAddressLimiter()
1197 _VPU_Write2Byte(REG_VDR2_D_ACCESS_RANGE_ADDR_H, (MS_U16)(u32WriteReplaceAddr >> 16)); in _VPU_EX_InitAddressLimiter()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c2404 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2408 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2409 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2410 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2411 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2412 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2413 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2416 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2417 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2422 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c2471 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2475 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2476 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2477 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2478 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2479 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2480 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2483 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2484 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2489 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c2434 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2438 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2439 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2440 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2441 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2442 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2443 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2446 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2447 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2452 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c2405 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2409 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2410 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2411 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2412 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2413 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2414 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2417 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2418 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2423 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DhalVPU_EX.c2389 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2393 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2394 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2395 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2396 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2397 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2398 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2401 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2402 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2407 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c2525 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2529 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2530 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2531 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2532 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2533 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2534 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2537 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2538 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2543 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c2543 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2547 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2548 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2549 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2550 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2551 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2552 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2555 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2556 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2561 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DhalVPU_EX.c2691 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2695 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2696 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2697 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2698 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2699 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2700 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2703 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2704 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2709 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A DhalVPU_EX.c2309 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2312 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2313 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2314 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_EX_CPUSetting()
2315 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2316 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_EX_CPUSetting()
2324 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2325 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2327 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2328 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DhalVPU_EX.c2710 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2714 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2715 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2716 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2717 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2718 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2719 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2722 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L, (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2723 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H, (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2728 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A DhalVPU_EX.c2449 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
2452 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
2453 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
2454 _VPU_Write2Byte(VPU_REG_IO1_BASE, 0xf900); in HAL_VPU_EX_CPUSetting()
2455 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0xf000); in HAL_VPU_EX_CPUSetting()
2456 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
2457 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0xf200); in HAL_VPU_EX_CPUSetting()
2465 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2466 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2468 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DhalVPU_EX.c2824 _VPU_Write2Byte(VPU_REG_SPI_BASE(u8VPU), 0xC000); in HAL_VPU_EX_CPUSetting()
2827 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L(u8VPU), 0xc000); in HAL_VPU_EX_CPUSetting()
2828 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H(u8VPU), 0xffff); in HAL_VPU_EX_CPUSetting()
2829 _VPU_Write2Byte(VPU_REG_IO1_BASE(u8VPU), 0xf900); // UART BASE in HAL_VPU_EX_CPUSetting()
2830 _VPU_Write2Byte(VPU_REG_IO2_BASE(u8VPU), 0xf000); in HAL_VPU_EX_CPUSetting()
2831 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L(u8VPU), 0x0000); in HAL_VPU_EX_CPUSetting()
2832 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H(u8VPU), 0xf200); in HAL_VPU_EX_CPUSetting()
2835 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_L(u8VPU), (MS_U16)(VPU_IQMEM_BASE & 0x0000ffff)); in HAL_VPU_EX_CPUSetting()
2836 _VPU_Write2Byte(VPU_REG_IQMEM_BASE_H(u8VPU), (MS_U16)((VPU_IQMEM_BASE>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2841 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L(u8VPU), (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/vpu_ex/
H A DhalVPU_EX.c1856 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
1859 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
1860 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
1861 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_EX_CPUSetting()
1862 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
1863 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_EX_CPUSetting()
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
1872 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1873 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/vpu_ex/
H A DhalVPU_EX.c1856 _VPU_Write2Byte(VPU_REG_SPI_BASE, 0xC000); in HAL_VPU_EX_CPUSetting()
1859 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_L, 0xc000); in HAL_VPU_EX_CPUSetting()
1860 _VPU_Write2Byte(VPU_REG_DQMEM_MASK_H, 0xffff); in HAL_VPU_EX_CPUSetting()
1861 _VPU_Write2Byte(VPU_REG_IO2_BASE, 0x8000); in HAL_VPU_EX_CPUSetting()
1862 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_L, 0x0000); in HAL_VPU_EX_CPUSetting()
1863 _VPU_Write2Byte(VPU_REG_DQMEM_BASE_H, 0x2000); in HAL_VPU_EX_CPUSetting()
1869 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1870 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
1872 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
1873 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]

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