MUX_MODE2 (reference) in projects: OK3568_Linux_fs

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Searched refs:MUX_MODE2 (Results 1 – 25 of 57) sorted by relevance

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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A D	am437x-cm-t43.dts	56 AM4372_IOPAD(0x820, PIN_INPUT_PULLUP \| MUX_MODE2) /* gpmc_ad8.mmc1_dat0 / 57 AM4372_IOPAD(0x824, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad9.mmc1_dat1 / 58 AM4372_IOPAD(0x828, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad10.mmc1_dat2 / 59 AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad11.mmc1_dat3 / 60 AM4372_IOPAD(0x830, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad12.mmc1_dat4 / 61 AM4372_IOPAD(0x834, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad13.mmc1_dat5 / 62 AM4372_IOPAD(0x838, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad14.mmc1_dat6 / 63 AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_ad15.mmc1_dat7 / 64 AM4372_IOPAD(0x880, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_csn1.mmc1_clk / 65 AM4372_IOPAD(0x884, PIN_INPUT_PULLUP \| MUX_MODE2) / gpmc_csn2.mmc1_cmd */ [all …]
H A D	am335x-sancloud-bbe.dts	23 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl / 24 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 25 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd3.rgmii1_td3 / 26 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd2.rgmii1_td2 / 27 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd1.rgmii1_td1 / 28 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd0.rgmii1_td0 / 29 …AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txclk.rgmii1_tclk / 30 … AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 31 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 32 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd2.rgmii1_rd2 */ [all …]
H A D	am335x-pcm-953.dtsi	92 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart1_rxd.dcan1_tx_mux2 / 93 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2) / uart1_txd.dcan1_rx_mux2 / 108 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a0.rgmii2_tctl / 109 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a1.rgmii2_rctl / 110 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a2.rgmii2_td3 / 111 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a3.rgmii2_td2 / 112 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a4.rgmii2_td1 / 113 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a5.rgmii2_td0 / 114 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a6.rgmii2_tclk / 115 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a7.rgmii2_rclk */ [all …]
H A D	am335x-baltos.dtsi	53 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_ad8.mmc1_dat0_mux0 / 54 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE2) / gpmc_ad9.mmc1_dat1_mux0 / 55 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE2) / gpmc_ad10.mmc1_dat2_mux0… 56 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_ad11.mmc1_dat3_mux0… 57 …AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk_mux0 … 58 …AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd_mux0 … 77 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE2) /* spi0_d1.i2c1_sda_mux3 / 78 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE2) / spi0_cs0.i2c1_scl_mux3 / 102 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / gpmc_a0.rgmii2_tctl / 103 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a1.rgmii2_rctl */ [all …]
H A D	am335x-cm-t335.dts	101 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2) 103 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) 154 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) 156 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2) 163 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2) 165 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2) 179 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 181 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) 183 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 185 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) [all …]
H A D	am335x-evmsk.dts	319 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl / 320 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 321 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd3.rgmii1_td3 / 322 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd2.rgmii1_td2 / 323 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd1.rgmii1_td1 / 324 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd0.rgmii1_td0 / 325 …AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txclk.rgmii1_tclk / 326 … AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 327 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 328 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd2.rgmii1_rd2 */ [all …]
H A D	omap3-pandora-600mhz.dts	43 OMAP3430_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_clk.sdmmc3_clk / 44 OMAP3430_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_ctl.sdmmc3_cmd / 45 OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d3.sdmmc3_dat3 / 46 OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d4.sdmmc3_dat0 / 47 OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d5.sdmmc3_dat1 / 48 OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d6.sdmmc3_dat2 */
H A D	omap3-pandora-1ghz.dts	43 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_clk.sdmmc3_clk / 44 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_ctl.sdmmc3_cmd / 45 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d3.sdmmc3_dat3 / 46 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d4.sdmmc3_dat0 / 47 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d5.sdmmc3_dat1 / 48 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d6.sdmmc3_dat2 */
H A D	am437x-sk-evm.dts	189 AM4372_IOPAD(0x95c, PIN_INPUT \| SLEWCTRL_FAST \| MUX_MODE2) /* spi0_cs0.i2c1_scl / 190 AM4372_IOPAD(0x958, PIN_INPUT \| SLEWCTRL_FAST \| MUX_MODE2) / spi0_d1.i2c1_sda / 268 AM4372_IOPAD(0x92c, PIN_OUTPUT \| MUX_MODE2) / mii1_txclk.rmii1_tclk / 269 AM4372_IOPAD(0x914, PIN_OUTPUT \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 270 AM4372_IOPAD(0x928, PIN_OUTPUT \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 271 AM4372_IOPAD(0x924, PIN_OUTPUT \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 272 AM4372_IOPAD(0x920, PIN_OUTPUT \| MUX_MODE2) / mii1_txd0.rgmii1_td2 / 273 AM4372_IOPAD(0x91c, PIN_OUTPUT \| MUX_MODE2) / mii1_txd1.rgmii1_td3 / 274 AM4372_IOPAD(0x930, PIN_INPUT \| MUX_MODE2) / mii1_rxclk.rmii1_rclk / 275 AM4372_IOPAD(0x918, PIN_INPUT \| MUX_MODE2) / mii1_rxdv.rgmii1_rctl */ [all …]
H A D	am335x-osd3358-sm-red.dts	76 …AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_a… 302 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl / 303 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxdv.rgmii1_rctl */ 304 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 305 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 306 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 307 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 308 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 309 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) 310 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) [all …]
H A D	am437x-idk-evm.dts	236 AM4372_IOPAD(0x908, PIN_INPUT \| MUX_MODE2) /* mii1_col.spi1_sclk / 237 AM4372_IOPAD(0x910, PIN_INPUT \| MUX_MODE2) / mii1_rx_er.spi1_d1 / 238 AM4372_IOPAD(0x944, PIN_OUTPUT \| MUX_MODE2) / rmii1_ref_clk.spi1_cs0 / 260 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rgmii1_tclk / 261 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 262 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 263 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 264 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td2 / 265 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td3 / 266 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rmii1_rclk */ [all …]
H A D	am437x-sbc-t43.dts	`34 AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP \| MUX_MODE2) /* cam0 hd -> DSS DATA 23 / 35 AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP \| MUX_MODE2) 36 AM4372_IOPAD(0x9b8, PIN_OUTPUT_PULLUP \| MUX_MODE2) 37 AM4372_IOPAD(0x9bc, PIN_OUTPUT_PULLUP \| MUX_MODE2) 38 AM4372_IOPAD(0x9c0, PIN_OUTPUT_PULLUP \| MUX_MODE2) 39 AM4372_IOPAD(0x9c4, PIN_OUTPUT_PULLUP \| MUX_MODE2) 40 AM4372_IOPAD(0x9c8, PIN_OUTPUT_PULLUP \| MUX_MODE2) 41 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP \| MUX_MODE2) / cam1 data 9 -> DSS DATA 16 */`
H A D	am335x-pepper.dts	299 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl / 300 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 301 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd3.rgmii1_td3 / 302 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd2.rgmii1_td2 / 303 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd1.rgmii1_td1 / 304 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd0.rgmii1_td0 */ 305 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE2) 306 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE2) 307 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE2) 308 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE2) [all …]
H A D	am335x-evm.dts	194 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE2) /* spi0_d1.i2c1_sda / 195 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE2) / spi0_cs0.i2c1_scl / 250 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txen.rgmii1_tctl / 251 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 252 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd3.rgmii1_td3 / 253 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd2.rgmii1_td2 / 254 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd1.rgmii1_td1 / 255 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txd0.rgmii1_td0 / 256 …AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) / mii1_txclk.rgmii1_tclk / 257 … AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxclk.rgmii1_rclk */ [all …]
H A D	am335x-baltos-ir5221.dts	`30 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* uart0_ctsn.dcan1_tx_mux0 / 31 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) / uart0_rtsn.dcan1_rx_mux0 / 52 …AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) / i2c0_sda.uart2_ctsn_mux… 53 …AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* i2c0_scl.uart2_rtsn_mu…`
H A D	am437x-gp-evm.dts	171 AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP \| SLEWCTRL_FAST \| MUX_MODE2) /* spi0_cs0.i2c1_scl / 172 AM4372_IOPAD(0x958, PIN_INPUT_PULLUP \| SLEWCTRL_FAST \| MUX_MODE2) / spi0_d1.i2c1_sda / 197 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_txen / 198 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxdv.rgmii1_rxctl / 199 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_txd3 / 200 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_txd2 / 201 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_txd1 / 202 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_txd0 / 203 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rmii1_tclk / 204 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rmii1_rclk */ [all …]
H A D	omap3-zoom3.dts	`123 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_clk.sdmmc3_clk / 124 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d4.sdmmc3_dat0 / 125 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d5.sdmmc3_dat1 / 126 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d6.sdmmc3_dat2 / 127 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d3.sdmmc3_dat3 */`
H A D	am335x-pdu001.dts	102 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE2) /* spi0_d1.i2c1_sda / 103 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE2) / spi0_cs0.i2c1_scl / 109 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE2) / spi0_clk.i2c2_sda / 110 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE2) / spi0_d0.i2c2_scl / 215 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) / gpmc_csn1.mmc1_clk / 216 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) / gpmc_csn2.mmc1_cmd / 249 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) / uart1_ctsn.d_can0_tx / 250 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE2) / uart1_rtsn.d_can0_rx */
H A D	omap3-echo.dts	326 OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_clk.sdmmc3_clk / 327 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_ctl.sdmmc3_cmd / 328 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d3.sdmmc3_dat3 / 329 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d4.sdmmc3_dat0 / 330 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d5.sdmmc3_dat1 / 331 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP \| MUX_MODE2) / etk_d6.sdmmc3_dat2 */
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D	am437x-sk-evm.dts	168 0x15c (PIN_INPUT \| SLEWCTRL_FAST \| MUX_MODE2) /* spi0_cs0.i2c1_scl / 169 0x158 (PIN_INPUT \| SLEWCTRL_FAST \| MUX_MODE2) / spi0_d1.i2c1_sda / 241 0x12c (PIN_OUTPUT \| MUX_MODE2) / mii1_txclk.rmii1_tclk / 242 0x114 (PIN_OUTPUT \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 243 0x128 (PIN_OUTPUT \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 244 0x124 (PIN_OUTPUT \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 245 0x120 (PIN_OUTPUT \| MUX_MODE2) / mii1_txd0.rgmii1_td2 / 246 0x11c (PIN_OUTPUT \| MUX_MODE2) / mii1_txd1.rgmii1_td3 / 247 0x130 (PIN_INPUT \| MUX_MODE2) / mii1_rxclk.rmii1_rclk / 248 0x118 (PIN_INPUT \| MUX_MODE2) / mii1_rxdv.rgmii1_rctl */ [all …]
H A D	am335x-evmsk.dts	324 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txen.rgmii1_tctl / 325 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 326 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd3.rgmii1_td3 / 327 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd2.rgmii1_td2 / 328 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 329 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 330 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rgmii1_tclk / 331 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 332 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 333 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd2.rgmii1_rd2 */ [all …]
H A D	am335x-pxm2.dtsi	384 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txen.rgmii1_tctl / 385 0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 386 0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd3.rgmii1_td3 / 387 0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd2.rgmii1_td2 / 388 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 389 0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 390 0x12c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rgmii1_tclk / 391 0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 392 0x134 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 393 0x138 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd2.rgmii1_rd2 */ [all …]
H A D	am437x-idk-evm.dts	194 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) /* mii1_txclk.rgmii1_tclk / 195 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 196 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 197 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 198 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td2 / 199 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td3 / 200 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rmii1_rclk / 201 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 202 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd0.rgmii1_rd0 / 203 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd1.rgmii1_rd1 */ [all …]
H A D	am335x-evm.dts	187 0x158 (PIN_INPUT_PULLUP \| MUX_MODE2) /* spi0_d1.i2c1_sda / 188 0x15c (PIN_INPUT_PULLUP \| MUX_MODE2) / spi0_cs0.i2c1_scl / 243 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_tctl / 244 0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 245 0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd3.rgmii1_td3 / 246 0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd2.rgmii1_td2 / 247 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_td1 / 248 0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_td0 / 249 0x12c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rgmii1_tclk / 250 0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rgmii1_rclk */ [all …]
H A D	am437x-gp-evm.dts	148 0x15c (PIN_INPUT_PULLUP \| SLEWCTRL_FAST \| MUX_MODE2) /* spi0_cs0.i2c1_scl / 149 0x158 (PIN_INPUT_PULLUP \| SLEWCTRL_FAST \| MUX_MODE2) / spi0_d1.i2c1_sda / 174 0x114 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txen.rgmii1_txen / 175 0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxdv.rgmii1_rxctl / 176 0x11c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_txd3 / 177 0x120 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_txd2 / 178 0x124 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd1.rgmii1_txd1 / 179 0x128 (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txd0.rgmii1_txd0 / 180 0x12c (PIN_OUTPUT_PULLDOWN \| MUX_MODE2) / mii1_txclk.rmii1_tclk / 181 0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rmii1_rclk */ [all …]

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