xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/am335x-pepper.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include "am33xx.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Gumstix Pepper";
12*4882a593Smuzhiyun	compatible = "gumstix,am335x-pepper", "ti,am33xx";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	cpus {
15*4882a593Smuzhiyun		cpu@0 {
16*4882a593Smuzhiyun			cpu0-supply = <&dcdc3_reg>;
17*4882a593Smuzhiyun		};
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory@80000000 {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x80000000 0x20000000>; /* 512 MB */
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	buttons: user_buttons {
26*4882a593Smuzhiyun		compatible = "gpio-keys";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	leds: user_leds {
30*4882a593Smuzhiyun		compatible = "gpio-leds";
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	panel: lcd_panel {
34*4882a593Smuzhiyun		compatible = "ti,tilcdc,panel";
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	sound: sound_iface {
38*4882a593Smuzhiyun		compatible = "ti,da830-evm-audio";
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	vbat: fixedregulator0 {
42*4882a593Smuzhiyun		compatible = "regulator-fixed";
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	v3v3c_reg: fixedregulator1 {
46*4882a593Smuzhiyun		compatible = "regulator-fixed";
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	vdd5_reg: fixedregulator2 {
50*4882a593Smuzhiyun		compatible = "regulator-fixed";
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun/* I2C Busses */
55*4882a593Smuzhiyun&i2c0 {
56*4882a593Smuzhiyun	status = "okay";
57*4882a593Smuzhiyun	pinctrl-names = "default";
58*4882a593Smuzhiyun	pinctrl-0 = <&i2c0_pins>;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	clock-frequency = <400000>;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	tps: tps@24 {
63*4882a593Smuzhiyun		reg = <0x24>;
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	eeprom: eeprom@50 {
67*4882a593Smuzhiyun		compatible = "atmel,24c256";
68*4882a593Smuzhiyun		reg = <0x50>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	audio_codec: tlv320aic3106@1b {
72*4882a593Smuzhiyun		compatible = "ti,tlv320aic3106";
73*4882a593Smuzhiyun		reg = <0x1b>;
74*4882a593Smuzhiyun		ai3x-micbias-vg = <0x2>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	accel: lis331dlh@1d {
78*4882a593Smuzhiyun		compatible = "st,lis3lv02d";
79*4882a593Smuzhiyun		reg = <0x1d>;
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun&i2c1 {
84*4882a593Smuzhiyun	status = "okay";
85*4882a593Smuzhiyun	pinctrl-names = "default";
86*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins>;
87*4882a593Smuzhiyun	clock-frequency = <400000>;
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&am33xx_pinmux {
91*4882a593Smuzhiyun	i2c0_pins: pinmux_i2c0 {
92*4882a593Smuzhiyun		pinctrl-single,pins = <
93*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
94*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
95*4882a593Smuzhiyun		>;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun	i2c1_pins: pinmux_i2c1 {
98*4882a593Smuzhiyun		pinctrl-single,pins = <
99*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE3)	/* mii1_crs,i2c1_sda */
100*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE3)	/* mii1_rxerr,i2c1_scl */
101*4882a593Smuzhiyun		>;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun/* Accelerometer */
106*4882a593Smuzhiyun&accel {
107*4882a593Smuzhiyun	pinctrl-names = "default";
108*4882a593Smuzhiyun	pinctrl-0 = <&accel_pins>;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun	Vdd-supply = <&ldo3_reg>;
111*4882a593Smuzhiyun	Vdd_IO-supply = <&ldo3_reg>;
112*4882a593Smuzhiyun	st,irq1-click;
113*4882a593Smuzhiyun	st,wakeup-x-lo;
114*4882a593Smuzhiyun	st,wakeup-x-hi;
115*4882a593Smuzhiyun	st,wakeup-y-lo;
116*4882a593Smuzhiyun	st,wakeup-y-hi;
117*4882a593Smuzhiyun	st,wakeup-z-lo;
118*4882a593Smuzhiyun	st,wakeup-z-hi;
119*4882a593Smuzhiyun	st,min-limit-x = <92>;
120*4882a593Smuzhiyun	st,max-limit-x = <14>;
121*4882a593Smuzhiyun	st,min-limit-y = <14>;
122*4882a593Smuzhiyun	st,max-limit-y = <92>;
123*4882a593Smuzhiyun	st,min-limit-z = <92>;
124*4882a593Smuzhiyun	st,max-limit-z = <14>;
125*4882a593Smuzhiyun};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun&am33xx_pinmux {
128*4882a593Smuzhiyun	accel_pins: pinmux_accel {
129*4882a593Smuzhiyun		pinctrl-single,pins = <
130*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT, MUX_MODE7)   /* gpmc_wen.gpio2_4 */
131*4882a593Smuzhiyun		>;
132*4882a593Smuzhiyun	};
133*4882a593Smuzhiyun};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun/* Audio */
136*4882a593Smuzhiyun&audio_codec {
137*4882a593Smuzhiyun	status = "okay";
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
140*4882a593Smuzhiyun	AVDD-supply = <&ldo3_reg>;
141*4882a593Smuzhiyun	IOVDD-supply = <&ldo3_reg>;
142*4882a593Smuzhiyun	DRVDD-supply = <&ldo3_reg>;
143*4882a593Smuzhiyun	DVDD-supply = <&dcdc1_reg>;
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&sound {
147*4882a593Smuzhiyun	ti,model = "AM335x-EVM";
148*4882a593Smuzhiyun	ti,audio-codec = <&audio_codec>;
149*4882a593Smuzhiyun	ti,mcasp-controller = <&mcasp0>;
150*4882a593Smuzhiyun	ti,codec-clock-rate = <12000000>;
151*4882a593Smuzhiyun	ti,audio-routing =
152*4882a593Smuzhiyun		"Headphone Jack",	"HPLOUT",
153*4882a593Smuzhiyun		"Headphone Jack",	"HPROUT",
154*4882a593Smuzhiyun		"MIC3L",		"Mic3L Switch";
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&mcasp0 {
158*4882a593Smuzhiyun	status = "okay";
159*4882a593Smuzhiyun	pinctrl-names = "default";
160*4882a593Smuzhiyun	pinctrl-0 = <&audio_pins>;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun	op-mode = <0>;	/* MCASP_ISS_MODE */
163*4882a593Smuzhiyun	tdm-slots = <2>;
164*4882a593Smuzhiyun	serial-dir = <
165*4882a593Smuzhiyun		1 2 0 0
166*4882a593Smuzhiyun		0 0 0 0
167*4882a593Smuzhiyun		0 0 0 0
168*4882a593Smuzhiyun		0 0 0 0
169*4882a593Smuzhiyun	>;
170*4882a593Smuzhiyun	tx-num-evt = <1>;
171*4882a593Smuzhiyun	rx-num-evt = <1>;
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&am33xx_pinmux {
175*4882a593Smuzhiyun	audio_pins: pinmux_audio {
176*4882a593Smuzhiyun		pinctrl-single,pins = <
177*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
178*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
179*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
180*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
181*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0)
182*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)	/* gpmc_a0.gpio1_16 */
183*4882a593Smuzhiyun		>;
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun/* Display: 24-bit LCD Screen */
188*4882a593Smuzhiyun&panel {
189*4882a593Smuzhiyun	status = "okay";
190*4882a593Smuzhiyun	pinctrl-names = "default";
191*4882a593Smuzhiyun	pinctrl-0 = <&lcd_pins>;
192*4882a593Smuzhiyun	panel-info {
193*4882a593Smuzhiyun		ac-bias = <255>;
194*4882a593Smuzhiyun		ac-bias-intrpt = <0>;
195*4882a593Smuzhiyun		dma-burst-sz = <16>;
196*4882a593Smuzhiyun		bpp = <32>;
197*4882a593Smuzhiyun		fdd = <0x80>;
198*4882a593Smuzhiyun		sync-edge = <0>;
199*4882a593Smuzhiyun		sync-ctrl = <1>;
200*4882a593Smuzhiyun		raster-order = <0>;
201*4882a593Smuzhiyun		fifo-th = <0>;
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun	display-timings {
204*4882a593Smuzhiyun		native-mode = <&timing0>;
205*4882a593Smuzhiyun		timing0: 480x272 {
206*4882a593Smuzhiyun			clock-frequency = <18400000>;
207*4882a593Smuzhiyun			hactive = <480>;
208*4882a593Smuzhiyun			vactive = <272>;
209*4882a593Smuzhiyun			hfront-porch = <8>;
210*4882a593Smuzhiyun			hback-porch = <4>;
211*4882a593Smuzhiyun			hsync-len = <41>;
212*4882a593Smuzhiyun			vfront-porch = <4>;
213*4882a593Smuzhiyun			vback-porch = <2>;
214*4882a593Smuzhiyun			vsync-len = <10>;
215*4882a593Smuzhiyun			hsync-active = <1>;
216*4882a593Smuzhiyun			vsync-active = <1>;
217*4882a593Smuzhiyun		};
218*4882a593Smuzhiyun	};
219*4882a593Smuzhiyun};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun&lcdc {
222*4882a593Smuzhiyun	status = "okay";
223*4882a593Smuzhiyun};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun&am33xx_pinmux {
226*4882a593Smuzhiyun	lcd_pins: pinmux_lcd {
227*4882a593Smuzhiyun		pinctrl-single,pins = <
228*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
229*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
230*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
231*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
232*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
233*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
234*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
235*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
236*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
237*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
238*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
239*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
240*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
241*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
242*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
243*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
244*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad8.lcd_data16 */
245*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad9.lcd_data17 */
246*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad10.lcd_data18 */
247*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad11.lcd_data19 */
248*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad12.lcd_data20 */
249*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad13.lcd_data21 */
250*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad14.lcd_data22 */
251*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)	/* gpmc_ad15.lcd_data23 */
252*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
253*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
254*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
255*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
256*4882a593Smuzhiyun			/* Display Enable */
257*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_a11.gpio1_27 */
258*4882a593Smuzhiyun		>;
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun/* Ethernet */
263*4882a593Smuzhiyun&cpsw_emac0 {
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun	phy-handle = <&ethphy0>;
266*4882a593Smuzhiyun	phy-mode = "rgmii";
267*4882a593Smuzhiyun};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun&cpsw_emac1 {
270*4882a593Smuzhiyun	status = "okay";
271*4882a593Smuzhiyun	phy-handle = <&ethphy1>;
272*4882a593Smuzhiyun	phy-mode = "rgmii";
273*4882a593Smuzhiyun};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun&davinci_mdio {
276*4882a593Smuzhiyun	status = "okay";
277*4882a593Smuzhiyun	pinctrl-names = "default";
278*4882a593Smuzhiyun	pinctrl-0 = <&mdio_pins>;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
281*4882a593Smuzhiyun		reg = <0>;
282*4882a593Smuzhiyun	};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun	ethphy1: ethernet-phy@1 {
285*4882a593Smuzhiyun		reg = <1>;
286*4882a593Smuzhiyun	};
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&mac {
290*4882a593Smuzhiyun	status = "okay";
291*4882a593Smuzhiyun	pinctrl-names = "default";
292*4882a593Smuzhiyun	pinctrl-0 = <&ethernet_pins>;
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun&am33xx_pinmux {
297*4882a593Smuzhiyun	ethernet_pins: pinmux_ethernet {
298*4882a593Smuzhiyun		pinctrl-single,pins = <
299*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
300*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
301*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
302*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
303*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
304*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
305*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE2)
306*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE2)
307*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE2)
308*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE2)
309*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE2)
310*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE2)
311*4882a593Smuzhiyun			/* ethernet interrupt */
312*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE7)	/* rmii2_refclk.gpio0_29 */
313*4882a593Smuzhiyun			/* ethernet PHY nReset */
314*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* mii1_col.gpio3_0 */
315*4882a593Smuzhiyun		>;
316*4882a593Smuzhiyun	};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun	mdio_pins: pinmux_mdio {
319*4882a593Smuzhiyun		pinctrl-single,pins = <
320*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
321*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
322*4882a593Smuzhiyun		>;
323*4882a593Smuzhiyun	};
324*4882a593Smuzhiyun};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun/* MMC */
327*4882a593Smuzhiyun&mmc1 {
328*4882a593Smuzhiyun	/* Bootable SD card slot */
329*4882a593Smuzhiyun	status = "okay";
330*4882a593Smuzhiyun	vmmc-supply = <&ldo3_reg>;
331*4882a593Smuzhiyun	bus-width = <4>;
332*4882a593Smuzhiyun	pinctrl-names = "default";
333*4882a593Smuzhiyun	pinctrl-0 = <&sd_pins>;
334*4882a593Smuzhiyun	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
335*4882a593Smuzhiyun};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun&mmc2 {
338*4882a593Smuzhiyun	/* eMMC (not populated) on MMC #2 */
339*4882a593Smuzhiyun	status = "disabled";
340*4882a593Smuzhiyun	pinctrl-names = "default";
341*4882a593Smuzhiyun	pinctrl-0 = <&emmc_pins>;
342*4882a593Smuzhiyun	vmmc-supply = <&ldo3_reg>;
343*4882a593Smuzhiyun	bus-width = <8>;
344*4882a593Smuzhiyun	non-removable;
345*4882a593Smuzhiyun};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun&mmc3 {
348*4882a593Smuzhiyun	/* Wifi & Bluetooth on MMC #3 */
349*4882a593Smuzhiyun	status = "okay";
350*4882a593Smuzhiyun	pinctrl-names = "default";
351*4882a593Smuzhiyun	pinctrl-0 = <&wireless_pins>;
352*4882a593Smuzhiyun	vmmmc-supply = <&v3v3c_reg>;
353*4882a593Smuzhiyun	bus-width = <4>;
354*4882a593Smuzhiyun	non-removable;
355*4882a593Smuzhiyun	dmas = <&edma_xbar 12 0 1
356*4882a593Smuzhiyun		&edma_xbar 13 0 2>;
357*4882a593Smuzhiyun	dma-names = "tx", "rx";
358*4882a593Smuzhiyun};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&am33xx_pinmux {
362*4882a593Smuzhiyun	sd_pins: pinmux_sd_card {
363*4882a593Smuzhiyun		pinctrl-single,pins = <
364*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
365*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
366*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
367*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
368*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
369*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
370*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)		/* spi0_cs1.gpio0_6 */
371*4882a593Smuzhiyun		>;
372*4882a593Smuzhiyun	};
373*4882a593Smuzhiyun	emmc_pins: pinmux_emmc {
374*4882a593Smuzhiyun		pinctrl-single,pins = <
375*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn1.mmc1_clk */
376*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */
377*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad0.mmc1_dat0 */
378*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad1.mmc1_dat1 */
379*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad2.mmc1_dat2 */
380*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad3.mmc1_dat3 */
381*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad4.mmc1_dat4 */
382*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad5.mmc1_dat5 */
383*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad6.mmc1_dat6 */
384*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)	/* gpmc_ad7.mmc1_dat7 */
385*4882a593Smuzhiyun			/* EMMC nReset */
386*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
387*4882a593Smuzhiyun		>;
388*4882a593Smuzhiyun	};
389*4882a593Smuzhiyun	wireless_pins: pinmux_wireless {
390*4882a593Smuzhiyun		pinctrl-single,pins = <
391*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a1.mmc2_dat0 */
392*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a2.mmc2_dat1 */
393*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_a3.mmc2_dat2 */
394*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ben1.mmc2_dat3 */
395*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_csn3.mmc2_cmd */
396*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_clk.mmc1_clk */
397*4882a593Smuzhiyun			/* WLAN nReset */
398*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_a8.gpio1_24 */
399*4882a593Smuzhiyun			/* WLAN nPower down */
400*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* gpmc_wait0.gpio0_30 */
401*4882a593Smuzhiyun			/* 32kHz Clock */
402*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* xdma_event_intr1.clkout2 */
403*4882a593Smuzhiyun		>;
404*4882a593Smuzhiyun	};
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun/* Power */
408*4882a593Smuzhiyun&vbat {
409*4882a593Smuzhiyun	regulator-name = "vbat";
410*4882a593Smuzhiyun	regulator-min-microvolt = <5000000>;
411*4882a593Smuzhiyun	regulator-max-microvolt = <5000000>;
412*4882a593Smuzhiyun};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun&v3v3c_reg {
415*4882a593Smuzhiyun	regulator-name = "v3v3c_reg";
416*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
417*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
418*4882a593Smuzhiyun	vin-supply = <&vbat>;
419*4882a593Smuzhiyun};
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun&vdd5_reg {
422*4882a593Smuzhiyun	regulator-name = "vdd5_reg";
423*4882a593Smuzhiyun	regulator-min-microvolt = <5000000>;
424*4882a593Smuzhiyun	regulator-max-microvolt = <5000000>;
425*4882a593Smuzhiyun	vin-supply = <&vbat>;
426*4882a593Smuzhiyun};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun/include/ "tps65217.dtsi"
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun&tps {
431*4882a593Smuzhiyun	backlight {
432*4882a593Smuzhiyun		isel = <1>; /* ISET1 */
433*4882a593Smuzhiyun		fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
434*4882a593Smuzhiyun		default-brightness = <80>;
435*4882a593Smuzhiyun	};
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun	regulators {
438*4882a593Smuzhiyun		dcdc1_reg: regulator@0 {
439*4882a593Smuzhiyun			/* VDD_1V8 system supply */
440*4882a593Smuzhiyun			regulator-always-on;
441*4882a593Smuzhiyun		};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun		dcdc2_reg: regulator@1 {
444*4882a593Smuzhiyun			/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
445*4882a593Smuzhiyun			regulator-name = "vdd_core";
446*4882a593Smuzhiyun			regulator-min-microvolt = <925000>;
447*4882a593Smuzhiyun			regulator-max-microvolt = <1150000>;
448*4882a593Smuzhiyun			regulator-boot-on;
449*4882a593Smuzhiyun			regulator-always-on;
450*4882a593Smuzhiyun		};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun		dcdc3_reg: regulator@2 {
453*4882a593Smuzhiyun			/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
454*4882a593Smuzhiyun			regulator-name = "vdd_mpu";
455*4882a593Smuzhiyun			regulator-min-microvolt = <925000>;
456*4882a593Smuzhiyun			regulator-max-microvolt = <1325000>;
457*4882a593Smuzhiyun			regulator-boot-on;
458*4882a593Smuzhiyun			regulator-always-on;
459*4882a593Smuzhiyun		};
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun		ldo1_reg: regulator@3 {
462*4882a593Smuzhiyun			/* VRTC 1.8V always-on supply */
463*4882a593Smuzhiyun			regulator-name = "vrtc,vdds";
464*4882a593Smuzhiyun			regulator-always-on;
465*4882a593Smuzhiyun		};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun		ldo2_reg: regulator@4 {
468*4882a593Smuzhiyun			/* 3.3V rail */
469*4882a593Smuzhiyun			regulator-name = "vdd_3v3aux";
470*4882a593Smuzhiyun			regulator-always-on;
471*4882a593Smuzhiyun		};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun		ldo3_reg: regulator@5 {
474*4882a593Smuzhiyun			/* VDD_3V3A 3.3V rail */
475*4882a593Smuzhiyun			regulator-name = "vdd_3v3a";
476*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
477*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
478*4882a593Smuzhiyun		};
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun		ldo4_reg: regulator@6 {
481*4882a593Smuzhiyun			/* VDD_3V3B 3.3V rail */
482*4882a593Smuzhiyun			regulator-name = "vdd_3v3b";
483*4882a593Smuzhiyun			regulator-always-on;
484*4882a593Smuzhiyun		};
485*4882a593Smuzhiyun	};
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun/* SPI Busses */
489*4882a593Smuzhiyun&spi0 {
490*4882a593Smuzhiyun	status = "okay";
491*4882a593Smuzhiyun	pinctrl-names = "default";
492*4882a593Smuzhiyun	pinctrl-0 = <&spi0_pins>;
493*4882a593Smuzhiyun};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun&am33xx_pinmux {
496*4882a593Smuzhiyun	spi0_pins: pinmux_spi0 {
497*4882a593Smuzhiyun		pinctrl-single,pins = <
498*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
499*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
500*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
501*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
502*4882a593Smuzhiyun		>;
503*4882a593Smuzhiyun	};
504*4882a593Smuzhiyun};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun/* Touch Screen */
507*4882a593Smuzhiyun&tscadc {
508*4882a593Smuzhiyun	status = "okay";
509*4882a593Smuzhiyun	tsc {
510*4882a593Smuzhiyun		ti,wires = <4>;
511*4882a593Smuzhiyun		ti,x-plate-resistance = <200>;
512*4882a593Smuzhiyun		ti,coordinate-readouts = <5>;
513*4882a593Smuzhiyun		ti,wire-config = <0x00 0x11 0x22 0x33>;
514*4882a593Smuzhiyun	};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun	adc {
517*4882a593Smuzhiyun		ti,adc-channels = <4 5 6 7>;
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun/* UARTs */
522*4882a593Smuzhiyun&uart0 {
523*4882a593Smuzhiyun	/* Serial Console */
524*4882a593Smuzhiyun	status = "okay";
525*4882a593Smuzhiyun	pinctrl-names = "default";
526*4882a593Smuzhiyun	pinctrl-0 = <&uart0_pins>;
527*4882a593Smuzhiyun};
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun&uart1 {
530*4882a593Smuzhiyun	/* Broken out to J6 header */
531*4882a593Smuzhiyun	status = "okay";
532*4882a593Smuzhiyun	pinctrl-names = "default";
533*4882a593Smuzhiyun	pinctrl-0 = <&uart1_pins>;
534*4882a593Smuzhiyun};
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun&am33xx_pinmux {
537*4882a593Smuzhiyun	uart0_pins: pinmux_uart0 {
538*4882a593Smuzhiyun		pinctrl-single,pins = <
539*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
540*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
541*4882a593Smuzhiyun		>;
542*4882a593Smuzhiyun	};
543*4882a593Smuzhiyun	uart1_pins: pinmux_uart1 {
544*4882a593Smuzhiyun		pinctrl-single,pins = <
545*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE0)
546*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
547*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
548*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
549*4882a593Smuzhiyun		>;
550*4882a593Smuzhiyun	};
551*4882a593Smuzhiyun};
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun/* USB */
554*4882a593Smuzhiyun&usb {
555*4882a593Smuzhiyun	pinctrl-names = "default";
556*4882a593Smuzhiyun	pinctrl-0 = <&usb_pins>;
557*4882a593Smuzhiyun};
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun&usb0 {
560*4882a593Smuzhiyun        dr_mode = "host";
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&usb1 {
564*4882a593Smuzhiyun        dr_mode = "host";
565*4882a593Smuzhiyun};
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun&am33xx_pinmux {
568*4882a593Smuzhiyun	usb_pins: pinmux_usb {
569*4882a593Smuzhiyun		pinctrl-single,pins = <
570*4882a593Smuzhiyun			/* USB0 Over-Current (active low) */
571*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)	/* gpmc_a9.gpio1_25 */
572*4882a593Smuzhiyun			/* USB1 Over-Current (active low) */
573*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)	/* gpmc_a10.gpio1_26 */
574*4882a593Smuzhiyun		>;
575*4882a593Smuzhiyun	};
576*4882a593Smuzhiyun};
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun/* User IO */
579*4882a593Smuzhiyun&leds {
580*4882a593Smuzhiyun	pinctrl-names = "default";
581*4882a593Smuzhiyun	pinctrl-0 = <&user_leds_pins>;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun	led0 {
584*4882a593Smuzhiyun		label = "pepper:user0:blue";
585*4882a593Smuzhiyun		gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
586*4882a593Smuzhiyun		linux,default-trigger = "none";
587*4882a593Smuzhiyun		default-state = "off";
588*4882a593Smuzhiyun	};
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun	led1 {
591*4882a593Smuzhiyun		label = "pepper:user1:red";
592*4882a593Smuzhiyun		gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
593*4882a593Smuzhiyun		linux,default-trigger = "none";
594*4882a593Smuzhiyun		default-state = "off";
595*4882a593Smuzhiyun	};
596*4882a593Smuzhiyun};
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun&buttons {
599*4882a593Smuzhiyun	pinctrl-names = "default";
600*4882a593Smuzhiyun	pinctrl-0 = <&user_buttons_pins>;
601*4882a593Smuzhiyun	#address-cells = <1>;
602*4882a593Smuzhiyun	#size-cells = <0>;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun	button0 {
605*4882a593Smuzhiyun		label = "home";
606*4882a593Smuzhiyun		linux,code = <KEY_HOME>;
607*4882a593Smuzhiyun		gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
608*4882a593Smuzhiyun		wakeup-source;
609*4882a593Smuzhiyun	};
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun	button1 {
612*4882a593Smuzhiyun		label = "menu";
613*4882a593Smuzhiyun		linux,code = <KEY_MENU>;
614*4882a593Smuzhiyun		gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
615*4882a593Smuzhiyun		wakeup-source;
616*4882a593Smuzhiyun	};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun	buttons2 {
619*4882a593Smuzhiyun		label = "power";
620*4882a593Smuzhiyun		linux,code = <KEY_POWER>;
621*4882a593Smuzhiyun		gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
622*4882a593Smuzhiyun		wakeup-source;
623*4882a593Smuzhiyun	};
624*4882a593Smuzhiyun};
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun&am33xx_pinmux {
627*4882a593Smuzhiyun	user_leds_pins: pinmux_user_leds {
628*4882a593Smuzhiyun		pinctrl-single,pins = <
629*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE7)	/* gpmc_a4.gpio1_20 */
630*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)	/* gpmc_a5.gpio1_21 */
631*4882a593Smuzhiyun		>;
632*4882a593Smuzhiyun	};
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun	user_buttons_pins: pinmux_user_buttons {
635*4882a593Smuzhiyun		pinctrl-single,pins = <
636*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_a6.gpio1_22 */
637*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_a7.gpio1_21 */
638*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE7)	/* gpmc_a8.gpio0_7 */
639*4882a593Smuzhiyun		>;
640*4882a593Smuzhiyun	};
641*4882a593Smuzhiyun};
642