| /OK3568_Linux_fs/kernel/drivers/clk/samsung/ |
| H A D | clk-s3c2410.c | 35 mpll, upll, enumerator
157 [upll] = PLL(pll_s3c2410_upll, UPLL, "upll", "xti",
172 /* uclk is fed from the unmodified upll */
173 FFACTOR(UCLK, "uclk", "upll", 1, 1, 0),
223 [upll] = PLL(pll_s3c2410_upll, UPLL, "upll", "xti",
253 DIV(UCLK, "uclk", "upll", CLKDIVN, 3, 1),
257 DIV(0, "div_cam", "upll", CAMDIVN, 0, 3),
272 ALIAS(CAMIF, NULL, "camif-upll"),
277 PNAME(s3c2440_camif_p) = { "upll", "ff_cam" };
290 FFACTOR(0, "upll_3", "upll", 1, 3, 0),
[all …]
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| H A D | clk-s3c2410-dclk.c | 146 static const char *clkout0_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk",
148 static const char *clkout1_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk",
151 static const char *clkout0_s3c2412_p[] = { "mpll", "upll", "rtc_clkout",
153 static const char *clkout1_s3c2412_p[] = { "xti", "upll", "fclk", "hclk", "pclk",
156 static const char *clkout0_s3c2440_p[] = { "xti", "upll", "fclk", "hclk", "pclk",
158 static const char *clkout1_s3c2440_p[] = { "mpll", "upll", "rtc_clkout",
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| H A D | clk-s3c2412.c | 82 PNAME(usysclk_p) = { "urefclk", "upll" };
102 PLL(pll_s3c2410_upll, UPLL, "upll", "urefclk", LOCKTIME, UPLLCON, NULL),
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| /OK3568_Linux_fs/kernel/drivers/clk/imx/ |
| H A D | clk-imx31.c | 36 static const char *csi_sel[] = { "upll", "spll", };
37 static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
71 clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "upll", "ckih", base + MXC_CCM_UPCTL); in _mx31_clocks_init()
77 clk[per_div] = imx_clk_divider("per_div", "upll", base + MXC_CCM_PDR0, 16, 5); in _mx31_clocks_init()
82 clk[usb_div_pre] = imx_clk_divider("usb_div_pre", "upll", base + MXC_CCM_PDR1, 30, 2); in _mx31_clocks_init()
124 clk[firi_gate] = imx_clk_gate2("firi_gate", "upll", base+MXC_CCM_CGR2, 12); in _mx31_clocks_init()
128 clk_set_parent(clk[csi], clk[upll]); in _mx31_clocks_init()
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| H A D | clk-imx25.c | 46 static const char *per_sel_clks[] = { "ahb", "upll", };
53 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, enumerator
82 clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL)); in __mx25_clocks_init()
87 clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6); in __mx25_clocks_init()
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| H A D | clk-imx7ulp.c | 30 …{ "dummy", "nic1_bus_clk", "nic1_clk", "ddr_clk", "apll_pfd2", "apll_pfd1", "apll_pfd0", "upll", };
66 hws[IMX7ULP_CLK_UPLL] = imx_obtain_fixed_clk_hw(np, "upll"); in imx7ulp_clk_scg1_init()
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| /OK3568_Linux_fs/kernel/drivers/clk/uniphier/ |
| H A D | clk-uniphier-sys.c | 84 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 6000, 512), /* 288 MHz */
93 UNIPHIER_CLK_FACTOR("usb2", -1, "upll", 1, 12),
100 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25), /* 288 MHz */
101 UNIPHIER_CLK_FACTOR("a2pll", -1, "upll", 256, 125), /* 589.824 MHz */
110 UNIPHIER_CLK_FACTOR("usb2", -1, "upll", 1, 12),
118 UNIPHIER_CLK_FACTOR("usb30-hsphy0", 16, "upll", 1, 12),
129 UNIPHIER_CLK_FACTOR("upll", -1, "ref", 288, 25), /* 288 MHz */
137 UNIPHIER_CLK_FACTOR("usb2", -1, "upll", 1, 12),
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | imx7ulp.dtsi | 83 upll: clock-upll { label
86 clock-output-names = "upll";
250 <&firc>, <&upll>;
252 "firc", "upll";
283 "upll", "sosc_bus_clk",
315 "upll", "sosc_bus_clk",
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | imx7ulp-scg-clock.yaml | 64 - const: upll
84 <&firc>, <&upll>;
86 "firc", "upll";
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| H A D | imx7ulp-pcc-clock.yaml | 71 - const: upll
108 "upll", "sosc_bus_clk", "firc_bus_clk",
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| H A D | imx31-clock.yaml | 24 upll 5
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| H A D | imx25-clock.yaml | 22 upll 3
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-at91/ |
| H A D | clock.c | 83 printf("ERROR: failed to enable UPLL\n"); in at91_upll_clk_enable()
101 printf("ERROR: failed to stop UPLL\n"); in at91_upll_clk_disable()
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| /OK3568_Linux_fs/kernel/include/linux/clk/ |
| H A D | at91_pmc.h | 48 #define AT91_PMC_PLL_ACR_DEFAULT_UPLL 0x12020010UL /* Default PLL ACR value for UPLL */
50 #define AT91_PMC_PLL_ACR_UTMIVR (1 << 12) /* UPLL Voltage regulator Control */
51 #define AT91_PMC_PLL_ACR_UTMIBG (1 << 13) /* UPLL Bandgap Control */
170 #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | imx7ulp.dtsi | 108 upll: clock@4 { label
112 clock-output-names = "upll";
376 <&firc>, <&upll>, <&mpll>;
378 "firc", "upll", "mpll";
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| /OK3568_Linux_fs/kernel/drivers/clk/at91/ |
| H A D | clk-sam9x60-pll.c | 99 if (core->characteristics->upll) in sam9x60_frac_pll_prepare()
109 if (core->characteristics->upll) { in sam9x60_frac_pll_prepare()
157 if (core->characteristics->upll) in sam9x60_frac_pll_unprepare()
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| H A D | pmc.h | 78 u8 upll : 1; member
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| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | at91.h | 16 #define AT91_PMC_LOCKU 6 /* UPLL Lock */
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-at91/armv7/ |
| H A D | sama5d4_devices.c | 39 /* Enable UPLL clock */ in at91_udp_hw_init()
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| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | at91.h | 33 #define AT91_PMC_LOCKU 6 /* UPLL Lock */
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| H A D | s3c2410.h | 23 #define UPLL 3 macro
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| H A D | s3c2412.h | 23 #define UPLL 3 macro
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_pmc.h | 235 #define AT91_PMC_USBS_USB_UPLL (0x1) /* USB Clock Input is UPLL */
245 #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock */
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| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | clk-rk3399.c | 153 PNAME(mux_pll_src_cpll_gpll_upll_p) = { "dummy_cpll", "gpll", "upll" };
162 "npll", "upll" };
164 "upll", "xin24m" };
166 "ppll", "upll", "xin24m" };
207 PNAME(mux_pll_src_cpll_gpll_upll_p) = { "cpll", "gpll", "upll" };
216 "npll", "upll" };
218 "upll", "xin24m" };
220 "ppll", "upll", "xin24m" };
498 MUX(0, "upll", mux_pll_src_24m_usbphy480m_p, 0,
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| /OK3568_Linux_fs/u-boot/board/freescale/mx25pdk/ |
| H A D | mx25pdk.c | 180 * to 50 MHz that can be obtained, which requires to use UPLL as the in board_mmc_init()
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