1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Atmel Corporation
3*4882a593Smuzhiyun * Wenyou Yang <wenyou.yang@atmel.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <asm/io.h>
10*4882a593Smuzhiyun #include <asm/arch/hardware.h>
11*4882a593Smuzhiyun #include <asm/arch/at91_pmc.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define EN_UPLL_TIMEOUT 500
14*4882a593Smuzhiyun
at91_periph_clk_enable(int id)15*4882a593Smuzhiyun void at91_periph_clk_enable(int id)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #ifdef CPU_HAS_PCR
20*4882a593Smuzhiyun u32 regval;
21*4882a593Smuzhiyun u32 div_value;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun if (id > AT91_PMC_PCR_PID_MASK)
24*4882a593Smuzhiyun return;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun writel(id, &pmc->pcr);
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun div_value = readl(&pmc->pcr) & AT91_PMC_PCR_DIV;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id | div_value;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun writel(regval, &pmc->pcr);
33*4882a593Smuzhiyun #else
34*4882a593Smuzhiyun writel(0x01 << id, &pmc->pcer);
35*4882a593Smuzhiyun #endif
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
at91_periph_clk_disable(int id)38*4882a593Smuzhiyun void at91_periph_clk_disable(int id)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #ifdef CPU_HAS_PCR
43*4882a593Smuzhiyun u32 regval;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun if (id > AT91_PMC_PCR_PID_MASK)
46*4882a593Smuzhiyun return;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun regval = AT91_PMC_PCR_CMD_WRITE | id;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun writel(regval, &pmc->pcr);
51*4882a593Smuzhiyun #else
52*4882a593Smuzhiyun writel(0x01 << id, &pmc->pcdr);
53*4882a593Smuzhiyun #endif
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
at91_system_clk_enable(int sys_clk)56*4882a593Smuzhiyun void at91_system_clk_enable(int sys_clk)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun writel(sys_clk, &pmc->scer);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
at91_system_clk_disable(int sys_clk)63*4882a593Smuzhiyun void at91_system_clk_disable(int sys_clk)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun writel(sys_clk, &pmc->scdr);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
at91_upll_clk_enable(void)70*4882a593Smuzhiyun int at91_upll_clk_enable(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
73*4882a593Smuzhiyun ulong start_time, tmp_time;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if ((readl(&pmc->uckr) & AT91_PMC_UPLLEN) == AT91_PMC_UPLLEN)
76*4882a593Smuzhiyun return 0;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun start_time = get_timer(0);
79*4882a593Smuzhiyun writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr);
80*4882a593Smuzhiyun while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU) {
81*4882a593Smuzhiyun tmp_time = get_timer(0);
82*4882a593Smuzhiyun if ((tmp_time - start_time) > EN_UPLL_TIMEOUT) {
83*4882a593Smuzhiyun printf("ERROR: failed to enable UPLL\n");
84*4882a593Smuzhiyun return -1;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
at91_upll_clk_disable(void)91*4882a593Smuzhiyun int at91_upll_clk_disable(void)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
94*4882a593Smuzhiyun ulong start_time, tmp_time;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun start_time = get_timer(0);
97*4882a593Smuzhiyun writel(readl(&pmc->uckr) & ~AT91_PMC_UPLLEN, &pmc->uckr);
98*4882a593Smuzhiyun while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) {
99*4882a593Smuzhiyun tmp_time = get_timer(0);
100*4882a593Smuzhiyun if ((tmp_time - start_time) > EN_UPLL_TIMEOUT) {
101*4882a593Smuzhiyun printf("ERROR: failed to stop UPLL\n");
102*4882a593Smuzhiyun return -1;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
at91_usb_clk_init(u32 value)109*4882a593Smuzhiyun void at91_usb_clk_init(u32 value)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun writel(value, &pmc->usb);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
at91_pllicpr_init(u32 icpr)116*4882a593Smuzhiyun void at91_pllicpr_init(u32 icpr)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun writel(icpr, &pmc->pllicpr);
121*4882a593Smuzhiyun }
122