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/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A Dclk-spmi-pmic-div.c24 struct clkdiv { struct
33 static inline struct clkdiv *to_clkdiv(struct clk_hw *hw) in to_clkdiv() argument
35 return container_of(hw, struct clkdiv, hw); in to_clkdiv()
51 static bool is_spmi_pmic_clkdiv_enabled(struct clkdiv *clkdiv) in is_spmi_pmic_clkdiv_enabled() argument
55 regmap_read(clkdiv->regmap, clkdiv->base + REG_EN_CTL, &val); in is_spmi_pmic_clkdiv_enabled()
61 __spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable, in __spmi_pmic_clkdiv_set_enable_state() argument
65 unsigned int ns = clkdiv->cxo_period_ns; in __spmi_pmic_clkdiv_set_enable_state()
68 ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_EN_CTL, in __spmi_pmic_clkdiv_set_enable_state()
81 static int spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable) in spmi_pmic_clkdiv_set_enable_state() argument
85 regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor); in spmi_pmic_clkdiv_set_enable_state()
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/OK3568_Linux_fs/kernel/drivers/media/rc/
H A Dtango-ir.c160 u64 clkrate, clkdiv; in tango_ir_probe() local
205 clkdiv = clkrate * NEC_TIME_BASE; in tango_ir_probe()
206 do_div(clkdiv, 1000000); in tango_ir_probe()
208 val = NEC_CAP(31) | GPIO_SEL(12) | clkdiv; in tango_ir_probe()
211 clkdiv = clkrate * RC5_TIME_BASE; in tango_ir_probe()
212 do_div(clkdiv, 1000000); in tango_ir_probe()
215 writel_relaxed(clkdiv, ir->rc5_base + IR_RC5_CLK_DIV); in tango_ir_probe()
218 clkdiv = clkrate * RC6_TIME_BASE; in tango_ir_probe()
219 do_div(clkdiv, RC6_CARRIER); in tango_ir_probe()
222 writel_relaxed((clkdiv >> 2) << 18 | clkdiv, ir->rc6_base + RC6_CLKDIV); in tango_ir_probe()
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Ds3c2412-cpufreq.c126 unsigned long clkdiv; in s3c2412_cpufreq_setdivs() local
129 olddiv = clkdiv = s3c24xx_read_clkdivn(); in s3c2412_cpufreq_setdivs()
133 clkdiv &= ~S3C2412_CLKDIVN_ARMDIVN; in s3c2412_cpufreq_setdivs()
134 clkdiv &= ~S3C2412_CLKDIVN_HDIVN_MASK; in s3c2412_cpufreq_setdivs()
135 clkdiv &= ~S3C2412_CLKDIVN_PDIVN; in s3c2412_cpufreq_setdivs()
138 clkdiv |= S3C2412_CLKDIVN_ARMDIVN; in s3c2412_cpufreq_setdivs()
140 clkdiv |= ((cfg->divs.h_divisor / cfg->divs.arm_divisor) - 1); in s3c2412_cpufreq_setdivs()
143 clkdiv |= S3C2412_CLKDIVN_PDIVN; in s3c2412_cpufreq_setdivs()
145 s3c_freq_dbg("%s: div %08lx => %08lx\n", __func__, olddiv, clkdiv); in s3c2412_cpufreq_setdivs()
146 s3c24xx_write_clkdivn(clkdiv); in s3c2412_cpufreq_setdivs()
H A Ds3c2440-cpufreq.c154 unsigned long clkdiv, camdiv; in s3c2440_cpufreq_setdivs() local
159 clkdiv = s3c24xx_read_clkdivn(); in s3c2440_cpufreq_setdivs()
162 clkdiv &= ~(S3C2440_CLKDIVN_HDIVN_MASK | S3C2440_CLKDIVN_PDIVN); in s3c2440_cpufreq_setdivs()
167 clkdiv |= S3C2440_CLKDIVN_HDIVN_1; in s3c2440_cpufreq_setdivs()
171 clkdiv |= S3C2440_CLKDIVN_HDIVN_2; in s3c2440_cpufreq_setdivs()
177 clkdiv |= S3C2440_CLKDIVN_HDIVN_3_6; in s3c2440_cpufreq_setdivs()
183 clkdiv |= S3C2440_CLKDIVN_HDIVN_4_8; in s3c2440_cpufreq_setdivs()
191 clkdiv |= S3C2440_CLKDIVN_PDIVN; in s3c2440_cpufreq_setdivs()
196 * when we write clkdiv we will under-frequency instead of over. We in s3c2440_cpufreq_setdivs()
201 s3c24xx_write_clkdivn(clkdiv); in s3c2440_cpufreq_setdivs()
H A Ds3c2410-cpufreq.c28 /* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */
32 u32 clkdiv = 0; in s3c2410_cpufreq_setdivs() local
35 clkdiv |= S3C2410_CLKDIVN_HDIVN; in s3c2410_cpufreq_setdivs()
38 clkdiv |= S3C2410_CLKDIVN_PDIVN; in s3c2410_cpufreq_setdivs()
40 s3c24xx_write_clkdivn(clkdiv); in s3c2410_cpufreq_setdivs()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dqcom,spmi-clkdiv.txt1 Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
3 clkdiv configures the clock frequency of a set of outputs on the PMIC.
14 Definition: must be "qcom,spmi-clkdiv".
19 Definition: base address of CLKDIV peripherals.
24 Definition: number of CLKDIV peripherals.
46 compatible = "qcom,spmi-clkdiv";
H A Drenesas,emev2-smu.txt21 - compatible: Should be "renesas,emev2-smu-clkdiv"
40 compatible = "renesas,emev2-smu-clkdiv";
87 compatible = "renesas,emev2-smu-clkdiv";
/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-cavium.h46 uint64_t clkdiv:13; member
78 uint64_t clkdiv:13;
85 uint64_t clkdiv:13; member
111 uint64_t clkdiv:13;
118 uint64_t clkdiv:13; member
142 uint64_t clkdiv:13;
150 uint64_t clkdiv:13; member
180 uint64_t clkdiv:13;
187 uint64_t clkdiv:13; member
217 uint64_t clkdiv:13;
H A Dspi-cavium.c36 unsigned int clkdiv; in octeon_spi_do_transfer() local
48 clkdiv = p->sys_freq / (2 * xfer->speed_hz); in octeon_spi_do_transfer()
52 mpi_cfg.s.clkdiv = clkdiv; in octeon_spi_do_transfer()
H A Dspi-efm32.c109 u32 clkdiv; in efm32_spi_setup_transfer() local
119 clkdiv = 0; in efm32_spi_setup_transfer()
121 clkdiv = 64 * (DIV_ROUND_UP(2 * clkfreq, speed) - 4); in efm32_spi_setup_transfer()
123 if (clkdiv > (1U << 21)) in efm32_spi_setup_transfer()
126 efm32_spi_write32(ddata, clkdiv, REG_CLKDIV); in efm32_spi_setup_transfer()
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Dgen_atmel_mci.c94 u32 clkdiv = 255; local
103 clkdiv = DIV_ROUND_UP(bus_hz, hz) - 2;
104 if (clkdiv > 511)
105 clkdiv = 511;
107 clkodd = clkdiv & 1;
108 clkdiv >>= 1;
111 bus_hz / (clkdiv * 2 + clkodd + 2), blklen);
113 /* find clkdiv yielding a rate <= than requested */
114 for (clkdiv = 0; clkdiv < 255; clkdiv++) {
115 if ((bus_hz / (clkdiv + 1) / 2) <= hz)
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H A Darm_pl180_mmci.c287 u32 clkdiv = 0; in host_set_ios() local
291 clkdiv = 0; in host_set_ios()
294 clkdiv = (host->clock_in / dev->clock) - 2; in host_set_ios()
297 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
299 clkdiv++; in host_set_ios()
300 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
303 if (clkdiv > SDI_CLKCR_CLKDIV_MASK) in host_set_ios()
304 clkdiv = SDI_CLKCR_CLKDIV_MASK; in host_set_ios()
306 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
309 sdi_clkcr |= clkdiv; in host_set_ios()
/OK3568_Linux_fs/u-boot/drivers/i2c/
H A Dadi_i2c.c25 ureg(clkdiv);
217 u16 clkdiv = I2C_SPEED_TO_DUTY(speed); in adi_i2c_setspeed() local
220 if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN) in adi_i2c_setspeed()
222 clkdiv = (clkdiv << 8) | (clkdiv & 0xff); in adi_i2c_setspeed()
223 writew(clkdiv, &twi->clkdiv); in adi_i2c_setspeed()
/OK3568_Linux_fs/kernel/drivers/hwtracing/intel_th/
H A Dpti.c27 unsigned int clkdiv; member
113 return scnprintf(buf, PAGE_SIZE, "%d\n", 1u << pti->clkdiv); in clock_divider_show()
131 pti->clkdiv = val; in clock_divider_store()
159 ctl |= pti->clkdiv << __ffs(PTI_CLKDIV); in intel_th_pti_activate()
183 pti->clkdiv = (ctl & PTI_CLKDIV) >> __ffs(PTI_CLKDIV); in read_hw_config()
188 if (!pti->clkdiv) in read_hw_config()
189 pti->clkdiv = 1; in read_hw_config()
/OK3568_Linux_fs/u-boot/board/sbc8548/
H A Dsbc8548.c63 uint clkdiv, lbc_mhz, lcrr = CONFIG_SYS_LBC_LCRR; in local_bus_init() local
69 clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus; in local_bus_init()
71 debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz); in local_bus_init()
74 if (clkdiv == 16) { in local_bus_init()
76 } else if (clkdiv == 8) { in local_bus_init()
78 } else if (clkdiv == 4) { in local_bus_init()
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Demev2.dtsi72 compatible = "renesas,emev2-smu-clkdiv";
84 compatible = "renesas,emev2-smu-clkdiv";
103 compatible = "renesas,emev2-smu-clkdiv";
109 compatible = "renesas,emev2-smu-clkdiv";
115 compatible = "renesas,emev2-smu-clkdiv";
121 compatible = "renesas,emev2-smu-clkdiv";
/OK3568_Linux_fs/kernel/drivers/pwm/
H A Dpwm-tiehrpwm.c153 unsigned int clkdiv, hspclkdiv; in set_prescale_div() local
155 for (clkdiv = 0; clkdiv <= CLKDIV_MAX; clkdiv++) { in set_prescale_div()
161 * CLKDIVIDER = (1), if clkdiv == 0 *OR* in set_prescale_div()
162 * (2 * clkdiv), if clkdiv != 0 in set_prescale_div()
168 *prescale_div = (1 << clkdiv) * in set_prescale_div()
171 *tb_clk_div = (clkdiv << TBCTL_CLKDIV_SHIFT) | in set_prescale_div()
/OK3568_Linux_fs/kernel/drivers/w1/masters/
H A Dmxc_w1.c95 unsigned int clkdiv; in mxc_w1_probe() local
116 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000); in mxc_w1_probe()
117 clkrate /= clkdiv; in mxc_w1_probe()
132 writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER); in mxc_w1_probe()
/OK3568_Linux_fs/kernel/sound/soc/adi/
H A Daxi-spdif.c80 unsigned int clkdiv, stat; in axi_spdif_hw_params() local
97 clkdiv = DIV_ROUND_CLOSEST(clk_get_rate(spdif->clk_ref), in axi_spdif_hw_params()
99 clkdiv <<= AXI_SPDIF_CTRL_CLKDIV_OFFSET; in axi_spdif_hw_params()
103 AXI_SPDIF_CTRL_CLKDIV_MASK, clkdiv); in axi_spdif_hw_params()
/OK3568_Linux_fs/kernel/sound/soc/intel/skylake/
H A Dskl-nhlt.c313 u32 clkdiv, div_ratio; in skl_get_mclk() local
324 clkdiv = i2s_config->mclk.mdivr & in skl_get_mclk()
329 clkdiv = i2s_config_ext->mclk.mdivr[0] & in skl_get_mclk()
336 if (clkdiv != SKL_MCLK_DIV_RATIO_MASK) in skl_get_mclk()
337 /* Divider is 2 + clkdiv */ in skl_get_mclk()
338 div_ratio = clkdiv + 2; in skl_get_mclk()
/OK3568_Linux_fs/kernel/drivers/i2c/busses/
H A Di2c-efm32.c313 u32 clkdiv; in efm32_i2c_probe() local
392 clkdiv = DIV_ROUND_UP(rate, 8 * ddata->frequency) - 1; in efm32_i2c_probe()
393 if (clkdiv >= 0x200) { in efm32_i2c_probe()
401 dev_dbg(&pdev->dev, "input clock = %lu, bus freq = %lu, clkdiv = %lu\n", in efm32_i2c_probe()
402 rate, ddata->frequency, (unsigned long)clkdiv); in efm32_i2c_probe()
403 efm32_i2c_write32(ddata, REG_CLKDIV, REG_CLKDIV_DIV(clkdiv)); in efm32_i2c_probe()
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dadau1701.c300 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv, in adau1701_reset() argument
308 if (clkdiv != ADAU1707_CLKDIV_UNSET && in adau1701_reset()
311 switch (clkdiv) { in adau1701_reset()
332 adau1701->pll_clkdiv = clkdiv; in adau1701_reset()
347 if (clkdiv != ADAU1707_CLKDIV_UNSET) { in adau1701_reset()
439 unsigned int clkdiv = adau1701->sysclk / params_rate(params); in adau1701_hw_params() local
448 if (clkdiv != adau1701->pll_clkdiv) { in adau1701_hw_params()
449 ret = adau1701_reset(component, clkdiv, params_rate(params)); in adau1701_hw_params()
846 of_property_read_u32(dev->of_node, "adi,pll-clkdiv", in adau1701_i2c_probe()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8548cds/
H A Dmpc8548cds.c70 uint clkdiv; in local_bus_init() local
74 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
77 if (clkdiv == 16) { in local_bus_init()
79 } else if (clkdiv == 8) { in local_bus_init()
81 } else if (clkdiv == 4) { in local_bus_init()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8568mds/
H A Dmpc8568mds.c133 uint clkdiv; in local_bus_init() local
137 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
140 if (clkdiv == 16) { in local_bus_init()
142 } else if (clkdiv == 8) { in local_bus_init()
144 } else if (clkdiv == 4) { in local_bus_init()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/exynos/
H A Dexynos7_drm_decon.c144 u32 clkdiv; in decon_calc_clkdiv() local
147 clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk); in decon_calc_clkdiv()
149 return (clkdiv < 0x100) ? clkdiv : 0xff; in decon_calc_clkdiv()
156 u32 val, clkdiv; in decon_commit() local
205 clkdiv = decon_calc_clkdiv(ctx, mode); in decon_commit()
206 if (clkdiv > 1) { in decon_commit()
207 val = VCLKCON1_CLKVAL_NUM_VCLK(clkdiv - 1); in decon_commit()

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