1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2012-2013, Analog Devices Inc.
4*4882a593Smuzhiyun * Author: Lars-Peter Clausen <lars@metafoo.de>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/clk.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <sound/core.h>
17*4882a593Smuzhiyun #include <sound/pcm.h>
18*4882a593Smuzhiyun #include <sound/pcm_params.h>
19*4882a593Smuzhiyun #include <sound/soc.h>
20*4882a593Smuzhiyun #include <sound/initval.h>
21*4882a593Smuzhiyun #include <sound/dmaengine_pcm.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define AXI_SPDIF_REG_CTRL 0x0
24*4882a593Smuzhiyun #define AXI_SPDIF_REG_STAT 0x4
25*4882a593Smuzhiyun #define AXI_SPDIF_REG_TX_FIFO 0xc
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define AXI_SPDIF_CTRL_TXDATA BIT(1)
28*4882a593Smuzhiyun #define AXI_SPDIF_CTRL_TXEN BIT(0)
29*4882a593Smuzhiyun #define AXI_SPDIF_CTRL_CLKDIV_OFFSET 8
30*4882a593Smuzhiyun #define AXI_SPDIF_CTRL_CLKDIV_MASK (0xff << 8)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define AXI_SPDIF_FREQ_44100 (0x0 << 6)
33*4882a593Smuzhiyun #define AXI_SPDIF_FREQ_48000 (0x1 << 6)
34*4882a593Smuzhiyun #define AXI_SPDIF_FREQ_32000 (0x2 << 6)
35*4882a593Smuzhiyun #define AXI_SPDIF_FREQ_NA (0x3 << 6)
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun struct axi_spdif {
38*4882a593Smuzhiyun struct regmap *regmap;
39*4882a593Smuzhiyun struct clk *clk;
40*4882a593Smuzhiyun struct clk *clk_ref;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data dma_data;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun struct snd_ratnum ratnum;
45*4882a593Smuzhiyun struct snd_pcm_hw_constraint_ratnums rate_constraints;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
axi_spdif_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)48*4882a593Smuzhiyun static int axi_spdif_trigger(struct snd_pcm_substream *substream, int cmd,
49*4882a593Smuzhiyun struct snd_soc_dai *dai)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai);
52*4882a593Smuzhiyun unsigned int val;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun switch (cmd) {
55*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
56*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_RESUME:
57*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
58*4882a593Smuzhiyun val = AXI_SPDIF_CTRL_TXDATA;
59*4882a593Smuzhiyun break;
60*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
61*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_SUSPEND:
62*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
63*4882a593Smuzhiyun val = 0;
64*4882a593Smuzhiyun break;
65*4882a593Smuzhiyun default:
66*4882a593Smuzhiyun return -EINVAL;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL,
70*4882a593Smuzhiyun AXI_SPDIF_CTRL_TXDATA, val);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
axi_spdif_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)75*4882a593Smuzhiyun static int axi_spdif_hw_params(struct snd_pcm_substream *substream,
76*4882a593Smuzhiyun struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai);
79*4882a593Smuzhiyun unsigned int rate = params_rate(params);
80*4882a593Smuzhiyun unsigned int clkdiv, stat;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun switch (params_rate(params)) {
83*4882a593Smuzhiyun case 32000:
84*4882a593Smuzhiyun stat = AXI_SPDIF_FREQ_32000;
85*4882a593Smuzhiyun break;
86*4882a593Smuzhiyun case 44100:
87*4882a593Smuzhiyun stat = AXI_SPDIF_FREQ_44100;
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun case 48000:
90*4882a593Smuzhiyun stat = AXI_SPDIF_FREQ_48000;
91*4882a593Smuzhiyun break;
92*4882a593Smuzhiyun default:
93*4882a593Smuzhiyun stat = AXI_SPDIF_FREQ_NA;
94*4882a593Smuzhiyun break;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun clkdiv = DIV_ROUND_CLOSEST(clk_get_rate(spdif->clk_ref),
98*4882a593Smuzhiyun rate * 64 * 2) - 1;
99*4882a593Smuzhiyun clkdiv <<= AXI_SPDIF_CTRL_CLKDIV_OFFSET;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun regmap_write(spdif->regmap, AXI_SPDIF_REG_STAT, stat);
102*4882a593Smuzhiyun regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL,
103*4882a593Smuzhiyun AXI_SPDIF_CTRL_CLKDIV_MASK, clkdiv);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
axi_spdif_dai_probe(struct snd_soc_dai * dai)108*4882a593Smuzhiyun static int axi_spdif_dai_probe(struct snd_soc_dai *dai)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun snd_soc_dai_init_dma_data(dai, &spdif->dma_data, NULL);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
axi_spdif_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)117*4882a593Smuzhiyun static int axi_spdif_startup(struct snd_pcm_substream *substream,
118*4882a593Smuzhiyun struct snd_soc_dai *dai)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai);
121*4882a593Smuzhiyun int ret;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
124*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE,
125*4882a593Smuzhiyun &spdif->rate_constraints);
126*4882a593Smuzhiyun if (ret)
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = clk_prepare_enable(spdif->clk_ref);
130*4882a593Smuzhiyun if (ret)
131*4882a593Smuzhiyun return ret;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL,
134*4882a593Smuzhiyun AXI_SPDIF_CTRL_TXEN, AXI_SPDIF_CTRL_TXEN);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
axi_spdif_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)139*4882a593Smuzhiyun static void axi_spdif_shutdown(struct snd_pcm_substream *substream,
140*4882a593Smuzhiyun struct snd_soc_dai *dai)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct axi_spdif *spdif = snd_soc_dai_get_drvdata(dai);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun regmap_update_bits(spdif->regmap, AXI_SPDIF_REG_CTRL,
145*4882a593Smuzhiyun AXI_SPDIF_CTRL_TXEN, 0);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun clk_disable_unprepare(spdif->clk_ref);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun static const struct snd_soc_dai_ops axi_spdif_dai_ops = {
151*4882a593Smuzhiyun .startup = axi_spdif_startup,
152*4882a593Smuzhiyun .shutdown = axi_spdif_shutdown,
153*4882a593Smuzhiyun .trigger = axi_spdif_trigger,
154*4882a593Smuzhiyun .hw_params = axi_spdif_hw_params,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun static struct snd_soc_dai_driver axi_spdif_dai = {
158*4882a593Smuzhiyun .probe = axi_spdif_dai_probe,
159*4882a593Smuzhiyun .playback = {
160*4882a593Smuzhiyun .channels_min = 2,
161*4882a593Smuzhiyun .channels_max = 2,
162*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_KNOT,
163*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S16_LE,
164*4882a593Smuzhiyun },
165*4882a593Smuzhiyun .ops = &axi_spdif_dai_ops,
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun static const struct snd_soc_component_driver axi_spdif_component = {
169*4882a593Smuzhiyun .name = "axi-spdif",
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun static const struct regmap_config axi_spdif_regmap_config = {
173*4882a593Smuzhiyun .reg_bits = 32,
174*4882a593Smuzhiyun .reg_stride = 4,
175*4882a593Smuzhiyun .val_bits = 32,
176*4882a593Smuzhiyun .max_register = AXI_SPDIF_REG_STAT,
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun
axi_spdif_probe(struct platform_device * pdev)179*4882a593Smuzhiyun static int axi_spdif_probe(struct platform_device *pdev)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun struct axi_spdif *spdif;
182*4882a593Smuzhiyun struct resource *res;
183*4882a593Smuzhiyun void __iomem *base;
184*4882a593Smuzhiyun int ret;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
187*4882a593Smuzhiyun if (!spdif)
188*4882a593Smuzhiyun return -ENOMEM;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun platform_set_drvdata(pdev, spdif);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
193*4882a593Smuzhiyun base = devm_ioremap_resource(&pdev->dev, res);
194*4882a593Smuzhiyun if (IS_ERR(base))
195*4882a593Smuzhiyun return PTR_ERR(base);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun spdif->regmap = devm_regmap_init_mmio(&pdev->dev, base,
198*4882a593Smuzhiyun &axi_spdif_regmap_config);
199*4882a593Smuzhiyun if (IS_ERR(spdif->regmap))
200*4882a593Smuzhiyun return PTR_ERR(spdif->regmap);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun spdif->clk = devm_clk_get(&pdev->dev, "axi");
203*4882a593Smuzhiyun if (IS_ERR(spdif->clk))
204*4882a593Smuzhiyun return PTR_ERR(spdif->clk);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun spdif->clk_ref = devm_clk_get(&pdev->dev, "ref");
207*4882a593Smuzhiyun if (IS_ERR(spdif->clk_ref))
208*4882a593Smuzhiyun return PTR_ERR(spdif->clk_ref);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun ret = clk_prepare_enable(spdif->clk);
211*4882a593Smuzhiyun if (ret)
212*4882a593Smuzhiyun return ret;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun spdif->dma_data.addr = res->start + AXI_SPDIF_REG_TX_FIFO;
215*4882a593Smuzhiyun spdif->dma_data.addr_width = 4;
216*4882a593Smuzhiyun spdif->dma_data.maxburst = 1;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun spdif->ratnum.num = clk_get_rate(spdif->clk_ref) / 128;
219*4882a593Smuzhiyun spdif->ratnum.den_step = 1;
220*4882a593Smuzhiyun spdif->ratnum.den_min = 1;
221*4882a593Smuzhiyun spdif->ratnum.den_max = 64;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun spdif->rate_constraints.rats = &spdif->ratnum;
224*4882a593Smuzhiyun spdif->rate_constraints.nrats = 1;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&pdev->dev, &axi_spdif_component,
227*4882a593Smuzhiyun &axi_spdif_dai, 1);
228*4882a593Smuzhiyun if (ret)
229*4882a593Smuzhiyun goto err_clk_disable;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
232*4882a593Smuzhiyun if (ret)
233*4882a593Smuzhiyun goto err_clk_disable;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun err_clk_disable:
238*4882a593Smuzhiyun clk_disable_unprepare(spdif->clk);
239*4882a593Smuzhiyun return ret;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
axi_spdif_dev_remove(struct platform_device * pdev)242*4882a593Smuzhiyun static int axi_spdif_dev_remove(struct platform_device *pdev)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun struct axi_spdif *spdif = platform_get_drvdata(pdev);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun clk_disable_unprepare(spdif->clk);
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun static const struct of_device_id axi_spdif_of_match[] = {
252*4882a593Smuzhiyun { .compatible = "adi,axi-spdif-tx-1.00.a", },
253*4882a593Smuzhiyun {},
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, axi_spdif_of_match);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun static struct platform_driver axi_spdif_driver = {
258*4882a593Smuzhiyun .driver = {
259*4882a593Smuzhiyun .name = "axi-spdif",
260*4882a593Smuzhiyun .of_match_table = axi_spdif_of_match,
261*4882a593Smuzhiyun },
262*4882a593Smuzhiyun .probe = axi_spdif_probe,
263*4882a593Smuzhiyun .remove = axi_spdif_dev_remove,
264*4882a593Smuzhiyun };
265*4882a593Smuzhiyun module_platform_driver(axi_spdif_driver);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
268*4882a593Smuzhiyun MODULE_DESCRIPTION("AXI SPDIF driver");
269*4882a593Smuzhiyun MODULE_LICENSE("GPL");
270