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Searched defs:_reg (Results 26 – 50 of 131) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/clk/actions/
H A Dowl-divider.h29 #define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table) \ argument
38 #define OWL_DIVIDER(_struct, _name, _parent, _reg, \ argument
H A Dowl-factor.h35 #define OWL_FACTOR_HW(_reg, _shift, _width, _fct_flags, _table) \ argument
44 #define OWL_FACTOR(_struct, _name, _parent, _reg, \ argument
/OK3568_Linux_fs/kernel/include/linux/
H A Dbitfield.h60 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ argument
123 #define FIELD_GET(_mask, _reg) \ argument
H A Dsh_clk.h151 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ argument
175 #define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ argument
188 #define SH_CLK_DIV6(_parent, _reg, _flags) \ argument
205 #define SH_CLK_FSIDIV(_reg, _parent) \ argument
/OK3568_Linux_fs/kernel/drivers/power/supply/
H A Dmax77650-charger.c21 #define MAX77650_CHG_DETAILS_BITS(_reg) \ argument
52 #define MAX77650_CHGIN_DETAILS_BITS(_reg) \ argument
60 #define MAX77650_CHARGER_CHG_CHARGING(_reg) \ argument
/OK3568_Linux_fs/kernel/drivers/clk/sunxi-ng/
H A Dccu_mux.h51 _reg, _shift, _width, _gate, \ argument
65 #define SUNXI_CCU_MUX_WITH_GATE(_struct, _name, _parents, _reg, \ argument
71 #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \ argument
H A Dccu_nkm.h34 #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \ argument
56 #define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ argument
H A Dccu_phase.h20 #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ argument
/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/fs_enet/
H A Dmac-fec.c62 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v)) argument
65 #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg) argument
68 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v)) argument
71 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v)) argument
/OK3568_Linux_fs/kernel/drivers/clk/x86/
H A Dclk-cgu.h123 _reg, _type) \ argument
151 #define LGM_DDIV(_id, _name, _pname, _flags, _reg, \ argument
206 #define LGM_MUX(_id, _name, _pdata, _f, _reg, \ argument
222 #define LGM_DIV(_id, _name, _pname, _f, _reg, _shift, _width, \ argument
244 #define LGM_GATE(_id, _name, _pname, _f, _reg, \ argument
262 #define LGM_FIXED(_id, _name, _pname, _f, _reg, \ argument
282 #define LGM_FIXED_FACTOR(_id, _name, _pname, _f, _reg, \ argument
/OK3568_Linux_fs/u-boot/drivers/reset/
H A Dsti-reset.c80 #define STIH407_SRST_CORE(_reg, _bit) \ argument
83 #define STIH407_SRST_SBC(_reg, _bit) \ argument
86 #define STIH407_SRST_LPM(_reg, _bit) \ argument
H A Dreset-uniphier.c28 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
35 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8167.c657 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
687 #define DIV_ADJ_FLAG(_id, _name, _parent, _reg, _shift, _width, _flag) { \ argument
982 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1002 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
H A Dclk-mt8516.c467 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
736 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
756 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
/OK3568_Linux_fs/kernel/arch/mips/include/asm/
H A Dkvm_host.h502 #define __BUILD_KVM_RW_SAVED(name, type, _reg, sel) \ argument
514 #define __BUILD_KVM_SET_SAVED(name, type, _reg, sel) \ argument
535 #define __BUILD_KVM_ATOMIC_SAVED(name, type, _reg, sel) \ argument
560 #define __BUILD_KVM_RW_VZ(name, type, _reg, sel) \ argument
572 #define __BUILD_KVM_SET_VZ(name, type, _reg, sel) \ argument
591 #define __BUILD_KVM_SAVE_VZ(name, _reg, sel) \ argument
643 #define __BUILD_KVM_RW_SW(name, type, _reg, sel) \ argument
647 #define __BUILD_KVM_SET_SW(name, type, _reg, sel) \ argument
651 #define __BUILD_KVM_ATOMIC_SW(name, type, _reg, sel) \ argument
684 #define __BUILD_KVM_RW_HW(name, type, _reg, sel) \ argument
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/OK3568_Linux_fs/kernel/drivers/iio/accel/
H A Ddmard06.c39 #define DMARD06_ACCEL_CHANNEL(_axis, _reg) { \ argument
48 #define DMARD06_TEMP_CHANNEL(_reg) { \ argument
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/regmap/
H A Dclk-regmap.h40 #define PLL(_id, _name, _parent_name, _reg, _pd_shift, _dsmpd_shift, \ argument
53 #define RK618_PLL(_id, _name, _parent_name, _reg, _flags) \ argument
67 #define MUX(_id, _name, _parent_names, _reg, _shift, _width, _flags) \ argument
88 #define GATE(_id, _name, _parent_name, _reg, _shift, _flags) \ argument
108 #define DIV(_id, _name, _parent_name, _reg, _shift, _width, _flags) \ argument
/OK3568_Linux_fs/kernel/drivers/gpio/
H A Dgpio-max77650.c29 #define MAX77650_GPIO_DIR_BITS(_reg) \ argument
31 #define MAX77650_GPIO_INVAL_BITS(_reg) \ argument
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Dtps80031.c82 #define TPS80031_IRQ(_reg, _mask) \ argument
125 #define PUPD_DATA(_reg, _pulldown_bit, _pullup_bit) \ argument
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gvt/
H A Dreg.h80 #define REG_50080_TO_PIPE(_reg) ({ \ argument
87 #define REG_50080_TO_PLANE(_reg) ({ \ argument
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/adreno/
H A Dadreno_gpu.h316 #define PKT4(_reg, _cnt) \ argument
357 #define ADRENO_PROTECT_RW(_reg, _len) \ argument
366 #define ADRENO_PROTECT_RDONLY(_reg, _len) \ argument
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/
H A Dhw.c24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7366.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
H A Dclock-sh7343.c105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
/OK3568_Linux_fs/kernel/drivers/reset/
H A Dreset-uniphier.c28 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
35 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument

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