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Searched refs:TOP_CKG_HVD_IDB_CLK_MASK (Results 1 – 25 of 28) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DhalHVD_EX.c4032 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4041 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4047 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4053 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4059 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4065 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4071 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4077 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4084 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h490 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DhalHVD_EX.c3897 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3906 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3914 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3922 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3930 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3938 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3946 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3954 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3963 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h473 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DhalHVD_EX.c3902 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3911 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3919 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3927 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3935 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3943 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3951 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3959 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3968 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h473 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DhalHVD_EX.c3996 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4005 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4013 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4021 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4029 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4037 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4045 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4053 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4062 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h502 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DhalHVD_EX.c3943 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3952 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3960 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3968 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3976 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3984 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3992 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4000 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4009 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h474 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DhalHVD_EX.c3993 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4002 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4010 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4018 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4026 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4034 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4042 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4050 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4059 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h475 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DhalHVD_EX.c4080 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4089 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4095 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4101 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4107 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4113 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4119 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4125 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4132 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h474 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DhalHVD_EX.c4053 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4062 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4068 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4074 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4080 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4086 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4092 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4098 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4105 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h490 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DhalHVD_EX.c4058 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4067 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4073 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_384MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4079 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_345MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4085 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_320MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4091 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4097 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4103 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4110 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_432MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h474 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DhalHVD_EX.c3905 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_172MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3912 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3918 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3924 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_216MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3931 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
H A DregHVD_EX.h452 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(10:8) macro
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h610 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(2:0) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h729 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(2:0) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h729 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(2:0) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DregHVD_EX.h731 #define TOP_CKG_HVD_IDB_CLK_MASK BMASK(2:0) macro
H A DhalHVD_EX.c5059 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_480MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
5066 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
5072 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
5078 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_288MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()

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