| /utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1535 MS_U8 max_len = (E_DMD_DVBC_CFG_BW11_H - E_DMD_DVBC_CFG_BW0_L + 1)/2; in INTERN_DVBC_Config() 1544 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, 0x01); in INTERN_DVBC_Config() 1551 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config() 1560 …MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2, (MS_U8)pu16_symbol_rate_list[indx]); in INTERN_DVBC_Config() 1561 …MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2 + 1, (MS_U8)(pu16_symbol_rate_list[i… in INTERN_DVBC_Config() 1565 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2, 0x00); in INTERN_DVBC_Config() 1566 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2 + 1, 0x00); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1545 MS_U8 max_len = (E_DMD_DVBC_CFG_BW11_H - E_DMD_DVBC_CFG_BW0_L + 1)/2; in INTERN_DVBC_Config() 1554 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, 0x01); in INTERN_DVBC_Config() 1561 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config() 1570 …MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2, (MS_U8)pu16_symbol_rate_list[indx]); in INTERN_DVBC_Config() 1571 …MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2 + 1, (MS_U8)(pu16_symbol_rate_list[i… in INTERN_DVBC_Config() 1575 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2, 0x00); in INTERN_DVBC_Config() 1576 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2 + 1, 0x00); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1526 MS_U8 max_len = (E_DMD_DVBC_CFG_BW11_H - E_DMD_DVBC_CFG_BW0_L + 1)/2; in INTERN_DVBC_Config() 1535 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, 0x01); in INTERN_DVBC_Config() 1542 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config() 1551 …MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2, (MS_U8)pu16_symbol_rate_list[indx]); in INTERN_DVBC_Config() 1552 …MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2 + 1, (MS_U8)(pu16_symbol_rate_list[i… in INTERN_DVBC_Config() 1556 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2, 0x00); in INTERN_DVBC_Config() 1557 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L + indx*2 + 1, 0x00); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/projects/tmplib/include/ |
| H A D | drvDMD_INTERN_DVBC.h | 314 E_DMD_DVBC_CFG_BW0_L, enumerator
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| /utopia/UTPA2-700.0.x/modules/demodulator/drv/dvb_extdemod/ |
| H A D | drvDMD_EXTERN_MSB201X.h | 172 E_DMD_DVBC_CFG_BW0_L, enumerator
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| H A D | drvDMD_EXTERN_MSB201X.c | 4297 status &= _MDrv_DMD_MSB201X_SetDSPReg(devID, u8DemodIndex, E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in _MDrv_DMD_MSB201X_Config()
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| /utopia/UTPA2-700.0.x/mxlib/include/ |
| H A D | drvDMD_INTERN_DVBC.h | 233 E_DMD_DVBC_CFG_BW0_L, enumerator
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1221 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1221 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1188 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1221 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1188 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1221 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1221 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1076 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1588 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1335 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1081 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L, reg_symrate_l); in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 2367 …status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBC_CFG_BW0_L+PARA_TBL_LENGTH*hal_demod_swtich_st… in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/projects/build/ |
| H A D | preprocess.txt | 55465 E_DMD_DVBC_CFG_BW0_L,
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