1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // ("MStar Confidential Information") by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMD_EXTERN_MSB201X.h 98 /// @brief MSB201X Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_DVBC_H_ 103 #define _DRV_DVBC_H_ 104 105 #include "MsCommon.h" 106 //#include "drvDMD_common.h" 107 #ifdef __cplusplus 108 extern "C" 109 { 110 #endif 111 112 113 //------------------------------------------------------------------------------------------------- 114 // Driver Capability 115 //------------------------------------------------------------------------------------------------- 116 #define SUPPORT_MULTI_DEMOD 1 //0 117 118 //------------------------------------------------------------------------------------------------- 119 // Macro and Define 120 //------------------------------------------------------------------------------------------------- 121 #define MSIF_DMD_MSB201X_INTERN_LIB_CODE {'1','2', '4','x'} //Lib code 122 #define MSIF_DMD_MSB201X_INTERN_LIBVER {'0','1'} //LIB version 123 #define MSIF_DMD_MSB201X_INTERN_BUILDNUM {'0','0' } //Build Number 124 #define MSIF_DMD_MSB201X_INTERN_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 125 126 #define DEMOD_MAX_INSTANCE 2 127 #define DEMOD_MAX_CHANNEL 2 128 129 #define DMD_MSB201X_EXTERN_VER /* Character String for DRV/API version */ \ 130 MSIF_TAG, /* 'MSIF' */ \ 131 MSIF_CLASS, /* '00' */ \ 132 MSIF_CUS, /* 0x0000 */ \ 133 MSIF_MOD, /* 0x0000 */ \ 134 MSIF_CHIP, \ 135 MSIF_CPU, \ 136 MSIF_DMD_MSB201X_INTERN_LIB_CODE, /* IP__ */ \ 137 MSIF_DMD_MSB201X_INTERN_LIBVER, /* 0.0 ~ Z.Z */ \ 138 MSIF_DMD_MSB201X_INTERN_BUILDNUM, /* 00 ~ 99 */ \ 139 MSIF_DMD_MSB201X_INTERN_CHANGELIST, /* CL# */ \ 140 MSIF_OS 141 142 #define IS_BITS_SET(val, bits) (((val)&(bits)) == (bits)) 143 144 //------------------------------------------------------------------------------------------------- 145 // Type and Structure 146 //------------------------------------------------------------------------------------------------- 147 148 typedef enum 149 { 150 E_DMD_MSB201X_DBGLV_NONE, // disable all the debug message 151 E_DMD_MSB201X_DBGLV_INFO, // information 152 E_DMD_MSB201X_DBGLV_NOTICE, // normal but significant condition 153 E_DMD_MSB201X_DBGLV_WARNING, // warning conditions 154 E_DMD_MSB201X_DBGLV_ERR, // error conditions 155 E_DMD_MSB201X_DBGLV_CRIT, // critical conditions 156 E_DMD_MSB201X_DBGLV_ALERT, // action must be taken immediately 157 E_DMD_MSB201X_DBGLV_EMERG, // system is unusable 158 E_DMD_MSB201X_DBGLV_DEBUG, // debug-level messages 159 } eDMD_MSB201X_DbgLv; 160 161 typedef enum 162 { 163 E_DMD_DVBC_PARAM_VERSION, //0x00 164 E_DMD_DVBC_OP_AUTO_IQ, 165 E_DMD_DVBC_OP_AUTO_SCAN_SYM_RATE, 166 E_DMD_DVBC_OP_AUTO_SCAN_QAM, 167 E_DMD_DVBC_OP_ZIF_EN, 168 E_DMD_DVBC_OP_LIF_EN, 169 E_DMD_DVBC_IF_INV_PWM_OUT_EN, 170 E_DMD_DVBC_CFG_FIF_L, 171 E_DMD_DVBC_CFG_FIF_H, 172 E_DMD_DVBC_CFG_BW0_L, 173 E_DMD_DVBC_CFG_BW0_H, 174 E_DMD_DVBC_CFG_QAM, 175 E_DMD_DVBC_CFG_IQ_SWAP, 176 E_DMD_DVBC_CFG_CCI, 177 E_DMD_DVBC_AGC_REF_L, 178 E_DMD_DVBC_AGC_REF_H, 179 E_DMD_DVBC_NO_SIGNAL_NUM_TH, 180 E_DMD_DVBC_NO_SIGNAL_GAIN_TH_L, 181 E_DMD_DVBC_NO_SIGNAL_GAIN_TH_H, 182 E_DMD_DVBC_NO_SIGNAL_ERR_TH_L, 183 E_DMD_DVBC_NO_SIGNAL_ERR_TH_H, 184 E_DMD_DVBC_CHIP_VERSION, //0x10 185 } eDMD_MSB201X_Param; 186 187 typedef enum 188 { 189 DMD_DVBC_QAM16 = 0, 190 DMD_DVBC_QAM32 = 1, 191 DMD_DVBC_QAM64 = 2, 192 DMD_DVBC_QAM128 = 3, 193 DMD_DVBC_QAM256 = 4, 194 DMD_DVBC_QAMAUTO = 128, 195 } eDMD_MSB201X_MODULATION_TYPE; 196 197 typedef enum 198 { 199 DMD_DVBC_GETLOCK, 200 DMD_DVBC_GETLOCK_FEC_LOCK, 201 DMD_DVBC_GETLOCK_PSYNC_LOCK, 202 DMD_DVBC_GETLOCK_TPS_LOCK, 203 DMD_DVBC_GETLOCK_DCR_LOCK, 204 DMD_DVBC_GETLOCK_AGC_LOCK, 205 DMD_DVBC_GETLOCK_MODE_DET, 206 DMD_DVBC_GETLOCK_NO_CHANNEL, 207 DMD_DVBC_GETLOCK_ATV_DETECT, 208 DMD_DVBC_GETLOCK_TR_LOCK, 209 DMD_DVBC_GETLOCK_TR_EVER_LOCK, 210 } eDMD_MSB201X_GETLOCK_TYPE; 211 212 typedef enum 213 { 214 DMD_DVBC_LOCK, 215 DMD_DVBC_CHECKING, 216 DMD_DVBC_CHECKEND, 217 DMD_DVBC_UNLOCK, 218 DMD_DVBC_NULL, 219 } eDMD_MSB201X_LOCK_STATUS; 220 221 typedef enum 222 { 223 E_DMD_MSB201X_DEMOD_I2C_DYNAMIC_SLAVE_ID_1, 224 E_DMD_MSB201X_DEMOD_I2C_DYNAMIC_SLAVE_ID_2, 225 E_DMD_MSB201X_DEMOD_I2C_DYNAMIC_SLAVE_ID_3, 226 E_DMD_MSB201X_DEMOD_I2C_DYNAMIC_SLAVE_ID_4 227 } eDMD_MSB201X_DemodI2CSlaveID; 228 229 typedef enum 230 { 231 E_DMD_MSB201X_DEMOD_I2C_READ_BYTES, 232 E_DMD_MSB201X_DEMOD_I2C_WRITE_BYTES 233 } eDMD_MSB201X_DemodI2CMethod; 234 235 236 typedef enum 237 { 238 DEMOD0, 239 DEMOD1, 240 ALL_DEMOD 241 } eDMD_MSB201X_Demod_Index; 242 243 typedef struct 244 { 245 float power_db; 246 MS_U8 agc_val; 247 }sDMD_MSB201X_IFAGC_SSI; 248 249 typedef struct 250 { 251 float attn_db; 252 MS_U8 agc_err; 253 }sDMD_MSB201X_IFAGC_ERR; 254 255 typedef struct 256 { 257 MS_U16 u16Version; 258 MS_U16 u16SymbolRate; 259 eDMD_MSB201X_MODULATION_TYPE eQamMode; 260 MS_U32 u32IFFreq; 261 MS_BOOL bSpecInv; 262 MS_BOOL bSerialTS; 263 MS_U8 u8SarValue; 264 MS_U32 u32ChkScanTimeStart; 265 MS_U16 u16Strength; 266 MS_U16 u16Quality; 267 MS_U32 u32Intp; // 268 MS_U32 u32FcFs; // 269 MS_U8 u8Qam; // 270 MS_U16 u16SymbolRateHal; // 271 } sDMD_MSB201X_Info; 272 273 typedef struct 274 { 275 sDMD_MSB201X_IFAGC_SSI *pIFAGC_SSI; 276 sDMD_MSB201X_IFAGC_ERR *pIFAGC_ERR; 277 MS_U16 IFAGC_SSI_Length; 278 MS_U16 IFAGC_ERR_Length; 279 } sDMD_MSB201X_IFAGC; 280 281 /// For demod init 282 typedef struct 283 { 284 MS_U8 u8WO_SPI_Flash; 285 MS_BOOL bPreloadDSPCodeFromMainCHIPI2C; 286 MS_BOOL bFlashWPEnable; 287 void (*fpGPIOReset)(MS_BOOL bOnOff); 288 MS_BOOL (*fpMSB201X_I2C_Access)(MS_U8 u8DevID, eDMD_MSB201X_DemodI2CMethod eMethod, MS_U8 u8AddrSize, MS_U8 *pu8Addr, MS_U16 u16Size, MS_U8 *pu8Data); 289 MS_U8* pDVBC_DSP_REG; 290 MS_U8 DVBC_DSP_REG_Length; 291 sDMD_MSB201X_IFAGC IFAGC_Data[DEMOD_MAX_CHANNEL]; 292 MS_BOOL bEnableSPILoadCode; 293 void (*fpMSB201X_SPIPAD_En)(MS_BOOL bOnOff); 294 MS_U8 u8WO_Sdram;// 1 means no sdram on board 295 } sDMD_MSB201X_InitData; 296 297 298 typedef enum 299 { 300 E_DMD_MSB201X_DEMOD_NONE, 301 E_DMD_MSB201X_DEMOD_DVBC, 302 } eDMD_MSB201X_DemodulatorType; 303 304 305 //TS parameter area 306 typedef enum 307 { 308 E_DMD_MSB201X_PARALLEL, 309 E_DMD_MSB201X_3_WIRE_REMUX2TS0, 310 E_DMD_MSB201X_3_WIRE_REMUX2TS1, 311 E_DMD_MSB201X_3_WIRE_REMUX2TS2, 312 E_DMD_MSB201X_3_WIRE_REMUX2TS3, 313 E_DMD_MSB201X_3_WIRE_REMUX2TS4, 314 E_DMD_MSB201X_3_WIRE_REMUX2TS5, 315 E_DMD_MSB201X_3_WIRE_REMUX2TS6, 316 E_DMD_MSB201X_3_WIRE_REMUX2TS7, 317 E_DMD_MSB201X_3_WIRE_DMD0_TS0_DMD1_TS1, 318 E_DMD_MSB201X_3_WIRE_DMD0_TS1_DMD1_TS0, 319 E_DMD_MSB201X_4_WIRE_REMUX2TS0, 320 E_DMD_MSB201X_4_WIRE_REMUX2TS1, 321 E_DMD_MSB201X_4_WIRE_REMUX2TS2, 322 E_DMD_MSB201X_4_WIRE_REMUX2TS3, 323 E_DMD_MSB201X_4_WIRE_REMUX2TS4, 324 E_DMD_MSB201X_4_WIRE_REMUX2TS5, 325 E_DMD_MSB201X_4_WIRE_DMD0_TS0_DMD1_TS1, 326 E_DMD_MSB201X_4_WIRE_DMD0_TS1_DMD1_TS0, 327 E_DMD_MSB201X_TS_MODE_MAX 328 }eDMD_MSB201X_TS_MODE; 329 330 typedef enum 331 { 332 E_DMD_MSB201X_TS_CLK_AUTO , 333 E_DMD_MSB201X_TS_CLK_216MHz , 334 E_DMD_MSB201X_TS_CLK_108MHz , 335 E_DMD_MSB201X_TS_CLK_72MHz , 336 E_DMD_MSB201X_TS_CLK_54MHz , 337 E_DMD_MSB201X_TS_CLK_43p2MHz, 338 E_DMD_MSB201X_TS_CLK_36MHz , 339 E_DMD_MSB201X_TS_CLK_30p8MHz, 340 E_DMD_MSB201X_TS_CLK_27MHz , 341 E_DMD_MSB201X_TS_CLK_24MHz , 342 E_DMD_MSB201X_TS_CLK_21p6MHz, 343 E_DMD_MSB201X_TS_CLK_19p6MHz, 344 E_DMD_MSB201X_TS_CLK_18MHz , 345 E_DMD_MSB201X_TS_CLK_16p6MHz, 346 E_DMD_MSB201X_TS_CLK_15p4MHz, 347 E_DMD_MSB201X_TS_CLK_14p4MHz, 348 E_DMD_MSB201X_TS_CLK_13p5MHz, 349 E_DMD_MSB201X_TS_CLK_MAX , 350 } eDMD_MSB201X_TS_CLK; 351 352 typedef enum 353 { 354 E_DMD_MSB201X_TS_DRVING_LO, //4mA 355 E_DMD_MSB201X_TS_DRVING_HI, //8mA 356 E_DMD_MSB201X_TS_DRVING_MAX //8mA 357 } eDMD_MSB201X_TS_DRVING; 358 359 typedef enum 360 { 361 E_MSB201X_I2C_READ_WRITE, 362 E_MSB201X_SPI_READ_WRITE, 363 } e_MSB201X_DSP_ReadWrite; 364 365 typedef struct 366 { 367 MS_BOOL bEnable[DEMOD_MAX_CHANNEL]; 368 eDMD_MSB201X_TS_MODE eTSMode; 369 eDMD_MSB201X_TS_CLK eTSClk; 370 eDMD_MSB201X_TS_DRVING eTSDrv; 371 MS_BOOL bLSB1st[DEMOD_MAX_CHANNEL]; 372 MS_BOOL bRemuxLSB1st; 373 MS_BOOL bCLKInverse; 374 } sDMD_MSB201X_TS_Param; 375 376 typedef struct 377 { 378 MS_U8 *pHeaderPtr; 379 MS_U8 u8HeaderSize; 380 MS_BOOL bEnable; 381 } sDMD_MSB201X_extHeader; 382 383 typedef struct 384 { 385 MS_U8 *pHeaderPtr; 386 MS_BOOL bEnable; 387 } sDMD_MSB201X_CIHeader; 388 389 //------------------------------------------------------------------------------------------------- 390 // Function and Variable 391 //------------------------------------------------------------------------------------------------- 392 //////////////////////////////////////////////////////////////////////////////// 393 //------------------------------------------------------------------------------ 394 /// Set detailed level of DVBT driver debug message 395 /// u8DbgLevel : debug level for Parallel Flash driver\n 396 /// AVD_DBGLV_NONE, ///< disable all the debug message\n 397 /// AVD_DBGLV_INFO, ///< information\n 398 /// AVD_DBGLV_NOTICE, ///< normal but significant condition\n 399 /// AVD_DBGLV_WARNING, ///< warning conditions\n 400 /// AVD_DBGLV_ERR, ///< error conditions\n 401 /// AVD_DBGLV_CRIT, ///< critical conditions\n 402 /// AVD_DBGLV_ALERT, ///< action must be taken immediately\n 403 /// AVD_DBGLV_EMERG, ///< system is unusable\n 404 /// AVD_DBGLV_DEBUG, ///< debug-level messages\n 405 /// @return TRUE : succeed 406 /// @return FALSE : failed to set the debug level 407 //------------------------------------------------------------------------------ 408 //extern MS_BOOL MDrv_DMD_MSB201X_SetDbgLevel(eDMD_MSB201X_DbgLv u8DbgLevel); 409 //------------------------------------------------------------------------------------------------- 410 /// Get the information of DVBT driver\n 411 /// @return the pointer to the driver information 412 //------------------------------------------------------------------------------------------------- 413 //extern DMD_DVBT_Info* MDrv_DMD_DVBT_GetInfo(DMD_DVBT_INFO_TYPE eInfoType); 414 //------------------------------------------------------------------------------------------------- 415 /// Get DVBT driver version 416 /// when get ok, return the pointer to the driver version 417 //------------------------------------------------------------------------------------------------- 418 //extern MS_BOOL MDrv_DMD_MSB201X_GetLibVer(const MSIF_Version **ppVersion); 419 //////////////////////////////////////////////////////////////////////////////// 420 /// Get DVBT FW version 421 /// u16Addr : the address of DVBT's register\n 422 //////////////////////////////////////////////////////////////////////////////// 423 //extern MS_BOOL MDrv_DMD_MSB201X_GetFWVer(MS_U16 *ver); 424 //////////////////////////////////////////////////////////////////////////////// 425 /// To get DVBT's register value, only for special purpose.\n 426 /// u16Addr : the address of DVBT's register\n 427 /// return the value of AFEC's register\n 428 //////////////////////////////////////////////////////////////////////////////// 429 extern MS_BOOL MDrv_DMD_MSB201X_GetReg(MS_U8 devID, MS_U32 u32Addr, MS_U8 *pu8Data); 430 //////////////////////////////////////////////////////////////////////////////// 431 /// To set DVBT's register value, only for special purpose.\n 432 /// u16Addr : the address of DVBT's register\n 433 /// u8Value : the value to be set\n 434 //////////////////////////////////////////////////////////////////////////////// 435 extern MS_BOOL MDrv_DMD_MSB201X_SetReg(MS_U8 devID, MS_U32 u32Addr, MS_U8 u8Data); 436 //////////////////////////////////////////////////////////////////////////////// 437 /// To set DVBT's register value, only for special purpose.\n 438 /// u16Addr : the address of DVBT's register\n 439 /// u8Value : the value to be set\n 440 //////////////////////////////////////////////////////////////////////////////// 441 extern MS_BOOL MDrv_DMD_MSB201X_SetRegs(MS_U8 devID, MS_U32 u32Addr, MS_U8* u8pData, MS_U16 data_size); 442 //////////////////////////////////////////////////////////////////////////////// 443 /// To set DVBT's register value, only for special purpose.\n 444 /// u16Addr : the address of DVBT's register\n 445 /// u8Value : the value to be set\n 446 //////////////////////////////////////////////////////////////////////////////// 447 extern MS_BOOL MDrv_DMD_MSB201X_SetReg2Bytes(MS_U8 devID, MS_U32 u32Addr, MS_U16 u16Data); 448 //////////////////////////////////////////////////////////////////////////////// 449 /// To get DVBT's register value, only for special purpose.\n 450 /// u16Addr : the address of DVBT's register\n 451 /// return the value of AFEC's register\n 452 //////////////////////////////////////////////////////////////////////////////// 453 extern MS_BOOL MDrv_DMD_MSB201X_GetDSPReg(MS_U8 devID, MS_U8 u8DemodIndex, MS_U16 u16Addr, MS_U8 *pu8Data); 454 //////////////////////////////////////////////////////////////////////////////// 455 /// To set DVBT's register value, only for special purpose.\n 456 /// u16Addr : the address of DVBT's register\n 457 /// u8Value : the value to be set\n 458 //////////////////////////////////////////////////////////////////////////////// 459 extern MS_BOOL MDrv_DMD_MSB201X_SetDSPReg(MS_U8 devID, MS_U8 u8DemodIndex, MS_U16 u16Addr, MS_U8 u8Data); 460 461 /// MDrv_DMD_MSB201X_LoadDSPCode 462 //////////////////////////////////////////////////////////////////////////////// 463 extern MS_BOOL MDrv_DMD_MSB201X_LoadDSPCode(MS_U8 devID); 464 //////////////////////////////////////////////////////////////////////////////// 465 /// Get lock 466 extern MS_BOOL MDrv_DMD_MSB201X_Demod_GetLock(MS_U8 devID, MS_U8 u8DemodIndex); 467 //////////////////////////////////////////////////////////////////////////////////// 468 /// Demod init 469 extern MS_BOOL MDrv_DMD_MSB201X_Init(MS_U8 devID, MS_U8 u8DemodIndex, sDMD_MSB201X_InitData *pDMD_MSB201X_InitData, MS_U32 u32InitDataLen); 470 //////////////////////////////////////////////////////////////////////////////////// 471 /// power on init 472 //////////////////////////////////////////////////////////////////////////////// 473 extern MS_BOOL MDrv_DMD_MSB201X_Power_On_Initialization(MS_U8 devID, MS_U8 u8DemodIndex); 474 //////////////////////////////////////////////////////////////////////////////// 475 extern MS_BOOL MDrv_DMD_MSB201X_GetPacketErr(MS_U8 devID,MS_U8 u8DemodIndex, MS_U16 *pktErr); 476 extern MS_BOOL MDrv_DMD_MSB201X_Restart(MS_U8 devID, MS_U8 u8DemodIndex); 477 //extern MS_BOOL MDrv_DMD_MSB201X_CfgExtHeader(MS_U8 devID, MS_U8 u8DemodIndex, MS_U8 u8HeaderSize, MS_U8* pHeaderPtr, MS_U8 u8HeaderEnable); 478 extern MS_BOOL MDrv_DMD_MSB201X_Exit(MS_U8 devID); 479 extern MS_BOOL MDrv_DMD_MSB201X_SetActive(MS_U8 devID, MS_U8 u8DemodIndex, MS_BOOL bEnable); 480 extern MS_BOOL MDrv_DMD_MSB201X_GetFWVer(MS_U8 devID, MS_U8 u8DemodIndex, MS_U16 *ver); 481 extern MS_BOOL MDrv_DMD_MSB201X_GetPacketErr(MS_U8 devID,MS_U8 u8DemodIndex, MS_U16 *pktErr); 482 extern MS_BOOL MDrv_DMD_MSB201X_GetPostViterbiBer(MS_U8 devID,MS_U8 u8DemodIndex, float *ber); 483 extern MS_BOOL MDrv_DMD_MSB201X_GetSNR(MS_U8 devID,MS_U8 u8DemodIndex, float *fSNR); 484 extern MS_BOOL MDrv_DMD_MSB201X_GetLock(MS_U8 devID, MS_U8 u8DemodIndex, eDMD_MSB201X_GETLOCK_TYPE eType, eDMD_MSB201X_LOCK_STATUS *eLockStatus); 485 extern MS_BOOL MDrv_DMD_MSB201X_GetLockWithRFPower(MS_U8 devID, MS_U8 u8DemodIndex, eDMD_MSB201X_GETLOCK_TYPE eType, eDMD_MSB201X_LOCK_STATUS *eLockStatus, float fCurrRFPowerDbm, float fNoChannelRFPowerDbm); 486 extern MS_BOOL MDrv_DMD_MSB201X_GetRFLevel(MS_U8 devID, MS_U8 u8DemodIndex, float *fRFPowerDbmResult, float fRFPowerDbm); 487 extern MS_BOOL MDrv_DMD_MSB201X_GetStatus(MS_U8 devID, MS_U8 u8DemodIndex, eDMD_MSB201X_MODULATION_TYPE *pQAMMode, MS_U16 *u16SymbolRate, float *pFreqOff); 488 extern MS_BOOL MDrv_DMD_MSB201X_I2C_BYPASS(MS_U8 devID,MS_U8 bypass_en); 489 extern MS_BOOL MDrv_DMD_MSB201X_SetConfig(MS_U8 devID, MS_U8 u8DemodIndex, MS_U16 u16SymbolRate, eDMD_MSB201X_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv); 490 491 extern MS_BOOL MDrv_DMD_MSB201X_CfgExtHeader(MS_U8 devID, MS_U8 u8DemodIndex, sDMD_MSB201X_extHeader *pDMD_MSB201X_extHeader_Param); 492 extern MS_BOOL MDrv_DMD_MSB201X_Set_TSOut(MS_U8 devID, sDMD_MSB201X_TS_Param *pDMD_MSB201X_TS_Param); 493 #ifdef __cplusplus 494 } 495 #endif 496 497 498 #endif 499 500