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Searched refs:SCLK_SPI0 (Results 1 – 25 of 29) sorted by relevance

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/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3066.c346 case SCLK_SPI0: in rockchip_spi_get_clk()
367 case SCLK_SPI0: in rockchip_spi_set_clk()
488 case SCLK_SPI0: in rk3066_clk_get_rate()
527 case SCLK_SPI0: in rk3066_clk_set_rate()
H A Dclk_rk3188.c350 case SCLK_SPI0: in rockchip_spi_get_clk()
372 case SCLK_SPI0: in rockchip_spi_set_clk()
521 case SCLK_SPI0: in rk3188_clk_get_rate()
565 case SCLK_SPI0: in rk3188_clk_set_rate()
H A Dclk_rk3368.c520 case SCLK_SPI0 ... SCLK_SPI2: in rk3368_spi_get_clk()
521 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3368_spi_get_clk()
545 case SCLK_SPI0 ... SCLK_SPI2: in rk3368_spi_set_clk()
546 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3368_spi_set_clk()
949 case SCLK_SPI0 ... SCLK_SPI2: in rk3368_clk_get_rate()
1026 case SCLK_SPI0 ... SCLK_SPI2: in rk3368_clk_set_rate()
H A Dclk_rk3399.c704 case SCLK_SPI0 ... SCLK_SPI5: in rk3399_spi_get_clk()
705 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3399_spi_get_clk()
730 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3399_spi_set_clk()
1169 case SCLK_SPI0...SCLK_SPI5: in rk3399_clk_get_rate()
1260 case SCLK_SPI0...SCLK_SPI5: in rk3399_clk_set_rate()
H A Dclk_rk3308.c443 case SCLK_SPI0: in rk3308_spi_get_clk()
473 case SCLK_SPI0: in rk3308_spi_set_clk()
973 case SCLK_SPI0: in rk3308_clk_get_rate()
1069 case SCLK_SPI0: in rk3308_clk_set_rate()
H A Dclk_rk1808.c415 case SCLK_SPI0: in rk1808_spi_get_clk()
445 case SCLK_SPI0: in rk1808_spi_set_clk()
958 case SCLK_SPI0: in rk1808_clk_get_rate()
1062 case SCLK_SPI0: in rk1808_clk_set_rate()
H A Dclk_rk3288.c806 case SCLK_SPI0: in rockchip_spi_get_clk()
838 case SCLK_SPI0: in rockchip_spi_set_clk()
1098 case SCLK_SPI0: in rk3288_clk_get_rate()
1177 case SCLK_SPI0: in rk3288_clk_set_rate()
H A Dclk_rk3128.c570 case SCLK_SPI0: in rk3128_clk_get_rate()
640 case SCLK_SPI0: in rk3128_clk_set_rate()
H A Dclk_px30.c761 case SCLK_SPI0: in px30_spi_get_clk()
786 case SCLK_SPI0: in px30_spi_set_clk()
1349 case SCLK_SPI0: in px30_clk_get_rate()
1435 case SCLK_SPI0: in px30_clk_set_rate()
H A Dclk_rk322x.c603 case SCLK_SPI0: in rk322x_clk_get_rate()
677 case SCLK_SPI0: in rk322x_clk_set_rate()
/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Dexynos7420-clk.h112 #define SCLK_SPI0 17 macro
H A Drk3188-cru-common.h26 #define SCLK_SPI0 69 macro
H A Drk3128-cru.h20 #define SCLK_SPI0 65 macro
H A Drk3228-cru.h18 #define SCLK_SPI0 65 macro
H A Drk3308-cru.h40 #define SCLK_SPI0 27 macro
H A Drv1108-cru.h17 #define SCLK_SPI0 65 macro
H A Dpx30-cru.h51 #define SCLK_SPI0 36 macro
H A Drk3288-cru.h18 #define SCLK_SPI0 65 macro
H A Drk3368-cru.h30 #define SCLK_SPI0 65 macro
H A Drk1808-cru.h74 #define SCLK_SPI0 73 macro
H A Drk3399-cru.h30 #define SCLK_SPI0 71 macro
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3xxx.dtsi397 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3128.dtsi595 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3308.dtsi231 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
H A Drk3368.dtsi296 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;

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