Searched refs:CLK_PWM2_SEL_SHIFT (Results 1 – 14 of 14) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rv1103b.h | 215 CLK_PWM2_SEL_SHIFT = 14, enumerator
216 CLK_PWM2_SEL_MASK = 1 << CLK_PWM2_SEL_SHIFT,
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| H A D | cru_rv1106.h | 224 CLK_PWM2_SEL_SHIFT = 11, enumerator
225 CLK_PWM2_SEL_MASK = 0x3 << CLK_PWM2_SEL_SHIFT,
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| H A D | cru_rv1126.h | 290 CLK_PWM2_SEL_SHIFT = 15, enumerator
291 CLK_PWM2_SEL_MASK = 1 << CLK_PWM2_SEL_SHIFT,
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| H A D | cru_rv1126b.h | 324 CLK_PWM2_SEL_SHIFT = 10, enumerator
325 CLK_PWM2_SEL_MASK = 0x1 << CLK_PWM2_SEL_SHIFT,
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| H A D | cru_rk3588.h | 243 CLK_PWM2_SEL_SHIFT = 14, enumerator
244 CLK_PWM2_SEL_MASK = 3 << CLK_PWM2_SEL_SHIFT,
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| H A D | cru_rk3568.h | 458 CLK_PWM2_SEL_SHIFT = 10, enumerator
459 CLK_PWM2_SEL_MASK = 3 << CLK_PWM2_SEL_SHIFT,
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| H A D | cru_rk3576.h | 331 CLK_PWM2_SEL_SHIFT = 6, enumerator
332 CLK_PWM2_SEL_MASK = 3 << CLK_PWM2_SEL_SHIFT,
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rv1103b.c | 495 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1103b_pwm_get_clk()
537 src_clk << CLK_PWM2_SEL_SHIFT); in rv1103b_pwm_set_clk()
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| H A D | clk_rv1106.c | 637 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1106_pwm_get_clk()
682 src_clk << CLK_PWM2_SEL_SHIFT); in rv1106_pwm_set_clk()
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| H A D | clk_rv1126.c | 886 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1126_pwm_get_clk()
901 CLK_PWM2_SEL_XIN24M << CLK_PWM2_SEL_SHIFT); in rv1126_pwm_set_clk()
909 CLK_PWM2_SEL_GPLL << CLK_PWM2_SEL_SHIFT); in rv1126_pwm_set_clk()
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| H A D | clk_rv1126b.c | 594 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1126b_pwm_get_clk()
645 src_clk << CLK_PWM2_SEL_SHIFT); in rv1126b_pwm_set_clk()
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| H A D | clk_rk3588.c | 586 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rk3588_pwm_get_clk()
634 src_clk << CLK_PWM2_SEL_SHIFT); in rk3588_pwm_set_clk()
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| H A D | clk_rk3576.c | 633 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rk3576_pwm_get_clk()
677 src_clk << CLK_PWM2_SEL_SHIFT); in rk3576_pwm_set_clk()
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| H A D | clk_rk3568.c | 1173 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rk3568_pwm_get_clk()
1214 src_clk << CLK_PWM2_SEL_SHIFT); in rk3568_pwm_set_clk()
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