Searched refs:CLK_RTC_32K (Results 1 – 15 of 15) sorted by relevance
| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3568-evb2-lp4x-v10.dtsi | 403 clocks = <&pmucru CLK_RTC_32K>; 461 clocks = <&pmucru CLK_RTC_32K>;
|
| H A D | rk3568-evb6-ddr3-v10.dtsi | 380 clocks = <&pmucru CLK_RTC_32K>; 428 clocks = <&pmucru CLK_RTC_32K>;
|
| H A D | rk3566-box-demo-v10.dtsi | 41 clocks = <&pmucru CLK_RTC_32K>; 112 clocks = <&pmucru CLK_RTC_32K>;
|
| H A D | rk3568.dtsi | 863 assigned-clock-parents = <&pmucru CLK_RTC_32K>; 874 <&pmucru CLK_RTC_32K>, <&cru ACLK_RKVDEC_PRE>,
|
| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | rv1106-cru.h | 289 #define CLK_RTC_32K 284 macro
|
| H A D | rk3562-cru.h | 283 #define CLK_RTC_32K 273 macro
|
| H A D | rk3568-cru.h | 18 #define CLK_RTC_32K 5 macro
|
| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | rv1106-cru.h | 290 #define CLK_RTC_32K 284 macro
|
| H A D | rk3562-cru.h | 283 #define CLK_RTC_32K 273 macro
|
| H A D | rk3568-cru.h | 18 #define CLK_RTC_32K 5 macro
|
| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3568.c | 389 case CLK_RTC_32K: in rk3568_pmuclk_get_rate() 433 case CLK_RTC_32K: in rk3568_pmuclk_set_rate() 471 case CLK_RTC_32K: in rk3568_pmuclk_set_parent()
|
| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | clk-rk3562.c | 201 MUX(CLK_RTC_32K, "clk_rtc_32k", clk_rtc32k_pmu_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
|
| H A D | clk-rv1106.c | 272 MUX(CLK_RTC_32K, "clk_rtc_32k", clk_rtc32k_pmu_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
|
| H A D | clk-rk3568.c | 430 MUX(CLK_RTC_32K, "clk_rtc_32k", clk_rtc32k_pmu_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
|
| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | rk3568.dtsi | 562 <&pmucru CLK_RTC_32K>, <&pmucru PLL_PPLL>,
|