1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3568.dtsi" 12#include "rk3568-evb.dtsi" 13 14/ { 15 model = "Rockchip RK3568 EVB2 LP4X V10 Board"; 16 compatible = "rockchip,rk3568-evb2-lp4x-v10", "rockchip,rk3568"; 17 18 rk_headset: rk-headset { 19 compatible = "rockchip_headset"; 20 headset_gpio = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&hp_det>; 23 }; 24 25 vcc2v5_sys: vcc2v5-ddr { 26 compatible = "regulator-fixed"; 27 regulator-name = "vcc2v5-sys"; 28 regulator-always-on; 29 regulator-boot-on; 30 regulator-min-microvolt = <2500000>; 31 regulator-max-microvolt = <2500000>; 32 vin-supply = <&vcc3v3_sys>; 33 }; 34 35 vcc3v3_pcie: gpio-regulator { 36 compatible = "regulator-fixed"; 37 regulator-name = "vcc3v3_pcie"; 38 regulator-min-microvolt = <3300000>; 39 regulator-max-microvolt = <3300000>; 40 enable-active-high; 41 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 42 startup-delay-us = <5000>; 43 vin-supply = <&dc_12v>; 44 }; 45 46 qsgmii_3v3: gpio-regulator { 47 compatible = "regulator-gpio"; 48 regulator-name = "qsgmii_3v3"; 49 regulator-min-microvolt = <0100000>; 50 regulator-max-microvolt = <3300000>; 51 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 52 gpios-states = <0x1>; 53 states = <0100000 0x0 54 3300000 0x1>; 55 }; 56 57 vcc3v3_bu: vcc3v3-bu { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc3v3_bu"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <3300000>; 63 regulator-max-microvolt = <3300000>; 64 vin-supply = <&vcc5v0_sys>; 65 }; 66}; 67 68&bt_sound { 69 status = "disabled"; 70 simple-audio-card,cpu { 71 sound-dai = <&i2s2_2ch>; 72 }; 73}; 74 75&combphy0_us { 76 status = "okay"; 77}; 78 79&combphy1_usq { 80 status = "okay"; 81}; 82 83&combphy2_psq { 84 status = "okay"; 85}; 86 87/* 88 * video_phy0 needs to be enabled 89 * when dsi0 is enabled 90 */ 91&dsi0 { 92 status = "okay"; 93}; 94 95&dsi0_in_vp0 { 96 status = "disabled"; 97}; 98 99&dsi0_in_vp1 { 100 status = "okay"; 101}; 102 103&dsi0_panel { 104 power-supply = <&vcc3v3_lcd0_n>; 105}; 106 107/* 108 * video_phy1 needs to be enabled 109 * when dsi1 is enabled 110 */ 111&dsi1 { 112 status = "disabled"; 113}; 114 115&dsi1_in_vp0 { 116 status = "disabled"; 117}; 118 119&dsi1_in_vp1 { 120 status = "disabled"; 121}; 122 123&dsi1_panel { 124 power-supply = <&vcc3v3_lcd1_n>; 125}; 126 127&gmac0 { 128 phy-supply = <&qsgmii_3v3>; 129 phy-mode = "qsgmii"; 130 rockchip,xpcs = <&xpcs>; 131 132 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>; 133 assigned-clock-parents = <&gmac0_xpcsclk>; 134 135 power-domains = <&power RK3568_PD_PIPE>; 136 phys = <&combphy1_usq PHY_TYPE_QSGMII>; 137 phy-handle = <&qsgmii_phy0>; 138 139 status = "okay"; 140}; 141 142&gmac1 { 143 phy-supply = <&qsgmii_3v3>; 144 phy-mode = "qsgmii"; 145 146 snps,reset-gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; 147 snps,reset-active-low; 148 /* Reset time is 20ms, 100ms for rtl8211f */ 149 snps,reset-delays-us = <0 20000 100000>; 150 151 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>; 152 assigned-clock-parents = <&gmac1_xpcsclk>; 153 154 pinctrl-names = "default"; 155 pinctrl-0 = <&gmac1m1_miim>; 156 157 power-domains = <&power RK3568_PD_PIPE>; 158 phy-handle = <&qsgmii_phy1>; 159 160 status = "okay"; 161}; 162 163/* 164 * power-supply should switche to vcc3v3_lcd1_n 165 * when mipi panel is connected to dsi1. 166 */ 167>1x { 168 power-supply = <&vcc3v3_lcd0_n>; 169}; 170 171&i2c4 { 172 status = "okay"; 173 174 gs_mxc6655xa: gs_mxc6655xa@15 { 175 status = "okay"; 176 compatible = "gs_mxc6655xa"; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&mxc6655xa_irq_gpio>; 179 reg = <0x15>; 180 irq-gpio = <&gpio3 RK_PD7 IRQ_TYPE_LEVEL_LOW>; 181 irq_enable = <0>; 182 poll_delay_ms = <30>; 183 type = <SENSOR_TYPE_ACCEL>; 184 power-off-in-suspend = <1>; 185 layout = <1>; 186 }; 187}; 188 189&i2c5 { 190 status = "disabled"; 191}; 192 193&i2s2_2ch { 194 pinctrl-0 = <&i2s2m0_sclktx &i2s2m0_lrcktx &i2s2m0_sdi &i2s2m0_sdo>; 195 rockchip,bclk-fs = <32>; 196 status = "disabled"; 197}; 198 199&mdio1 { 200 qsgmii_phy0: phy@0 { 201 compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22"; 202 reg = <0x0>; 203 }; 204 qsgmii_phy1: phy@1 { 205 compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22"; 206 reg = <0x1>; 207 }; 208 qsgmii_phy2: phy@2 { 209 compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22"; 210 reg = <0x2>; 211 }; 212 qsgmii_phy3: phy@3 { 213 compatible = "ethernet-phy-id001c.c942", "ethernet-phy-ieee802.3-c22"; 214 reg = <0x3>; 215 }; 216}; 217 218&video_phy0 { 219 status = "okay"; 220}; 221 222&video_phy1 { 223 status = "disabled"; 224}; 225 226&pcie2x1 { 227 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 228 vpcie3v3-supply = <&vcc3v3_pcie>; 229 status = "okay"; 230}; 231 232&pcie30phy { 233 status = "okay"; 234}; 235 236&pcie3x2 { 237 reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 238 vpcie3v3-supply = <&vcc3v3_pcie>; 239 status = "okay"; 240}; 241 242&pinctrl { 243 headphone { 244 hp_det: hp-det { 245 rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 246 }; 247 }; 248 249 mxc6655xa { 250 mxc6655xa_irq_gpio: mxc6655xa_irq_gpio { 251 rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; 252 }; 253 }; 254 255 sii902x { 256 sii902x_hdmi_int: sii902x-hdmi-int { 257 rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 258 }; 259 }; 260 261 sdio-pwrseq { 262 wifi_enable_h: wifi-enable-h { 263 rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 264 }; 265 266 wifi_32k: wifi-32k { 267 rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>; 268 }; 269 }; 270 271 wireless-wlan { 272 wifi_host_wake_irq: wifi-host-wake-irq { 273 rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; 274 }; 275 }; 276 277 wireless-bluetooth { 278 uart1_gpios: uart1-gpios { 279 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 280 }; 281 }; 282}; 283 284&pmu_io_domains { 285 vccio6-supply = <&vcc_3v3>; 286}; 287 288&pwm3 { 289 status = "okay"; 290 291 compatible = "rockchip,remotectl-pwm"; 292 remote_pwm_id = <3>; 293 handle_cpu_id = <1>; 294 remote_support_psci = <0>; 295 pinctrl-names = "default"; 296 pinctrl-0 = <&pwm3_pins>; 297 298 ir_key1 { 299 rockchip,usercode = <0x4040>; 300 rockchip,key_table = 301 <0xf2 KEY_REPLY>, 302 <0xba KEY_BACK>, 303 <0xf4 KEY_UP>, 304 <0xf1 KEY_DOWN>, 305 <0xef KEY_LEFT>, 306 <0xee KEY_RIGHT>, 307 <0xbd KEY_HOME>, 308 <0xea KEY_VOLUMEUP>, 309 <0xe3 KEY_VOLUMEDOWN>, 310 <0xe2 KEY_SEARCH>, 311 <0xb2 KEY_POWER>, 312 <0xbc KEY_MUTE>, 313 <0xec KEY_MENU>, 314 <0xbf 0x190>, 315 <0xe0 0x191>, 316 <0xe1 0x192>, 317 <0xe9 183>, 318 <0xe6 248>, 319 <0xe8 185>, 320 <0xe7 186>, 321 <0xf0 388>, 322 <0xbe 0x175>; 323 }; 324 325 ir_key2 { 326 rockchip,usercode = <0xff00>; 327 rockchip,key_table = 328 <0xf9 KEY_HOME>, 329 <0xbf KEY_BACK>, 330 <0xfb KEY_MENU>, 331 <0xaa KEY_REPLY>, 332 <0xb9 KEY_UP>, 333 <0xe9 KEY_DOWN>, 334 <0xb8 KEY_LEFT>, 335 <0xea KEY_RIGHT>, 336 <0xeb KEY_VOLUMEDOWN>, 337 <0xef KEY_VOLUMEUP>, 338 <0xf7 KEY_MUTE>, 339 <0xe7 KEY_POWER>, 340 <0xfc KEY_POWER>, 341 <0xa9 KEY_VOLUMEDOWN>, 342 <0xa8 KEY_VOLUMEDOWN>, 343 <0xe0 KEY_VOLUMEDOWN>, 344 <0xa5 KEY_VOLUMEDOWN>, 345 <0xab 183>, 346 <0xb7 388>, 347 <0xe8 388>, 348 <0xf8 184>, 349 <0xaf 185>, 350 <0xed KEY_VOLUMEDOWN>, 351 <0xee 186>, 352 <0xb3 KEY_VOLUMEDOWN>, 353 <0xf1 KEY_VOLUMEDOWN>, 354 <0xf2 KEY_VOLUMEDOWN>, 355 <0xf3 KEY_SEARCH>, 356 <0xb4 KEY_VOLUMEDOWN>, 357 <0xbe KEY_SEARCH>; 358 }; 359 360 ir_key3 { 361 rockchip,usercode = <0x1dcc>; 362 rockchip,key_table = 363 <0xee KEY_REPLY>, 364 <0xf0 KEY_BACK>, 365 <0xf8 KEY_UP>, 366 <0xbb KEY_DOWN>, 367 <0xef KEY_LEFT>, 368 <0xed KEY_RIGHT>, 369 <0xfc KEY_HOME>, 370 <0xf1 KEY_VOLUMEUP>, 371 <0xfd KEY_VOLUMEDOWN>, 372 <0xb7 KEY_SEARCH>, 373 <0xff KEY_POWER>, 374 <0xf3 KEY_MUTE>, 375 <0xbf KEY_MENU>, 376 <0xf9 0x191>, 377 <0xf5 0x192>, 378 <0xb3 388>, 379 <0xbe KEY_1>, 380 <0xba KEY_2>, 381 <0xb2 KEY_3>, 382 <0xbd KEY_4>, 383 <0xf9 KEY_5>, 384 <0xb1 KEY_6>, 385 <0xfc KEY_7>, 386 <0xf8 KEY_8>, 387 <0xb0 KEY_9>, 388 <0xb6 KEY_0>, 389 <0xb5 KEY_BACKSPACE>; 390 }; 391}; 392 393&pwm7 { 394 status = "disabled"; 395}; 396 397&route_dsi0 { 398 status = "okay"; 399 connect = <&vp1_out_dsi0>; 400}; 401 402&sdio_pwrseq { 403 clocks = <&pmucru CLK_RTC_32K>; 404 pinctrl-0 = <&wifi_enable_h &wifi_32k>; 405 406 /* 407 * On the module itself this is one of these (depending 408 * on the actual card populated): 409 * - SDIO_RESET_L_WL_REG_ON 410 * - PDN (power down when low) 411 */ 412 reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; 413}; 414 415&sdmmc1 { 416 max-frequency = <150000000>; 417 no-sd; 418 no-mmc; 419 bus-width = <4>; 420 disable-wp; 421 cap-sd-highspeed; 422 cap-sdio-irq; 423 keep-power-in-suspend; 424 mmc-pwrseq = <&sdio_pwrseq>; 425 non-removable; 426 pinctrl-names = "default"; 427 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 428 sd-uhs-sdr104; 429 status = "okay"; 430}; 431 432&sdmmc2 { 433 status = "disabled"; 434}; 435 436&uart1 { 437 status = "okay"; 438 pinctrl-names = "default"; 439 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 440}; 441 442&vcc3v3_lcd0_n { 443 gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 444 enable-active-high; 445}; 446 447&vcc3v3_lcd1_n { 448 gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 449 enable-active-high; 450}; 451 452&wireless_wlan { 453 pinctrl-names = "default"; 454 pinctrl-0 = <&wifi_host_wake_irq>; 455 WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; 456 WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 457}; 458 459&wireless_bluetooth { 460 compatible = "bluetooth-platdata"; 461 clocks = <&pmucru CLK_RTC_32K>; 462 clock-names = "ext_clock"; 463 //wifi-bt-power-toggle; 464 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 465 pinctrl-names = "default", "rts_gpio"; 466 pinctrl-0 = <&uart1m0_rtsn>; 467 pinctrl-1 = <&uart1_gpios>; 468 BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 469 BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 470 BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 471 status = "okay"; 472}; 473 474&xpcs { 475 status = "okay"; 476}; 477