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Searched +full:vf610 +full:- +full:i2c (Results 1 – 25 of 45) sorted by relevance

12

/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dvfxxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include "vf610-pinfunc.h"
6 #include <dt-bindings/clock/vf610-clock.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <24000000>;
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
[all …]
H A Dls1021a.dtsi2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
[all …]
H A Dvf610-zii-dev-rev-c.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
10 model = "ZII VF610 Development Board, Rev C";
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
[all …]
H A Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
10 model = "ZII VF610 Development Board, Rev B";
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
[all …]
H A Dvf610-zii-scu4-aib.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations
5 /dts-v1/;
6 #include "vf610.dtsi"
9 model = "ZII VF610 SCU4 AIB";
10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610";
13 stdout-path = &uart0;
21 gpio-leds {
22 compatible = "gpio-leds";
23 pinctrl-0 = <&pinctrl_leds_debug>;
[all …]
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
H A Dvf610-zii-cfu1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include "vf610.dtsi"
11 model = "ZII VF610 CFU1 Board";
12 compatible = "zii,vf610cfu1", "zii,vf610dev", "fsl,vf610";
15 stdout-path = &uart0;
23 gpio-leds {
24 compatible = "gpio-leds";
25 pinctrl-0 = <&pinctrl_leds_debug>;
26 pinctrl-names = "default";
[all …]
H A Dvf610-zii-dev.dtsi4 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
7 * This file is dual-licensed: you can use it either under the terms
45 #include "vf610.dtsi"
49 stdout-path = "serial0:115200n8";
57 gpio-leds {
58 compatible = "gpio-leds";
59 pinctrl-0 = <&pinctrl_leds_debug>;
60 pinctrl-names = "default";
65 linux,default-trigger = "heartbeat";
69 reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dls1021a.dtsi4 * Copyright 2013-2015 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
27 #address-cells = <1>;
28 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
38 compatible = "arm,cortex-a7";
46 compatible = "arm,armv7-timer";
54 compatible = "arm,cortex-a7-pmu";
[all …]
H A Dfsl-ls1043a.dtsi2 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
4 * Copyright (C) 2014-2015, Freescale Semiconductor
17 interrupt-parent = <&gic>;
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <100000000>;
23 clock-output-names = "sysclk";
26 gic: interrupt-controller@1400000 {
27 compatible = "arm,gic-400";
28 #interrupt-cells = <3>;
[all …]
H A Dfsl-ls1046a.dtsi2 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
17 interrupt-parent = <&gic>;
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <100000000>;
23 clock-output-names = "sysclk";
26 gic: interrupt-controller@1400000 {
27 compatible = "arm,gic-400";
28 #interrupt-cells = <3>;
29 interrupt-controller;
[all …]
H A Dfsl-ls1012a.dtsi4 * SPDX-License-Identifier: GPL-2.0+
11 interrupt-parent = <&gic>;
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <100000000>;
17 clock-output-names = "sysclk";
20 gic: interrupt-controller@1400000 {
21 compatible = "arm,gic-400";
22 #interrupt-cells = <3>;
23 interrupt-controller;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/i2c/
H A Di2c-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
10 - Wolfram Sang <wolfram@the-dreams.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
24 #address-cells = <1>;
[all …]
H A Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
22 rtic-a = &rtic_a;
23 rtic-b = &rtic_b;
[all …]
H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
[all …]
H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
[all …]
H A Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 /* DRAM space - 1, size : 2 GB DRAM */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/
H A DMakefile2 # (C) Copyright 2000-2006
7 # SPDX-License-Identifier: GPL-2.0+
10 ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6 mx7 vf610))
11 obj-y = iomux-v3.o
14 obj-y += timer.o cpu.o speed.o
15 obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
18 obj-y += misc.o
19 obj-$(CONFIG_SPL_BUILD) += spl.o
22 obj-y += cpu.o
23 obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
[all …]
/OK3568_Linux_fs/u-boot/board/phytec/pcm052/
H A Dpcm052.c4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/iomux-vf610.h>
11 #include <asm/arch/ddrmc-vf610.h>
18 #include <i2c.h>
23 * Default DDR pad settings in arch/arm/include/asm/arch-vf610/iomux-vf610.h
118 { 0, -1 }
121 /* PHY settings -- most of them differ from default in imx-regs.h */
150 { 0, -1 }
329 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); in dram_init()
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dvf610twr.h6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
61 /* I2C Configs */
64 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
65 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
77 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
99 "fdt_file=vf610-twr.dtb\0" \
105 "update_sd_firmware_filename=u-boot.imx\0" \
131 "bootz ${loadaddr} - ${fdt_addr}; " \
155 "bootz ${loadaddr} - ${fdt_addr}; " \
[all …]
/OK3568_Linux_fs/u-boot/board/toradex/colibri_vf/
H A Dcolibri_vf.c7 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/iomux-vf610.h>
14 #include <asm/arch/ddrmc-vf610.h>
25 #include <i2c.h>
29 #include "../common/tdx-common.h"
97 { 0, -1 }
161 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); in dram_init()
381 return !!mscm->cpxcfg1; in is_colibri_vf61()
390 clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK, in clock_init()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/vf610twr/
H A Dvf610twr.c4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/iomux-vf610.h>
11 #include <asm/arch/ddrmc-vf610.h>
18 #include <i2c.h>
83 { 0, -1 }
142 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); in dram_init()
274 clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK, in clock_init()
276 clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK, in clock_init()
278 clrsetbits_le32(&ccm->ccgr2, CCM_REG_CTRL_MASK, in clock_init()
[all …]

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