1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2013 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Freescale Vybrid vf610twr board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __CONFIG_H 10*4882a593Smuzhiyun #define __CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_MACH_TYPE 4146 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* Enable passing of ATAGs */ 21*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef CONFIG_CMD_FUSE 24*4882a593Smuzhiyun #define CONFIG_MXC_OCOTP 25*4882a593Smuzhiyun #endif 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Size of malloc() pool */ 28*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* Allow to overwrite serial and ethaddr */ 31*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* NAND support */ 34*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #ifdef CONFIG_CMD_NAND 37*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 38*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* Dynamic MTD partition support */ 41*4882a593Smuzhiyun #endif 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 44*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 45*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM 1 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define CONFIG_FEC_MXC 48*4882a593Smuzhiyun #define CONFIG_MII 49*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_BASE_ADDR 50*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 51*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* QSPI Configs*/ 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #ifdef CONFIG_FSL_QSPI 56*4882a593Smuzhiyun #define FSL_QSPI_FLASH_SIZE (1 << 24) 57*4882a593Smuzhiyun #define FSL_QSPI_FLASH_NUM 2 58*4882a593Smuzhiyun #define CONFIG_SYS_FSL_QSPI_LE 59*4882a593Smuzhiyun #endif 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* I2C Configs */ 62*4882a593Smuzhiyun #define CONFIG_SYS_I2C 63*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 64*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 65*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 66*4882a593Smuzhiyun #define CONFIG_SYS_SPD_BUS_NUM 0 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x82000000 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* We boot from the gfxRAM area of the OCRAM. */ 72*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x3f408000 73*4882a593Smuzhiyun #define CONFIG_BOARD_SIZE_LIMIT 524288 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* 76*4882a593Smuzhiyun * We do have 128MB of memory on the Vybrid Tower board. Leave the last 77*4882a593Smuzhiyun * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from 78*4882a593Smuzhiyun * DDR3. Hence, limit the memory range for image processing to 112MB 79*4882a593Smuzhiyun * using bootm_size. All of the following must be within this range. 80*4882a593Smuzhiyun * We have the default load at 32MB into DDR (for the kernel), FDT at 81*4882a593Smuzhiyun * 64MB and the ramdisk 512KB above that (allowing for hopefully never 82*4882a593Smuzhiyun * seen large trees). This allows a reasonable split between ramdisk 83*4882a593Smuzhiyun * and kernel size, where the ram disk can be a bit larger. 84*4882a593Smuzhiyun */ 85*4882a593Smuzhiyun #define MEM_LAYOUT_ENV_SETTINGS \ 86*4882a593Smuzhiyun "bootm_size=0x07000000\0" \ 87*4882a593Smuzhiyun "loadaddr=0x82000000\0" \ 88*4882a593Smuzhiyun "kernel_addr_r=0x82000000\0" \ 89*4882a593Smuzhiyun "fdt_addr=0x84000000\0" \ 90*4882a593Smuzhiyun "fdt_addr_r=0x84000000\0" \ 91*4882a593Smuzhiyun "rdaddr=0x84080000\0" \ 92*4882a593Smuzhiyun "ramdisk_addr_r=0x84080000\0" 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 95*4882a593Smuzhiyun MEM_LAYOUT_ENV_SETTINGS \ 96*4882a593Smuzhiyun "script=boot.scr\0" \ 97*4882a593Smuzhiyun "image=zImage\0" \ 98*4882a593Smuzhiyun "console=ttyLP1\0" \ 99*4882a593Smuzhiyun "fdt_file=vf610-twr.dtb\0" \ 100*4882a593Smuzhiyun "boot_fdt=try\0" \ 101*4882a593Smuzhiyun "ip_dyn=yes\0" \ 102*4882a593Smuzhiyun "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 103*4882a593Smuzhiyun "mmcpart=1\0" \ 104*4882a593Smuzhiyun "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 105*4882a593Smuzhiyun "update_sd_firmware_filename=u-boot.imx\0" \ 106*4882a593Smuzhiyun "update_sd_firmware=" \ 107*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 108*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 109*4882a593Smuzhiyun "else " \ 110*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 111*4882a593Smuzhiyun "fi; " \ 112*4882a593Smuzhiyun "if mmc dev ${mmcdev}; then " \ 113*4882a593Smuzhiyun "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 114*4882a593Smuzhiyun "setexpr fw_sz ${filesize} / 0x200; " \ 115*4882a593Smuzhiyun "setexpr fw_sz ${fw_sz} + 1; " \ 116*4882a593Smuzhiyun "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 117*4882a593Smuzhiyun "fi; " \ 118*4882a593Smuzhiyun "fi\0" \ 119*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console},${baudrate} " \ 120*4882a593Smuzhiyun "root=${mmcroot}\0" \ 121*4882a593Smuzhiyun "loadbootscript=" \ 122*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 123*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 124*4882a593Smuzhiyun "source\0" \ 125*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 126*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 127*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 128*4882a593Smuzhiyun "run mmcargs; " \ 129*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 130*4882a593Smuzhiyun "if run loadfdt; then " \ 131*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 132*4882a593Smuzhiyun "else " \ 133*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 134*4882a593Smuzhiyun "bootz; " \ 135*4882a593Smuzhiyun "else " \ 136*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 137*4882a593Smuzhiyun "fi; " \ 138*4882a593Smuzhiyun "fi; " \ 139*4882a593Smuzhiyun "else " \ 140*4882a593Smuzhiyun "bootz; " \ 141*4882a593Smuzhiyun "fi;\0" \ 142*4882a593Smuzhiyun "netargs=setenv bootargs console=${console},${baudrate} " \ 143*4882a593Smuzhiyun "root=/dev/nfs " \ 144*4882a593Smuzhiyun "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 145*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 146*4882a593Smuzhiyun "run netargs; " \ 147*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 148*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 149*4882a593Smuzhiyun "else " \ 150*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 151*4882a593Smuzhiyun "fi; " \ 152*4882a593Smuzhiyun "${get_cmd} ${image}; " \ 153*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 154*4882a593Smuzhiyun "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 155*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 156*4882a593Smuzhiyun "else " \ 157*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 158*4882a593Smuzhiyun "bootz; " \ 159*4882a593Smuzhiyun "else " \ 160*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 161*4882a593Smuzhiyun "fi; " \ 162*4882a593Smuzhiyun "fi; " \ 163*4882a593Smuzhiyun "else " \ 164*4882a593Smuzhiyun "bootz; " \ 165*4882a593Smuzhiyun "fi;\0" 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 168*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 169*4882a593Smuzhiyun "if run loadbootscript; then " \ 170*4882a593Smuzhiyun "run bootscript; " \ 171*4882a593Smuzhiyun "else " \ 172*4882a593Smuzhiyun "if run loadimage; then " \ 173*4882a593Smuzhiyun "run mmcboot; " \ 174*4882a593Smuzhiyun "else run netboot; " \ 175*4882a593Smuzhiyun "fi; " \ 176*4882a593Smuzhiyun "fi; " \ 177*4882a593Smuzhiyun "else run netboot; fi" 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun /* Miscellaneous configurable options */ 180*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* undef to save memory */ 181*4882a593Smuzhiyun #undef CONFIG_AUTO_COMPLETE 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80010000 184*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x87C00000 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* Physical memory map */ 187*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 188*4882a593Smuzhiyun #define PHYS_SDRAM (0x80000000) 189*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 192*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 193*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 196*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 197*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 198*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_MMC 201*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 204*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 205*4882a593Smuzhiyun #endif 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_NAND 208*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (64 * 2048) 209*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE (64 * 2048) 210*4882a593Smuzhiyun #define CONFIG_ENV_RANGE (512 * 1024) 211*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0x180000 212*4882a593Smuzhiyun #endif 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun #endif 215