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/OK3568_Linux_fs/u-boot/drivers/spi/
H A Drockchip_sfc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2017-2021, Rockchip Inc.
6 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Jon Lin <Jon.lin@rock-chips.com>
19 #include <spi-mem.h>
153 * devices (0-3), however I have only been able to test a single CS (CS 0)
158 /* The SFC can transfer max 16KB - 1 at one time
165 /* DMA is only enabled for large data transmission */
169 * 150MHz. No minimum or average value is suggested.
194 static int rockchip_sfc_reset(struct rockchip_sfc *sfc) in rockchip_sfc_reset() argument
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/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-rockchip-sfc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2017-2021, Rockchip Inc.
6 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Jon Lin <Jon.lin@rock-chips.com>
15 #include <linux/dma-mapping.h>
25 #include <linux/spi/spi-mem.h>
159 * devices (0-3), however I have only been able to test a single CS (CS 0)
167 /* DMA is only enabled for large data transmission */
171 * 150MHz. No minimum or average value is suggested.
197 static int rockchip_sfc_reset(struct rockchip_sfc *sfc) in rockchip_sfc_reset() argument
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
111 supports spi-mem interface.
181 this code to manage the per-word or per-transfer accesses to the
211 Flash over 1/2/4-bit wide bus. Enable this option if you have a
219 This enables dedicated general purpose SPI/Microwire1-compatible
220 master mode interface (SSI1) for CLPS711X-based CPUs.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Drockchip-sfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/rockchip-sfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Serial Flash Controller (SFC)
10 - Heiko Stuebner <heiko@sntech.de>
11 - Chris Morgan <macromorgan@hotmail.com>
14 - $ref: spi-controller.yaml#
18 const: rockchip,sfc
20 The rockchip sfc controller is a standalone IP with version register,
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/OK3568_Linux_fs/kernel/drivers/rkflash/
H A Drksfc_base.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/dma-mapping.h>
20 #include "sfc.h"
24 #define RKSFC_VERSION_AND_DATE "rksfc_base v1.1 2016-01-08"
32 struct clk *clk; /* sfc clk*/
114 dev_dbg(g_sfc_dev, "no dev, dll by pass\n"); in rksfc_delay_lines_tuning()
131 right -= step; in rksfc_delay_lines_tuning()
145 right = cell_max - step; in rksfc_delay_lines_tuning()
148 if (dll_valid && (right - left) >= SFC_DLL_TRANING_VALID_WINDOW) { in rksfc_delay_lines_tuning()
150 g_sfc_info.dll_cells = left + (right - left) * 2 / 5; in rksfc_delay_lines_tuning()
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/OK3568_Linux_fs/kernel/sound/firewire/
H A Dfcp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Function Control Protocol (IEC 61883-1) helper functions
10 #include <linux/firewire-constants.h>
20 #include "amdtp-stream.h"
32 unsigned int sfc; in avc_general_set_sig_fmt() local
38 for (sfc = 0; sfc < CIP_SFC_COUNT; sfc++) { in avc_general_set_sig_fmt()
39 if (amdtp_rate_table[sfc] == rate) { in avc_general_set_sig_fmt()
45 return -EINVAL; in avc_general_set_sig_fmt()
49 return -ENOMEM; in avc_general_set_sig_fmt()
59 buf[5] = 0x07 & sfc; /* FDF-hi. AM824, frequency */ in avc_general_set_sig_fmt()
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H A Damdtp-stream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
4 * with Common Isochronous Packet (IEC 61883-1) headers
12 #include <linux/firewire-constants.h>
17 #include "amdtp-stream.h"
27 #include "amdtp-stream-trace.h"
70 * amdtp_stream_init - initialize an AMDTP stream structure
86 return -EINVAL; in amdtp_stream_init()
88 s->protocol = kzalloc(protocol_size, GFP_KERNEL); in amdtp_stream_init()
89 if (!s->protocol) in amdtp_stream_init()
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3036.dtsi2 * SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3036-cru.h>
15 interrupt-parent = <&gic>;
34 arm-pmu {
35 compatible = "arm,cortex-a7-pmu";
38 interrupt-affinity = <&cpu0>, <&cpu1>;
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H A Drv1108.dtsi4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/rv1108-cru.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/media/rockchip_mipi_dsi.h>
13 #include <linux/media-bus-format.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
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H A D.rk3036-sdk.dtb.dts.tmp
H A D.rk3126-evb.dtb.dts.tmp
H A Drk3128.dtsi4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/clock/rk3128-cru.h>
12 #include <dt-bindings/media/rockchip_mipi_dsi.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <1>;
20 #size-cells = <1>;
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H A D.rk3128-evb.dtb.dts.tmp
H A D.rv1108-evb.dtb.dts.tmp
H A Drk1808.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/clock/rk1808-cru.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/power/rk1808-power.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
38 #address-cells = <2>;
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/power/rk3036-power.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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H A Drk312x.dtsi2 * This file is dual-licensed: you can use it either under the terms
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 #include <dt-bindings/gpio/gpio.h>
42 #include <dt-bindings/interrupt-controller/irq.h>
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/pinctrl/rockchip.h>
45 #include <dt-bindings/power/rk3128-power.h>
46 #include <dt-bindings/soc/rockchip,boot-mode.h>
47 #include <dt-bindings/soc/rockchip-system-status.h>
48 #include <dt-bindings/clock/rk3128-cru.h>
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/OK3568_Linux_fs/kernel/drivers/mtd/spi-nor/controllers/
H A Dhisi-sfc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
9 #include <linux/dma-mapping.h>
13 #include <linux/mtd/spi-nor.h>
64 #define HIFMC_DMA_MASK (HIFMC_DMA_MAX_LEN - 1)
107 return readl_poll_timeout(host->regbase + FMC_INT, reg, in hisi_spi_nor_wait_op_finish()
144 writel(reg, host->regbase + FMC_SPI_TIMING_CFG); in hisi_spi_nor_init()
149 struct hifmc_priv *priv = nor->priv; in hisi_spi_nor_prep()
150 struct hifmc_host *host = priv->host; in hisi_spi_nor_prep()
153 mutex_lock(&host->lock); in hisi_spi_nor_prep()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3566-box.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/input/rk-input.h>
11 #include <dt-bindings/display/drm_mipi_dsi.h>
12 #include <dt-bindings/sensor-dev.h>
15 adc_keys: adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
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H A Drk3568-nvr.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/input/rk-input.h>
11 #include <dt-bindings/display/drm_mipi_dsi.h>
12 #include <dt-bindings/sensor-dev.h>
15 adc_keys: adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
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H A Drk1808.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/clock/rk1808-cru.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/power/rk1808-power.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #include <dt-bindings/soc/rockchip-system-status.h>
12 #include <dt-bindings/suspend/rockchip-rk1808.h>
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H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/rk3568-power.h>
13 #include <dt-bindings/soc/rockchip-system-status.h>
14 #include <dt-bindings/suspend/rockchip-rk3568.h>
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/sfc/
H A Defx_common.c1 // SPDX-License-Identifier: GPL-2.0-only
36 * On Falcon-based NICs, this will:
37 * - Check the on-board hardware monitor;
38 * - Poll the link state and reconfigure the hardware as necessary.
39 * On Siena-based NICs for power systems with EEH support, this will give EEH a
107 * queued onto this work queue. This is not a per-nic work queue, because
117 return -ENOMEM; in efx_create_reset_workqueue()
125 queue_work(reset_workqueue, &efx->reset_work); in efx_queue_reset_work()
130 cancel_work_sync(&efx->reset_work); in efx_flush_reset_workqueue()
141 /* We assume that efx->type->reconfigure_mac will always try to sync RX
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * on HSW) - so the final size, including the extra state required for the
144 * intel_engine_context_size() - return the size of the context for an engine
159 struct intel_uncore *uncore = gt->uncore; in intel_engine_context_size()
166 switch (INTEL_GEN(gt->i915)) { in intel_engine_context_size()
168 MISSING_CASE(INTEL_GEN(gt->i915)); in intel_engine_context_size()
180 if (IS_HASWELL(gt->i915)) in intel_engine_context_size()
203 drm_dbg(&gt->i915->drm, in intel_engine_context_size()
205 INTEL_GEN(gt->i915), cxt_size * 64, in intel_engine_context_size()
206 cxt_size - 1); in intel_engine_context_size()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/sfc/falcon/
H A Defx.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
85 * queued onto this work queue. This is not a per-nic work queue, because
108 * This is only used in MSI-X interrupt mode
115 /* This is the weight assigned to each of the (per-channel) virtual
122 * On Falcon-based NICs, this will:
123 * - Check the on-board hardware monitor;
124 * - Poll the link state and reconfigure the hardware as necessary.
125 * On Siena-based NICs for power systems with EEH support, this will give EEH a
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