xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3566-box.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "rk3566.dtsi"
8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
10*4882a593Smuzhiyun#include <dt-bindings/input/rk-input.h>
11*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
12*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	adc_keys: adc-keys {
16*4882a593Smuzhiyun		compatible = "adc-keys";
17*4882a593Smuzhiyun		io-channels = <&saradc 0>;
18*4882a593Smuzhiyun		io-channel-names = "buttons";
19*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
20*4882a593Smuzhiyun		poll-interval = <100>;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun		vol-up-key {
23*4882a593Smuzhiyun			label = "volume up";
24*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
25*4882a593Smuzhiyun			press-threshold-microvolt = <1750>;
26*4882a593Smuzhiyun		};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		vol-down-key {
29*4882a593Smuzhiyun			label = "volume down";
30*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
31*4882a593Smuzhiyun			press-threshold-microvolt = <297500>;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	bt_sco: bt-sco {
36*4882a593Smuzhiyun		status = "disabled";
37*4882a593Smuzhiyun		compatible = "delta,dfbmcs320";
38*4882a593Smuzhiyun		#sound-dai-cells = <1>;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	bt_sound: bt-sound {
42*4882a593Smuzhiyun		status = "disabled";
43*4882a593Smuzhiyun		compatible = "simple-audio-card";
44*4882a593Smuzhiyun		simple-audio-card,format = "dsp_a";
45*4882a593Smuzhiyun		simple-audio-card,bitclock-inversion = <0>;
46*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
47*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,bt";
48*4882a593Smuzhiyun		simple-audio-card,cpu {
49*4882a593Smuzhiyun			sound-dai = <&i2s2_2ch>;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun		simple-audio-card,codec {
52*4882a593Smuzhiyun			sound-dai = <&bt_sco 1>;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	dc_12v: dc-12v {
57*4882a593Smuzhiyun		compatible = "regulator-fixed";
58*4882a593Smuzhiyun		regulator-name = "dc_12v";
59*4882a593Smuzhiyun		regulator-always-on;
60*4882a593Smuzhiyun		regulator-boot-on;
61*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
62*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	hdmi_sound: hdmi-sound {
66*4882a593Smuzhiyun		compatible = "simple-audio-card";
67*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
68*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
69*4882a593Smuzhiyun		simple-audio-card,name = "hdmi-sound";
70*4882a593Smuzhiyun		status = "okay";
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		simple-audio-card,cpu {
73*4882a593Smuzhiyun				sound-dai = <&i2s0_8ch>;
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun		simple-audio-card,codec {
76*4882a593Smuzhiyun				sound-dai = <&hdmi>;
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	reserved-memory {
81*4882a593Smuzhiyun		#address-cells = <2>;
82*4882a593Smuzhiyun		#size-cells = <2>;
83*4882a593Smuzhiyun		ranges;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		rknpu_reserved: rknpu {
86*4882a593Smuzhiyun			compatible = "shared-dma-pool";
87*4882a593Smuzhiyun			inactive;
88*4882a593Smuzhiyun			reusable;
89*4882a593Smuzhiyun			size = <0x0 0x20000000>;
90*4882a593Smuzhiyun			alignment = <0x0 0x1000>;
91*4882a593Smuzhiyun			status = "disabled";
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	spdif-sound {
96*4882a593Smuzhiyun		status = "okay";
97*4882a593Smuzhiyun		compatible = "simple-audio-card";
98*4882a593Smuzhiyun		simple-audio-card,name = "ROCKCHIP,SPDIF";
99*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
100*4882a593Smuzhiyun		simple-audio-card,cpu {
101*4882a593Smuzhiyun				sound-dai = <&spdif_8ch>;
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun		simple-audio-card,codec {
104*4882a593Smuzhiyun				sound-dai = <&spdif_out>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun	spdif_out: spdif-out {
109*4882a593Smuzhiyun			status = "okay";
110*4882a593Smuzhiyun			compatible = "linux,spdif-dit";
111*4882a593Smuzhiyun			#sound-dai-cells = <0>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
115*4882a593Smuzhiyun		compatible = "regulator-fixed";
116*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
117*4882a593Smuzhiyun		regulator-always-on;
118*4882a593Smuzhiyun		regulator-boot-on;
119*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
120*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
121*4882a593Smuzhiyun		vin-supply = <&dc_12v>;
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
125*4882a593Smuzhiyun		compatible = "regulator-fixed";
126*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
127*4882a593Smuzhiyun		regulator-always-on;
128*4882a593Smuzhiyun		regulator-boot-on;
129*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
130*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
131*4882a593Smuzhiyun		vin-supply = <&dc_12v>;
132*4882a593Smuzhiyun	};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun	vcc_1v8: vcc_1v8 {
135*4882a593Smuzhiyun		compatible = "regulator-fixed";
136*4882a593Smuzhiyun		regulator-name = "vcc_1v8";
137*4882a593Smuzhiyun		regulator-always-on;
138*4882a593Smuzhiyun		regulator-boot-on;
139*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
140*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
141*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
142*4882a593Smuzhiyun	};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun	vcc_3v3: vcc_3v3{
145*4882a593Smuzhiyun		compatible = "regulator-fixed";
146*4882a593Smuzhiyun		regulator-name = "vcc_3v3";
147*4882a593Smuzhiyun		regulator-always-on;
148*4882a593Smuzhiyun		regulator-boot-on;
149*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
150*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
151*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	vdd_fixed: vdd-fixed {
155*4882a593Smuzhiyun		compatible = "regulator-fixed";
156*4882a593Smuzhiyun		regulator-name = "vdd_fixed";
157*4882a593Smuzhiyun		regulator-min-microvolt = <950000>;
158*4882a593Smuzhiyun		regulator-max-microvolt = <950000>;
159*4882a593Smuzhiyun		regulator-always-on;
160*4882a593Smuzhiyun		regulator-boot-on;
161*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun	vdd_cpu: vdd-cpu {
165*4882a593Smuzhiyun		compatible = "pwm-regulator";
166*4882a593Smuzhiyun		pwms = <&pwm0 0 5000 1>;
167*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
168*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
169*4882a593Smuzhiyun		regulator-max-microvolt = <1200000>;
170*4882a593Smuzhiyun		regulator-init-microvolt = <950000>;
171*4882a593Smuzhiyun		regulator-always-on;
172*4882a593Smuzhiyun		regulator-boot-on;
173*4882a593Smuzhiyun		regulator-settling-time-up-us = <250>;
174*4882a593Smuzhiyun		pwm-supply = <&vcc5v0_sys>;
175*4882a593Smuzhiyun		status = "okay";
176*4882a593Smuzhiyun	};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun	vdd_logic: vdd-logic {
179*4882a593Smuzhiyun		compatible = "pwm-regulator";
180*4882a593Smuzhiyun		pwms = <&pwm1 0 5000 1>;
181*4882a593Smuzhiyun		regulator-name = "vdd_logic";
182*4882a593Smuzhiyun		regulator-min-microvolt = <800000>;
183*4882a593Smuzhiyun		regulator-max-microvolt = <1100000>;
184*4882a593Smuzhiyun		regulator-init-microvolt = <950000>;
185*4882a593Smuzhiyun		regulator-always-on;
186*4882a593Smuzhiyun		regulator-boot-on;
187*4882a593Smuzhiyun		regulator-settling-time-up-us = <250>;
188*4882a593Smuzhiyun		pwm-supply = <&vcc5v0_sys>;
189*4882a593Smuzhiyun		status = "okay";
190*4882a593Smuzhiyun	};
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&bus_npu {
194*4882a593Smuzhiyun	bus-supply = <&vdd_logic>;
195*4882a593Smuzhiyun	pvtm-supply = <&vdd_cpu>;
196*4882a593Smuzhiyun	status = "okay";
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&cpu0 {
200*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
201*4882a593Smuzhiyun};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun&dfi {
204*4882a593Smuzhiyun	status = "okay";
205*4882a593Smuzhiyun};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun&dmc {
208*4882a593Smuzhiyun	auto-freq-en = <0>;
209*4882a593Smuzhiyun	center-supply = <&vdd_fixed>;
210*4882a593Smuzhiyun	status = "okay";
211*4882a593Smuzhiyun};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun&gpu {
214*4882a593Smuzhiyun	mali-supply = <&vdd_fixed>;
215*4882a593Smuzhiyun	status = "okay";
216*4882a593Smuzhiyun};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun&gpu_opp_table {
219*4882a593Smuzhiyun	/delete-node/ opp-800000000;
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&hdmi {
223*4882a593Smuzhiyun	status = "okay";
224*4882a593Smuzhiyun	rockchip,phy-table =
225*4882a593Smuzhiyun		<92812500  0x8009 0x0000 0x0270>,
226*4882a593Smuzhiyun		<165000000 0x800b 0x0000 0x026d>,
227*4882a593Smuzhiyun		<185625000 0x800b 0x0000 0x01ed>,
228*4882a593Smuzhiyun		<297000000 0x800b 0x0000 0x01ad>,
229*4882a593Smuzhiyun		<594000000 0x8029 0x0000 0x0088>,
230*4882a593Smuzhiyun		<000000000 0x0000 0x0000 0x0000>;
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&hdmi_in_vp0 {
234*4882a593Smuzhiyun	status = "okay";
235*4882a593Smuzhiyun};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun&hdmi_in_vp1 {
238*4882a593Smuzhiyun	status = "disabled";
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&i2s0_8ch {
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&i2s1_8ch {
246*4882a593Smuzhiyun	status = "okay";
247*4882a593Smuzhiyun	rockchip,clk-trcm = <1>;
248*4882a593Smuzhiyun	pinctrl-names = "default";
249*4882a593Smuzhiyun	pinctrl-0 = <&i2s1m0_sclktx
250*4882a593Smuzhiyun		     &i2s1m0_lrcktx
251*4882a593Smuzhiyun		     &i2s1m0_sdi0
252*4882a593Smuzhiyun		     &i2s1m0_sdo0>;
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&i2s2_2ch {
256*4882a593Smuzhiyun	pinctrl-0 = <&i2s2m0_sclktx &i2s2m0_lrcktx &i2s2m0_sdi &i2s2m0_sdo>;
257*4882a593Smuzhiyun	rockchip,bclk-fs = <32>;
258*4882a593Smuzhiyun	status = "disabled";
259*4882a593Smuzhiyun};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun&iep {
262*4882a593Smuzhiyun	status = "okay";
263*4882a593Smuzhiyun};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun&iep_mmu {
266*4882a593Smuzhiyun	status = "okay";
267*4882a593Smuzhiyun};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun&jpegd {
270*4882a593Smuzhiyun	status = "okay";
271*4882a593Smuzhiyun};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun&jpegd_mmu {
274*4882a593Smuzhiyun	status = "okay";
275*4882a593Smuzhiyun};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun&video_phy0 {
278*4882a593Smuzhiyun	status = "okay";
279*4882a593Smuzhiyun};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun&video_phy1 {
282*4882a593Smuzhiyun	status = "okay";
283*4882a593Smuzhiyun};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun&mpp_srv {
286*4882a593Smuzhiyun	status = "okay";
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&pwm0 {
290*4882a593Smuzhiyun	status = "okay";
291*4882a593Smuzhiyun	pinctrl-names = "active";
292*4882a593Smuzhiyun};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun&pwm1 {
295*4882a593Smuzhiyun	status = "okay";
296*4882a593Smuzhiyun	pinctrl-names = "active";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&rk_rga {
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&rknpu {
304*4882a593Smuzhiyun	memory-region = <&rknpu_reserved>;
305*4882a593Smuzhiyun	rknpu-supply = <&vdd_fixed>;
306*4882a593Smuzhiyun	status = "okay";
307*4882a593Smuzhiyun};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun&rknpu_mmu {
310*4882a593Smuzhiyun	status = "disabled";
311*4882a593Smuzhiyun};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun&rkvdec {
314*4882a593Smuzhiyun	status = "okay";
315*4882a593Smuzhiyun};
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun&rkvdec_mmu {
318*4882a593Smuzhiyun	status = "okay";
319*4882a593Smuzhiyun};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun&rkvenc {
322*4882a593Smuzhiyun	status = "okay";
323*4882a593Smuzhiyun};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun&rkvenc_mmu {
326*4882a593Smuzhiyun	status = "okay";
327*4882a593Smuzhiyun};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun&rockchip_suspend {
330*4882a593Smuzhiyun	status = "okay";
331*4882a593Smuzhiyun	rockchip,sleep-mode-config = <
332*4882a593Smuzhiyun		(0
333*4882a593Smuzhiyun		| RKPM_SLP_CENTER_OFF
334*4882a593Smuzhiyun		| RKPM_SLP_HW_PLLS_OFF
335*4882a593Smuzhiyun		| RKPM_SLP_PMUALIVE_32K
336*4882a593Smuzhiyun		| RKPM_SLP_PMIC_LP
337*4882a593Smuzhiyun		| RKPM_SLP_32K_PVTM
338*4882a593Smuzhiyun		)
339*4882a593Smuzhiyun	>;
340*4882a593Smuzhiyun	rockchip,wakeup-config = <
341*4882a593Smuzhiyun		(0
342*4882a593Smuzhiyun		| RKPM_PWM0_WKUP_EN
343*4882a593Smuzhiyun		| RKPM_CPU0_WKUP_EN
344*4882a593Smuzhiyun		)
345*4882a593Smuzhiyun	>;
346*4882a593Smuzhiyun};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun&route_hdmi {
349*4882a593Smuzhiyun	status = "okay";
350*4882a593Smuzhiyun	connect = <&vp0_out_hdmi>;
351*4882a593Smuzhiyun};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun&saradc {
354*4882a593Smuzhiyun	status = "okay";
355*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
356*4882a593Smuzhiyun};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun&sdhci {
359*4882a593Smuzhiyun	bus-width = <8>;
360*4882a593Smuzhiyun	no-sdio;
361*4882a593Smuzhiyun	no-sd;
362*4882a593Smuzhiyun	non-removable;
363*4882a593Smuzhiyun	status = "okay";
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&sfc {
367*4882a593Smuzhiyun	status = "okay";
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun	flash@0 {
370*4882a593Smuzhiyun		compatible = "spi-nand";
371*4882a593Smuzhiyun		reg = <0>;
372*4882a593Smuzhiyun		spi-max-frequency = <75000000>;
373*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
374*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
375*4882a593Smuzhiyun	};
376*4882a593Smuzhiyun};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun&spdif_8ch {
379*4882a593Smuzhiyun	status = "okay";
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&tsadc {
383*4882a593Smuzhiyun	status = "okay";
384*4882a593Smuzhiyun};
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun&u2phy0_host {
387*4882a593Smuzhiyun	status = "okay";
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&u2phy0_otg {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun&usb2phy0 {
395*4882a593Smuzhiyun	status = "okay";
396*4882a593Smuzhiyun};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun&u2phy1_host {
399*4882a593Smuzhiyun	status = "disabled";
400*4882a593Smuzhiyun};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun&u2phy1_otg {
403*4882a593Smuzhiyun	status = "disabled";
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&usb2phy1 {
407*4882a593Smuzhiyun	status = "disabled";
408*4882a593Smuzhiyun};
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun&usb_host0_ehci {
411*4882a593Smuzhiyun	status = "disabled";
412*4882a593Smuzhiyun};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun&usb_host0_ohci {
415*4882a593Smuzhiyun	status = "disabled";
416*4882a593Smuzhiyun};
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun&usb_host1_ehci {
419*4882a593Smuzhiyun	status = "disabled";
420*4882a593Smuzhiyun};
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun&usb_host1_ohci {
423*4882a593Smuzhiyun	status = "disabled";
424*4882a593Smuzhiyun};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun&usbdrd_dwc3 {
427*4882a593Smuzhiyun	dr_mode = "otg";
428*4882a593Smuzhiyun	phys = <&u2phy0_otg>;
429*4882a593Smuzhiyun	maximum-speed = "high-speed";
430*4882a593Smuzhiyun	extcon = <&usb2phy0>;
431*4882a593Smuzhiyun	status = "okay";
432*4882a593Smuzhiyun};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun&usbdrd30 {
435*4882a593Smuzhiyun	status = "okay";
436*4882a593Smuzhiyun};
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun&usbhost_dwc3 {
439*4882a593Smuzhiyun	status = "okay";
440*4882a593Smuzhiyun};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun&usbhost30 {
443*4882a593Smuzhiyun	status = "okay";
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&vdpu {
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&vdpu_mmu {
451*4882a593Smuzhiyun	status = "okay";
452*4882a593Smuzhiyun};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun&vepu {
455*4882a593Smuzhiyun	status = "okay";
456*4882a593Smuzhiyun};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun&vepu_mmu {
459*4882a593Smuzhiyun	status = "okay";
460*4882a593Smuzhiyun};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun&vop {
463*4882a593Smuzhiyun	status = "okay";
464*4882a593Smuzhiyun	assigned-clocks = <&cru DCLK_VOP1>;
465*4882a593Smuzhiyun	assigned-clock-parents = <&cru PLL_VPLL>;
466*4882a593Smuzhiyun};
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun&vop_mmu {
469*4882a593Smuzhiyun	status = "okay";
470*4882a593Smuzhiyun};
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun
473