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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci.txt7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
9 is on in the mask then the bit is incorrect in the register and should be
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dsdhci-iproc.c15 * iProc SDHCI platform driver
24 #include "sdhci-pltfm.h"
28 u32 caps; member
45 u32 val = readl(host->ioaddr + reg); in sdhci_iproc_readl()
48 mmc_hostname(host->mmc), reg, val); in sdhci_iproc_readl()
59 if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) { in sdhci_iproc_readw()
61 val = iproc_host->shadow_cmd; in sdhci_iproc_readw()
63 iproc_host->is_blk_shadowed) { in sdhci_iproc_readw()
65 val = iproc_host->shadow_blk; in sdhci_iproc_readw()
83 mmc_hostname(host->mmc), reg, val); in sdhci_iproc_writel()
[all …]
H A Dsdhci-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's
15 #include "sdhci-cqhci.h"
16 #include "sdhci-pltfm.h"
52 void brcmstb_reset(struct sdhci_host *host, u8 mask) in brcmstb_reset() argument
57 sdhci_and_cqhci_reset(host, mask); in brcmstb_reset()
59 /* Reset will clear this, so re-enable it */ in brcmstb_reset()
60 if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK) in brcmstb_reset()
70 dev_dbg(mmc_dev(mmc), "%s(): Setting HS400-Enhanced-Strobe mode\n", in sdhci_brcmstb_hs400es()
72 reg = readl(host->ioaddr + SDHCI_VENDOR); in sdhci_brcmstb_hs400es()
[all …]
H A Dsdhci-pxav2.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include "sdhci.h"
25 #include "sdhci-pltfm.h"
44 static void pxav2_reset(struct sdhci_host *host, u8 mask) in pxav2_reset() argument
46 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); in pxav2_reset()
47 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; in pxav2_reset()
49 sdhci_reset(host, mask); in pxav2_reset()
51 if (mask == SDHCI_RESET_ALL) { in pxav2_reset()
58 if (pdata && pdata->clk_delay_sel == 1) { in pxav2_reset()
59 tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP); in pxav2_reset()
[all …]
H A Dsdhci-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SDHCI Controller driver for TI's OMAP SoCs
11 #include <linux/mmc/slot-gpio.h>
22 #include "sdhci-pltfm.h"
89 /* sdhci-omap controller flags */
128 return readl(host->base + offset); in sdhci_omap_readl()
134 writel(data, host->base + offset); in sdhci_omap_writel()
141 struct device *dev = omap_host->dev; in sdhci_omap_set_pbias()
143 if (IS_ERR(omap_host->pbias)) in sdhci_omap_set_pbias()
147 ret = regulator_set_voltage(omap_host->pbias, iov, iov); in sdhci_omap_set_pbias()
[all …]
H A Dsdhci-pxav3.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #include "sdhci.h"
28 #include "sdhci-pltfm.h"
80 dev_err(&pdev->dev, "no mbus dram info\n"); in mv_conf_mbus_windows()
81 return -EINVAL; in mv_conf_mbus_windows()
86 dev_err(&pdev->dev, "cannot get mbus registers\n"); in mv_conf_mbus_windows()
87 return -EINVAL; in mv_conf_mbus_windows()
90 regs = ioremap(res->start, resource_size(res)); in mv_conf_mbus_windows()
92 dev_err(&pdev->dev, "cannot map mbus registers\n"); in mv_conf_mbus_windows()
93 return -ENOMEM; in mv_conf_mbus_windows()
[all …]
H A Dsdhci-of-at91.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mmc/slot-gpio.h>
24 #include "sdhci-pltfm.h"
57 mc1r = readb(host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
59 writeb(mc1r, host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
66 host->mmc->actual_clock = 0; in sdhci_at91_set_clock()
71 * internal clock, changing the configuration and re-enabling the in sdhci_at91_set_clock()
83 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_at91_set_clock()
92 mmc_hostname(host->mmc)); in sdhci_at91_set_clock()
113 static void sdhci_at91_reset(struct sdhci_host *host, u8 mask) in sdhci_at91_reset() argument
[all …]
H A Dsdhci_am654.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
106 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
107 "ti,itap-del-sel-legacy",
109 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
110 "ti,itap-del-sel-mmc-hs",
112 [MMC_TIMING_SD_HS] = {"ti,otap-del-sel-sd-hs",
[all …]
H A Dsdhci-acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/dma-mapping.h>
30 #include <linux/mmc/slot-gpio.h>
34 #include <asm/intel-family.h>
39 #include "sdhci.h"
51 unsigned long caps; member
60 unsigned long caps; member
88 return (void *)c->private; in sdhci_acpi_priv()
93 return c->slot && (c->slot->flags & flag); in sdhci_acpi_flag()
125 return -EOPNOTSUPP; in __intel_dsm()
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H A Dsdhci-esdhc-mcf.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/platform_data/mmc-esdhc-mcf.h>
13 #include "sdhci-pltfm.h"
14 #include "sdhci-esdhc.h"
47 u32 mask, u32 val, int reg) in esdhc_clrset_be() argument
49 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_clrset_be()
52 mask <<= shift; in esdhc_clrset_be()
58 writel((readl(base) & ~mask) | val, base); in esdhc_clrset_be()
62 * Note: mcf is big-endian, single bytes need to be accessed at big endian
67 void __iomem *base = host->ioaddr + (reg & ~3); in esdhc_mcf_writeb_be()
[all …]
H A Dsdhci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
34 #include <linux/mmc/slot-gpio.h>
38 #include "sdhci.h"
40 #define DRIVER_NAME "sdhci"
43 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
46 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
[all …]
H A Dsdhci-xenon.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
21 #include "sdhci-pltfm.h"
22 #include "sdhci-xenon.h"
41 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
42 return -ETIMEDOUT; in xenon_enable_internal_clk()
50 /* Set SDCLK-off-while-idle */
55 u32 mask; in xenon_set_sdclk_off_idle() local
59 mask = (0x1 << (XENON_SDCLK_IDLEOFF_ENABLE_SHIFT + sdhc_id)); in xenon_set_sdclk_off_idle()
61 reg |= mask; in xenon_set_sdclk_off_idle()
[all …]
H A Dsdhci-pci-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
8 * - JMicron (hardware and technical support)
17 #include <linux/dma-mapping.h>
29 #include <linux/mmc/slot-gpio.h>
30 #include <linux/mmc/sdhci-pci-data.h>
40 #include "sdhci.h"
41 #include "sdhci-pci.h"
52 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_init_wakeup()
[all …]
H A Dsdhci-sprd.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
21 #include "sdhci-pltfm.h"
91 { "sprd,phy-delay-legacy", MMC_TIMING_LEGACY, },
92 { "sprd,phy-delay-sd-highspeed", MMC_TIMING_SD_HS, },
93 { "sprd,phy-delay-sd-uhs-sdr50", MMC_TIMING_UHS_SDR50, },
94 { "sprd,phy-delay-sd-uhs-sdr104", MMC_TIMING_UHS_SDR104, },
95 { "sprd,phy-delay-mmc-highspeed", MMC_TIMING_MMC_HS, },
96 { "sprd,phy-delay-mmc-ddr52", MMC_TIMING_MMC_DDR52, },
97 { "sprd,phy-delay-mmc-hs200", MMC_TIMING_MMC_HS200, },
[all …]
H A Dsdhci-pci-arasan.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci-pci-arasan.c - Driver for Arasan PCI Controller with
14 #include "sdhci.h"
15 #include "sdhci-pci.h"
93 static int arasan_phy_addr_poll(struct sdhci_host *host, u32 offset, u32 mask) in arasan_phy_addr_poll() argument
102 if (!(val & mask)) in arasan_phy_addr_poll()
105 return -EBUSY; in arasan_phy_addr_poll()
129 static int arasan_phy_sts_poll(struct sdhci_host *host, u32 offset, u32 mask) in arasan_phy_sts_poll() argument
140 return -EBUSY; in arasan_phy_sts_poll()
141 else if (val & mask) in arasan_phy_sts_poll()
[all …]
H A Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
167 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
189 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
234 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
243 /* 4C-4F reserved for more max current */
250 /* 55-57 reserved */
255 /* 60-FB reserved */
263 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
[all …]
H A Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
22 #include "sdhci-pltfm.h"
83 ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
137 offset = addr & (SZ_128M - 1); in dwcmshc_adma_write_desc()
138 tmplen = SZ_128M - offset; in dwcmshc_adma_write_desc()
142 len -= tmplen; in dwcmshc_adma_write_desc()
150 if (pltfm_host->clk) in dwcmshc_get_max_clock()
153 return pltfm_host->clock; in dwcmshc_get_max_clock()
162 * No matter V4 is enabled or not, ARGUMENT2 register is 32-bit in dwcmshc_check_auto_cmd23()
[all …]
H A Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
23 #include <linux/mmc/slot-gpio.h>
27 #include "sdhci-cqhci.h"
28 #include "sdhci-pltfm.h"
181 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
183 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
189 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
202 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
205 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()
[all …]
H A Dsdhci-of-arasan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
25 #include <linux/firmware/xlnx-zynqmp.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
56 * On some SoCs the syscon area has a feature where the upper 16-bits of
57 * each 32-bit register act as a write mask for the lower 16-bits. This allows
61 #define HIWORD_UPDATE(val, mask, shift) \ argument
[all …]
H A Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
22 #include "sdhci-pltfm.h"
121 #define INVALID_TUNING_PHASE -1
135 /* Max load for eMMC Vdd-io supply */
139 msm_host->var_ops->msm_readl_relaxed(host, offset)
142 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
298 return msm_host->offset; in sdhci_priv_msm_offset()
311 return readl_relaxed(msm_host->core_mem + offset); in sdhci_msm_mci_variant_readl_relaxed()
[all …]
H A Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
27 #include <linux/platform_data/mmc-esdhc-imx.h>
29 #include "sdhci-cqhci.h"
30 #include "sdhci-pltfm.h"
31 #include "sdhci-esdhc.h"
69 /* Bits 3 and 6 are not SDHCI standard definitions */
83 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
134 * open ended multi-blk IO. Otherwise the TC INT wouldn't
[all …]
H A Dsdhci-pci-gli.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Version: v0.9.0 (2019-08-08)
15 #include "sdhci.h"
16 #include "sdhci-pci.h"
275 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
288 if (!host->tuning_done) { in __sdhci_execute_tuning_9750()
290 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
291 return -ETIMEDOUT; in __sdhci_execute_tuning_9750()
295 mmc_hostname(host->mmc)); in __sdhci_execute_tuning_9750()
298 return -EAGAIN; in __sdhci_execute_tuning_9750()
[all …]
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Dsdhci.c5 * SPDX-License-Identifier: GPL-2.0+
8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
15 #include <sdhci.h>
23 static void sdhci_reset(struct sdhci_host *host, u8 mask) in sdhci_reset() argument
29 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); in sdhci_reset()
30 while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { in sdhci_reset()
33 __func__, (int)mask); in sdhci_reset()
36 timeout--; in sdhci_reset()
44 if (cmd->resp_type & MMC_RSP_136) { in sdhci_cmd_done()
47 cmd->response[i] = sdhci_readl(host, in sdhci_cmd_done()
[all …]
/OK3568_Linux_fs/kernel/drivers/mmc/core/
H A Dhost.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2007-2008 Pierre Ossman
25 #include <linux/mmc/slot-gpio.h>
30 #include "slot-gpio.h"
47 if (!host->bus_ops) in mmc_host_class_prepare()
51 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare()
52 return host->bus_ops->pre_suspend(host); in mmc_host_class_prepare()
77 wakeup_source_unregister(host->ws); in mmc_host_classdev_release()
78 if (of_alias_get_id(host->parent->of_node, "mmc") < 0) in mmc_host_classdev_release()
79 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release()
[all …]

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