Home
last modified time | relevance | path

Searched +full:rk3399 +full:- +full:sdhci +full:- +full:5 (Results 1 – 25 of 40) sorted by relevance

12

/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D.rk3399-evb.dtb.dts.tmp
H A D.rk3399-firefly.dtb.dts.tmp
H A D.rk3399-puma-ddr1600.dtb.dts.tmp
H A D.rk3399-puma-ddr1866.dtb.dts.tmp
H A D.rk3399-puma-ddr1333.dtb.dts.tmp
H A Drk3399.dtsi2 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/clock/rk3399-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/power/rk3399-power.h>
13 #include <dt-bindings/thermal/thermal.h>
17 compatible = "rockchip,rk3399";
[all …]
H A Drk3399-firefly.dts4 * SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-sdram-ddr3-1600.dtsi"
12 #include "rk3399-u-boot.dtsi"
15 model = "Firefly-RK3399 Board";
16 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
19 stdout-path = &uart2;
[all …]
H A D.rk3399-firefly.dtb.pre.tmp
H A Drk3399-evb.dts4 * SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
12 #include "rk3399-u-boot.dtsi"
13 #include <linux/media-bus-format.h>
14 #include <dt-bindings/input/input.h>
17 model = "Rockchip RK3399 Evaluation Board";
[all …]
H A D.rk3399-evb.dtb.pre.tmp
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/rk3568-power.h>
18 interrupt-parent = <&gic>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3399/
H A Drk3399.c4 * SPDX-License-Identifier: GPL-2.0+
44 [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
99 rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0); in arch_cpu_init()
100 rk_clrreg(&sgrf->slv_secure_con4, 0x2000); in arch_cpu_init()
104 rk_clrreg(&grf->emmccore_con[11], 0x0ff); in arch_cpu_init()
107 rk_clrreg(&pmugrf->soc_con0, 1 << 5); in arch_cpu_init()
113 writel(0x7f002000, &pmucru->pmucru_clksel[1]); in arch_cpu_init()
114 writel(0x01000100, &pmucru->pmucru_clkgate_con[0]); in arch_cpu_init()
130 /* Enable early UART0 on the RK3399 */ in board_debug_uart_init()
131 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/soc/rockchip-system-status.h>
14 #include <dt-bindings/suspend/rockchip-rk3399.h>
[all …]
H A Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399.dtsi"
11 model = "Rockchip RK3399 Evaluation Board";
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
15 compatible = "pwm-backlight";
16 brightness-levels = <
17 0 1 2 3 4 5 6 7
49 default-brightness-level = <200>;
[all …]
H A Drk3399-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pwm/pwm.h>
9 #include "rk3399.dtsi"
10 #include "rk3399-opp.dtsi"
13 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
15 adc_keys: adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 1>;
18 io-channel-names = "buttons";
[all …]
H A Drk3399-firefly.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
9 #include "rk3399.dtsi"
10 #include "rk3399-opp.dtsi"
13 model = "Firefly-RK3399 Board";
14 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
17 stdout-path = "serial2:1500000n8";
21 compatible = "pwm-backlight";
[all …]
H A Drk3399-firefly-linux.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "dt-bindings/pwm/pwm.h"
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
12 #include "rk3399-linux.dtsi"
13 #include <dt-bindings/input/input.h>
16 model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
17 compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
21 compatible = "pwm-backlight";
[all …]
H A Drk3399-firefly-android.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "dt-bindings/pwm/pwm.h"
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
12 #include <dt-bindings/display/drm_mipi_dsi.h>
13 #include <dt-bindings/input/input.h>
14 #include "rk3399-vop-clk-set.dtsi"
17 model = "Rockchip RK3399 Firefly Board (Android)";
18 compatible = "rockchip,rk3399-firefly-android", "rockchip,rk3399";
[all …]
H A Drk3399-mid-818-android.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/sensor-dev.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/display/mipi_dsi.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include "rk3399.dtsi"
13 #include "rk3399-android.dtsi"
14 #include "rk3399-opp.dtsi"
15 #include "rk3399-vop-clk-set.dtsi"
[all …]
H A Drk3399-pinebook-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/usb/pd.h>
13 #include <dt-bindings/leds/common.h>
14 #include "rk3399.dtsi"
15 #include "rk3399-opp.dtsi"
19 compatible = "pine64,pinebook-pro", "rockchip,rk3399";
[all …]
H A Drk3399-tve1205g.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include "rk3399.dtsi"
10 #include "rk3399-android.dtsi"
11 #include "rk3399-opp.dtsi"
12 #include <dt-bindings/sensor-dev.h>
13 #include <dt-bindings/pwm/pwm.h>
16 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
18 edp_panel: edp-panel {
[all …]
H A Drk3399-hugsun-x99.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /dts-v1/;
3 #include <dt-bindings/pwm/pwm.h>
4 #include <dt-bindings/input/input.h>
5 #include "rk3399.dtsi"
6 #include "rk3399-opp.dtsi"
10 compatible = "hugsun,x99", "rockchip,rk3399";
13 stdout-path = "serial2:1500000n8";
16 clkin_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
[all …]
H A Drk3399-rock960-ab.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/input/input.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-linux.dtsi"
12 #include "rk3399-opp.dtsi"
16 model = "ROCK960 - 96boards based on Rockchip RK3399";
17 compatible = "rockchip,rock960","rockchip,rk3399";
19 fiq_debugger: fiq-debugger {
[all …]
H A Drk3399-tve1030g.dtsi4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/sensor-dev.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-android.dtsi"
12 #include "rk3399-opp.dtsi"
13 #include "rk3399-vop-clk-set.dtsi"
14 #include <dt-bindings/display/mipi_dsi.h>
18 compatible = "adc-keys";
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com>
20 * The higher 16-bit of this register is used for write protection
98 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
99 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
103 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()
104 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()
113 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power()
138 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power()
147 dev_warn(&phy->dev, "Unsupported rate: %lu\n", rate); in rockchip_emmc_phy_power()
[all …]

12