xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/input/linux-event-codes.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include "rk3399.dtsi"
10*4882a593Smuzhiyun#include "rk3399-opp.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Firefly-RK3399 Board";
14*4882a593Smuzhiyun	compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		stdout-path = "serial2:1500000n8";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	backlight: backlight {
21*4882a593Smuzhiyun		compatible = "pwm-backlight";
22*4882a593Smuzhiyun		enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
23*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
24*4882a593Smuzhiyun		brightness-levels = <
25*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
26*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
27*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
28*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
29*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
30*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
31*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
32*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
33*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
34*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
35*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
36*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
37*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
38*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
39*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
40*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
41*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
42*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
43*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
44*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
45*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
46*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
47*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
48*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
49*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
50*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
51*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
52*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
53*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
54*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
55*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
56*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
57*4882a593Smuzhiyun		default-brightness-level = <200>;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	clkin_gmac: external-gmac-clock {
61*4882a593Smuzhiyun		compatible = "fixed-clock";
62*4882a593Smuzhiyun		clock-frequency = <125000000>;
63*4882a593Smuzhiyun		clock-output-names = "clkin_gmac";
64*4882a593Smuzhiyun		#clock-cells = <0>;
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	dc_12v: dc-12v {
68*4882a593Smuzhiyun		compatible = "regulator-fixed";
69*4882a593Smuzhiyun		regulator-name = "dc_12v";
70*4882a593Smuzhiyun		regulator-always-on;
71*4882a593Smuzhiyun		regulator-boot-on;
72*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
73*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	gpio-keys {
77*4882a593Smuzhiyun		compatible = "gpio-keys";
78*4882a593Smuzhiyun		autorepeat;
79*4882a593Smuzhiyun		pinctrl-names = "default";
80*4882a593Smuzhiyun		pinctrl-0 = <&pwrbtn>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		power {
83*4882a593Smuzhiyun			debounce-interval = <100>;
84*4882a593Smuzhiyun			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
85*4882a593Smuzhiyun			label = "GPIO Key Power";
86*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
87*4882a593Smuzhiyun			wakeup-source;
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	leds {
92*4882a593Smuzhiyun		compatible = "gpio-leds";
93*4882a593Smuzhiyun		pinctrl-names = "default";
94*4882a593Smuzhiyun		pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		work_led: led-0 {
97*4882a593Smuzhiyun			label = "work";
98*4882a593Smuzhiyun			default-state = "on";
99*4882a593Smuzhiyun			gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		diy_led: led-1 {
103*4882a593Smuzhiyun			label = "diy";
104*4882a593Smuzhiyun			default-state = "off";
105*4882a593Smuzhiyun			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	rt5640-sound {
110*4882a593Smuzhiyun		compatible = "simple-audio-card";
111*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,rt5640-codec";
112*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
113*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
114*4882a593Smuzhiyun		simple-audio-card,widgets =
115*4882a593Smuzhiyun			"Microphone", "Mic Jack",
116*4882a593Smuzhiyun			"Headphone", "Headphone Jack";
117*4882a593Smuzhiyun		simple-audio-card,routing =
118*4882a593Smuzhiyun			"Mic Jack", "MICBIAS1",
119*4882a593Smuzhiyun			"IN1P", "Mic Jack",
120*4882a593Smuzhiyun			"Headphone Jack", "HPOL",
121*4882a593Smuzhiyun			"Headphone Jack", "HPOR";
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		simple-audio-card,cpu {
124*4882a593Smuzhiyun			sound-dai = <&i2s1>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		simple-audio-card,codec {
128*4882a593Smuzhiyun			sound-dai = <&rt5640>;
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
133*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
134*4882a593Smuzhiyun		clocks = <&rk808 1>;
135*4882a593Smuzhiyun		clock-names = "ext_clock";
136*4882a593Smuzhiyun		pinctrl-names = "default";
137*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		/*
140*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
141*4882a593Smuzhiyun		 * on the actual card populated):
142*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
143*4882a593Smuzhiyun		 * - PDN (power down when low)
144*4882a593Smuzhiyun		 */
145*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	/* switched by pmic_sleep */
149*4882a593Smuzhiyun	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
150*4882a593Smuzhiyun		compatible = "regulator-fixed";
151*4882a593Smuzhiyun		regulator-name = "vcc1v8_s3";
152*4882a593Smuzhiyun		regulator-always-on;
153*4882a593Smuzhiyun		regulator-boot-on;
154*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
155*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
156*4882a593Smuzhiyun		vin-supply = <&vcc_1v8>;
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun	vcc3v3_pcie: vcc3v3-pcie-regulator {
160*4882a593Smuzhiyun		compatible = "regulator-fixed";
161*4882a593Smuzhiyun		enable-active-high;
162*4882a593Smuzhiyun		gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
163*4882a593Smuzhiyun		pinctrl-names = "default";
164*4882a593Smuzhiyun		pinctrl-0 = <&pcie_pwr_en>;
165*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie";
166*4882a593Smuzhiyun		regulator-always-on;
167*4882a593Smuzhiyun		regulator-boot-on;
168*4882a593Smuzhiyun		vin-supply = <&dc_12v>;
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	vcc3v3_sys: vcc3v3-sys {
172*4882a593Smuzhiyun		compatible = "regulator-fixed";
173*4882a593Smuzhiyun		regulator-name = "vcc3v3_sys";
174*4882a593Smuzhiyun		regulator-always-on;
175*4882a593Smuzhiyun		regulator-boot-on;
176*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
177*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
178*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
179*4882a593Smuzhiyun	};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
182*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host-regulator {
183*4882a593Smuzhiyun		compatible = "regulator-fixed";
184*4882a593Smuzhiyun		enable-active-high;
185*4882a593Smuzhiyun		gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
186*4882a593Smuzhiyun		pinctrl-names = "default";
187*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
188*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
189*4882a593Smuzhiyun		regulator-always-on;
190*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	vcc_sys: vcc-sys {
194*4882a593Smuzhiyun		compatible = "regulator-fixed";
195*4882a593Smuzhiyun		regulator-name = "vcc_sys";
196*4882a593Smuzhiyun		regulator-always-on;
197*4882a593Smuzhiyun		regulator-boot-on;
198*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
199*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
200*4882a593Smuzhiyun		vin-supply = <&dc_12v>;
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	vdd_log: vdd-log {
204*4882a593Smuzhiyun		compatible = "pwm-regulator";
205*4882a593Smuzhiyun		pwms = <&pwm2 0 25000 1>;
206*4882a593Smuzhiyun		regulator-name = "vdd_log";
207*4882a593Smuzhiyun		regulator-always-on;
208*4882a593Smuzhiyun		regulator-boot-on;
209*4882a593Smuzhiyun		regulator-min-microvolt = <430000>;
210*4882a593Smuzhiyun		regulator-max-microvolt = <1400000>;
211*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
212*4882a593Smuzhiyun	};
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&cpu_l0 {
216*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&cpu_l1 {
220*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&cpu_l2 {
224*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
225*4882a593Smuzhiyun};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&cpu_l3 {
228*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_l>;
229*4882a593Smuzhiyun};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun&cpu_b0 {
232*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
233*4882a593Smuzhiyun};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun&cpu_b1 {
236*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_b>;
237*4882a593Smuzhiyun};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun&emmc_phy {
240*4882a593Smuzhiyun	status = "okay";
241*4882a593Smuzhiyun};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun&gmac {
244*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_RMII_SRC>;
245*4882a593Smuzhiyun	assigned-clock-parents = <&clkin_gmac>;
246*4882a593Smuzhiyun	clock_in_out = "input";
247*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
248*4882a593Smuzhiyun	phy-mode = "rgmii";
249*4882a593Smuzhiyun	pinctrl-names = "default";
250*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
251*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
252*4882a593Smuzhiyun	snps,reset-active-low;
253*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 50000>;
254*4882a593Smuzhiyun	tx_delay = <0x28>;
255*4882a593Smuzhiyun	rx_delay = <0x11>;
256*4882a593Smuzhiyun	status = "okay";
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&hdmi {
260*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c3>;
261*4882a593Smuzhiyun	pinctrl-names = "default";
262*4882a593Smuzhiyun	pinctrl-0 = <&hdmi_cec>;
263*4882a593Smuzhiyun	status = "okay";
264*4882a593Smuzhiyun};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun&i2c0 {
267*4882a593Smuzhiyun	clock-frequency = <400000>;
268*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <168>;
269*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <4>;
270*4882a593Smuzhiyun	status = "okay";
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun	rk808: pmic@1b {
273*4882a593Smuzhiyun		compatible = "rockchip,rk808";
274*4882a593Smuzhiyun		reg = <0x1b>;
275*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
276*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
277*4882a593Smuzhiyun		#clock-cells = <1>;
278*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
279*4882a593Smuzhiyun		pinctrl-names = "default";
280*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
281*4882a593Smuzhiyun		rockchip,system-power-controller;
282*4882a593Smuzhiyun		wakeup-source;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
285*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
286*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
287*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
288*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
289*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
290*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
291*4882a593Smuzhiyun		vcc9-supply = <&vcc_sys>;
292*4882a593Smuzhiyun		vcc10-supply = <&vcc_sys>;
293*4882a593Smuzhiyun		vcc11-supply = <&vcc_sys>;
294*4882a593Smuzhiyun		vcc12-supply = <&vcc3v3_sys>;
295*4882a593Smuzhiyun		vddio-supply = <&vcc1v8_pmu>;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun		regulators {
298*4882a593Smuzhiyun			vdd_center: DCDC_REG1 {
299*4882a593Smuzhiyun				regulator-name = "vdd_center";
300*4882a593Smuzhiyun				regulator-always-on;
301*4882a593Smuzhiyun				regulator-boot-on;
302*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
303*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
304*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
305*4882a593Smuzhiyun				regulator-state-mem {
306*4882a593Smuzhiyun					regulator-off-in-suspend;
307*4882a593Smuzhiyun				};
308*4882a593Smuzhiyun			};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun			vdd_cpu_l: DCDC_REG2 {
311*4882a593Smuzhiyun				regulator-name = "vdd_cpu_l";
312*4882a593Smuzhiyun				regulator-always-on;
313*4882a593Smuzhiyun				regulator-boot-on;
314*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
315*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
316*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
317*4882a593Smuzhiyun				regulator-state-mem {
318*4882a593Smuzhiyun					regulator-off-in-suspend;
319*4882a593Smuzhiyun				};
320*4882a593Smuzhiyun			};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
323*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
324*4882a593Smuzhiyun				regulator-always-on;
325*4882a593Smuzhiyun				regulator-boot-on;
326*4882a593Smuzhiyun				regulator-state-mem {
327*4882a593Smuzhiyun					regulator-on-in-suspend;
328*4882a593Smuzhiyun				};
329*4882a593Smuzhiyun			};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun			vcc_1v8: DCDC_REG4 {
332*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
333*4882a593Smuzhiyun				regulator-always-on;
334*4882a593Smuzhiyun				regulator-boot-on;
335*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
336*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
337*4882a593Smuzhiyun				regulator-state-mem {
338*4882a593Smuzhiyun					regulator-on-in-suspend;
339*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
340*4882a593Smuzhiyun				};
341*4882a593Smuzhiyun			};
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG1 {
344*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
345*4882a593Smuzhiyun				regulator-always-on;
346*4882a593Smuzhiyun				regulator-boot-on;
347*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
348*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
349*4882a593Smuzhiyun				regulator-state-mem {
350*4882a593Smuzhiyun					regulator-off-in-suspend;
351*4882a593Smuzhiyun				};
352*4882a593Smuzhiyun			};
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun			vcc2v8_dvp: LDO_REG2 {
355*4882a593Smuzhiyun				regulator-name = "vcc2v8_dvp";
356*4882a593Smuzhiyun				regulator-always-on;
357*4882a593Smuzhiyun				regulator-boot-on;
358*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
359*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
360*4882a593Smuzhiyun				regulator-state-mem {
361*4882a593Smuzhiyun					regulator-off-in-suspend;
362*4882a593Smuzhiyun				};
363*4882a593Smuzhiyun			};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun			vcc1v8_pmu: LDO_REG3 {
366*4882a593Smuzhiyun				regulator-name = "vcc1v8_pmu";
367*4882a593Smuzhiyun				regulator-always-on;
368*4882a593Smuzhiyun				regulator-boot-on;
369*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
370*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
371*4882a593Smuzhiyun				regulator-state-mem {
372*4882a593Smuzhiyun					regulator-on-in-suspend;
373*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
374*4882a593Smuzhiyun				};
375*4882a593Smuzhiyun			};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun			vcc_sdio: LDO_REG4 {
378*4882a593Smuzhiyun				regulator-name = "vcc_sdio";
379*4882a593Smuzhiyun				regulator-always-on;
380*4882a593Smuzhiyun				regulator-boot-on;
381*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
382*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
383*4882a593Smuzhiyun				regulator-state-mem {
384*4882a593Smuzhiyun					regulator-on-in-suspend;
385*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
386*4882a593Smuzhiyun				};
387*4882a593Smuzhiyun			};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun			vcca3v0_codec: LDO_REG5 {
390*4882a593Smuzhiyun				regulator-name = "vcca3v0_codec";
391*4882a593Smuzhiyun				regulator-always-on;
392*4882a593Smuzhiyun				regulator-boot-on;
393*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
394*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
395*4882a593Smuzhiyun				regulator-state-mem {
396*4882a593Smuzhiyun					regulator-off-in-suspend;
397*4882a593Smuzhiyun				};
398*4882a593Smuzhiyun			};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun			vcc_1v5: LDO_REG6 {
401*4882a593Smuzhiyun				regulator-name = "vcc_1v5";
402*4882a593Smuzhiyun				regulator-always-on;
403*4882a593Smuzhiyun				regulator-boot-on;
404*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
405*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
406*4882a593Smuzhiyun				regulator-state-mem {
407*4882a593Smuzhiyun					regulator-on-in-suspend;
408*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
409*4882a593Smuzhiyun				};
410*4882a593Smuzhiyun			};
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun			vcca1v8_codec: LDO_REG7 {
413*4882a593Smuzhiyun				regulator-name = "vcca1v8_codec";
414*4882a593Smuzhiyun				regulator-always-on;
415*4882a593Smuzhiyun				regulator-boot-on;
416*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
417*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
418*4882a593Smuzhiyun				regulator-state-mem {
419*4882a593Smuzhiyun					regulator-off-in-suspend;
420*4882a593Smuzhiyun				};
421*4882a593Smuzhiyun			};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun			vcc_3v0: LDO_REG8 {
424*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
425*4882a593Smuzhiyun				regulator-always-on;
426*4882a593Smuzhiyun				regulator-boot-on;
427*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
428*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
429*4882a593Smuzhiyun				regulator-state-mem {
430*4882a593Smuzhiyun					regulator-on-in-suspend;
431*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
432*4882a593Smuzhiyun				};
433*4882a593Smuzhiyun			};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
436*4882a593Smuzhiyun				regulator-name = "vcc3v3_s3";
437*4882a593Smuzhiyun				regulator-always-on;
438*4882a593Smuzhiyun				regulator-boot-on;
439*4882a593Smuzhiyun				regulator-state-mem {
440*4882a593Smuzhiyun					regulator-off-in-suspend;
441*4882a593Smuzhiyun				};
442*4882a593Smuzhiyun			};
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun			vcc3v3_s0: SWITCH_REG2 {
445*4882a593Smuzhiyun				regulator-name = "vcc3v3_s0";
446*4882a593Smuzhiyun				regulator-always-on;
447*4882a593Smuzhiyun				regulator-boot-on;
448*4882a593Smuzhiyun				regulator-state-mem {
449*4882a593Smuzhiyun					regulator-off-in-suspend;
450*4882a593Smuzhiyun				};
451*4882a593Smuzhiyun			};
452*4882a593Smuzhiyun		};
453*4882a593Smuzhiyun	};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun	vdd_cpu_b: regulator@40 {
456*4882a593Smuzhiyun		compatible = "silergy,syr827";
457*4882a593Smuzhiyun		reg = <0x40>;
458*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <0>;
459*4882a593Smuzhiyun		regulator-name = "vdd_cpu_b";
460*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
461*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
462*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
463*4882a593Smuzhiyun		regulator-always-on;
464*4882a593Smuzhiyun		regulator-boot-on;
465*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun		regulator-state-mem {
468*4882a593Smuzhiyun			regulator-off-in-suspend;
469*4882a593Smuzhiyun		};
470*4882a593Smuzhiyun	};
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun	vdd_gpu: regulator@41 {
473*4882a593Smuzhiyun		compatible = "silergy,syr828";
474*4882a593Smuzhiyun		reg = <0x41>;
475*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
476*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
477*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
478*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
479*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
480*4882a593Smuzhiyun		regulator-always-on;
481*4882a593Smuzhiyun		regulator-boot-on;
482*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun		regulator-state-mem {
485*4882a593Smuzhiyun			regulator-off-in-suspend;
486*4882a593Smuzhiyun		};
487*4882a593Smuzhiyun	};
488*4882a593Smuzhiyun};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun&i2c1 {
491*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <300>;
492*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
493*4882a593Smuzhiyun	status = "okay";
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun	rt5640: rt5640@1c {
496*4882a593Smuzhiyun		compatible = "realtek,rt5640";
497*4882a593Smuzhiyun		reg = <0x1c>;
498*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S_8CH_OUT>;
499*4882a593Smuzhiyun		clock-names = "mclk";
500*4882a593Smuzhiyun		realtek,in1-differential;
501*4882a593Smuzhiyun		#sound-dai-cells = <0>;
502*4882a593Smuzhiyun		pinctrl-names = "default";
503*4882a593Smuzhiyun		pinctrl-0 = <&rt5640_hpcon>;
504*4882a593Smuzhiyun	};
505*4882a593Smuzhiyun};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun&i2c3 {
508*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <450>;
509*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <15>;
510*4882a593Smuzhiyun	status = "okay";
511*4882a593Smuzhiyun};
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun&i2c4 {
514*4882a593Smuzhiyun	i2c-scl-rising-time-ns = <600>;
515*4882a593Smuzhiyun	i2c-scl-falling-time-ns = <20>;
516*4882a593Smuzhiyun	status = "okay";
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun	accelerometer@68 {
519*4882a593Smuzhiyun		compatible = "invensense,mpu6500";
520*4882a593Smuzhiyun		reg = <0x68>;
521*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
522*4882a593Smuzhiyun		interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
523*4882a593Smuzhiyun	};
524*4882a593Smuzhiyun};
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun&i2s0 {
527*4882a593Smuzhiyun	rockchip,playback-channels = <8>;
528*4882a593Smuzhiyun	rockchip,capture-channels = <8>;
529*4882a593Smuzhiyun	status = "okay";
530*4882a593Smuzhiyun};
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun&i2s1 {
533*4882a593Smuzhiyun	rockchip,playback-channels = <2>;
534*4882a593Smuzhiyun	rockchip,capture-channels = <2>;
535*4882a593Smuzhiyun	status = "okay";
536*4882a593Smuzhiyun};
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun&i2s2 {
539*4882a593Smuzhiyun	status = "okay";
540*4882a593Smuzhiyun};
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun&io_domains {
543*4882a593Smuzhiyun	status = "okay";
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun	bt656-supply = <&vcc1v8_dvp>;
546*4882a593Smuzhiyun	audio-supply = <&vcca1v8_codec>;
547*4882a593Smuzhiyun	sdmmc-supply = <&vcc_sdio>;
548*4882a593Smuzhiyun	gpio1830-supply = <&vcc_3v0>;
549*4882a593Smuzhiyun};
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun&pcie_phy {
552*4882a593Smuzhiyun	status = "okay";
553*4882a593Smuzhiyun};
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun&pcie0 {
556*4882a593Smuzhiyun	ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
557*4882a593Smuzhiyun	num-lanes = <4>;
558*4882a593Smuzhiyun	pinctrl-names = "default";
559*4882a593Smuzhiyun	pinctrl-0 = <&pcie_clkreqn_cpm>;
560*4882a593Smuzhiyun	status = "okay";
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&pmu_io_domains {
564*4882a593Smuzhiyun	pmu1830-supply = <&vcc_3v0>;
565*4882a593Smuzhiyun	status = "okay";
566*4882a593Smuzhiyun};
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun&pinctrl {
569*4882a593Smuzhiyun	buttons {
570*4882a593Smuzhiyun		pwrbtn: pwrbtn {
571*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
572*4882a593Smuzhiyun		};
573*4882a593Smuzhiyun	};
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun	lcd-panel {
576*4882a593Smuzhiyun		lcd_panel_reset: lcd-panel-reset {
577*4882a593Smuzhiyun			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
578*4882a593Smuzhiyun		};
579*4882a593Smuzhiyun	};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun	pcie {
582*4882a593Smuzhiyun		pcie_pwr_en: pcie-pwr-en {
583*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
584*4882a593Smuzhiyun		};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun		pcie_3g_drv: pcie-3g-drv {
587*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
588*4882a593Smuzhiyun		};
589*4882a593Smuzhiyun	};
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun	pmic {
592*4882a593Smuzhiyun		vsel1_pin: vsel1-pin {
593*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
594*4882a593Smuzhiyun		};
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun		vsel2_pin: vsel2-pin {
597*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
598*4882a593Smuzhiyun		};
599*4882a593Smuzhiyun	};
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun	sdio-pwrseq {
602*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
603*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
604*4882a593Smuzhiyun		};
605*4882a593Smuzhiyun	};
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun	rt5640 {
608*4882a593Smuzhiyun		rt5640_hpcon: rt5640-hpcon {
609*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
610*4882a593Smuzhiyun		};
611*4882a593Smuzhiyun	};
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun	pmic {
614*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
615*4882a593Smuzhiyun			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
616*4882a593Smuzhiyun		};
617*4882a593Smuzhiyun	};
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun	usb2 {
620*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
621*4882a593Smuzhiyun			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
622*4882a593Smuzhiyun		};
623*4882a593Smuzhiyun	};
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun	wifi {
626*4882a593Smuzhiyun		wifi_host_wake_l: wifi-host-wake-l {
627*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
628*4882a593Smuzhiyun		};
629*4882a593Smuzhiyun	};
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun	leds {
632*4882a593Smuzhiyun		work_led_pin: work-led-pin {
633*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
634*4882a593Smuzhiyun		};
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun		diy_led_pin: diy-led-pin {
637*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
638*4882a593Smuzhiyun		};
639*4882a593Smuzhiyun	};
640*4882a593Smuzhiyun};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun&pwm0 {
643*4882a593Smuzhiyun	status = "okay";
644*4882a593Smuzhiyun};
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun&pwm2 {
647*4882a593Smuzhiyun	status = "okay";
648*4882a593Smuzhiyun};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun&saradc {
651*4882a593Smuzhiyun	vref-supply = <&vcca1v8_s3>;
652*4882a593Smuzhiyun	status = "okay";
653*4882a593Smuzhiyun};
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun&sdio0 {
656*4882a593Smuzhiyun	/* WiFi & BT combo module Ampak AP6356S */
657*4882a593Smuzhiyun	bus-width = <4>;
658*4882a593Smuzhiyun	cap-sdio-irq;
659*4882a593Smuzhiyun	cap-sd-highspeed;
660*4882a593Smuzhiyun	keep-power-in-suspend;
661*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
662*4882a593Smuzhiyun	non-removable;
663*4882a593Smuzhiyun	pinctrl-names = "default";
664*4882a593Smuzhiyun	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
665*4882a593Smuzhiyun	sd-uhs-sdr104;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun	/* Power supply */
668*4882a593Smuzhiyun	vqmmc-supply = <&vcc1v8_s3>;	/* IO line */
669*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdio>;	/* card's power */
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun	#address-cells = <1>;
672*4882a593Smuzhiyun	#size-cells = <0>;
673*4882a593Smuzhiyun	status = "okay";
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun	brcmf: wifi@1 {
676*4882a593Smuzhiyun		reg = <1>;
677*4882a593Smuzhiyun		compatible = "brcm,bcm4329-fmac";
678*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
679*4882a593Smuzhiyun		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
680*4882a593Smuzhiyun		interrupt-names = "host-wake";
681*4882a593Smuzhiyun		brcm,drive-strength = <5>;
682*4882a593Smuzhiyun		pinctrl-names = "default";
683*4882a593Smuzhiyun		pinctrl-0 = <&wifi_host_wake_l>;
684*4882a593Smuzhiyun	};
685*4882a593Smuzhiyun};
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun&sdmmc {
688*4882a593Smuzhiyun	bus-width = <4>;
689*4882a593Smuzhiyun	cap-mmc-highspeed;
690*4882a593Smuzhiyun	cap-sd-highspeed;
691*4882a593Smuzhiyun	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
692*4882a593Smuzhiyun	disable-wp;
693*4882a593Smuzhiyun	max-frequency = <150000000>;
694*4882a593Smuzhiyun	pinctrl-names = "default";
695*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
696*4882a593Smuzhiyun	status = "okay";
697*4882a593Smuzhiyun};
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun&sdhci {
700*4882a593Smuzhiyun	bus-width = <8>;
701*4882a593Smuzhiyun	mmc-hs400-1_8v;
702*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
703*4882a593Smuzhiyun	non-removable;
704*4882a593Smuzhiyun	status = "okay";
705*4882a593Smuzhiyun};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun&tcphy0 {
708*4882a593Smuzhiyun	status = "okay";
709*4882a593Smuzhiyun};
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun&tcphy1 {
712*4882a593Smuzhiyun	status = "okay";
713*4882a593Smuzhiyun};
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun&tsadc {
716*4882a593Smuzhiyun	/* tshut mode 0:CRU 1:GPIO */
717*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>;
718*4882a593Smuzhiyun	/* tshut polarity 0:LOW 1:HIGH */
719*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>;
720*4882a593Smuzhiyun	status = "okay";
721*4882a593Smuzhiyun};
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun&u2phy0 {
724*4882a593Smuzhiyun	status = "okay";
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun	u2phy0_otg: otg-port {
727*4882a593Smuzhiyun		status = "okay";
728*4882a593Smuzhiyun	};
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun	u2phy0_host: host-port {
731*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
732*4882a593Smuzhiyun		status = "okay";
733*4882a593Smuzhiyun	};
734*4882a593Smuzhiyun};
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun&u2phy1 {
737*4882a593Smuzhiyun	status = "okay";
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun	u2phy1_otg: otg-port {
740*4882a593Smuzhiyun		status = "okay";
741*4882a593Smuzhiyun	};
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun	u2phy1_host: host-port {
744*4882a593Smuzhiyun		phy-supply = <&vcc5v0_host>;
745*4882a593Smuzhiyun		status = "okay";
746*4882a593Smuzhiyun	};
747*4882a593Smuzhiyun};
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun&uart0 {
750*4882a593Smuzhiyun	pinctrl-names = "default";
751*4882a593Smuzhiyun	pinctrl-0 = <&uart0_xfer &uart0_cts>;
752*4882a593Smuzhiyun	status = "okay";
753*4882a593Smuzhiyun};
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun&uart2 {
756*4882a593Smuzhiyun	status = "okay";
757*4882a593Smuzhiyun};
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun&usb_host0_ehci {
760*4882a593Smuzhiyun	status = "okay";
761*4882a593Smuzhiyun};
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun&usb_host0_ohci {
764*4882a593Smuzhiyun	status = "okay";
765*4882a593Smuzhiyun};
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun&usb_host1_ehci {
768*4882a593Smuzhiyun	status = "okay";
769*4882a593Smuzhiyun};
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun&usb_host1_ohci {
772*4882a593Smuzhiyun	status = "okay";
773*4882a593Smuzhiyun};
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun&usbdrd3_0 {
776*4882a593Smuzhiyun	status = "okay";
777*4882a593Smuzhiyun};
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun&usbdrd_dwc3_0 {
780*4882a593Smuzhiyun	status = "okay";
781*4882a593Smuzhiyun	dr_mode = "otg";
782*4882a593Smuzhiyun};
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun&usbdrd3_1 {
785*4882a593Smuzhiyun	status = "okay";
786*4882a593Smuzhiyun};
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun&usbdrd_dwc3_1 {
789*4882a593Smuzhiyun	status = "okay";
790*4882a593Smuzhiyun	dr_mode = "host";
791*4882a593Smuzhiyun};
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun&vopb {
794*4882a593Smuzhiyun	status = "okay";
795*4882a593Smuzhiyun};
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun&vopb_mmu {
798*4882a593Smuzhiyun	status = "okay";
799*4882a593Smuzhiyun};
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun&vopl {
802*4882a593Smuzhiyun	status = "okay";
803*4882a593Smuzhiyun};
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun&vopl_mmu {
806*4882a593Smuzhiyun	status = "okay";
807*4882a593Smuzhiyun};
808