1/* 2 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 */ 6 7/dts-v1/; 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/sensor-dev.h> 10#include "rk3399.dtsi" 11#include "rk3399-android.dtsi" 12#include "rk3399-opp.dtsi" 13#include "rk3399-vop-clk-set.dtsi" 14#include <dt-bindings/display/mipi_dsi.h> 15 16/ { 17 adc_keys { 18 compatible = "adc-keys"; 19 io-channels = <&saradc 1>; 20 io-channel-names = "buttons"; 21 keyup-threshold-microvolt = <1800000>; 22 poll-interval = <100>; 23 24 vol-up-key { 25 label = "volume up"; 26 linux,code = <KEY_VOLUMEUP>; 27 press-threshold-microvolt = <1000>; 28 }; 29 30 vol-down-key { 31 label = "volume down"; 32 linux,code = <KEY_VOLUMEDOWN>; 33 press-threshold-microvolt = <170000>; 34 }; 35 }; 36 37 backlight: backlight { 38 compatible = "pwm-backlight"; 39 pwms = <&pwm0 0 25000 0>; 40 brightness-levels = < 41 0 20 20 21 21 22 22 23 42 23 24 24 25 25 26 26 27 43 27 28 28 29 29 30 30 31 44 31 32 32 33 33 34 34 35 45 35 36 36 37 37 38 38 39 46 40 41 42 43 44 45 46 47 47 48 49 50 51 52 53 54 55 48 56 57 58 59 60 61 62 63 49 64 65 66 67 68 69 70 71 50 72 73 74 75 76 77 78 79 51 80 81 82 83 84 85 86 87 52 88 89 90 91 92 93 94 95 53 96 97 98 99 100 101 102 103 54 104 105 106 107 108 109 110 111 55 112 113 114 115 116 117 118 119 56 120 121 122 123 124 125 126 127 57 128 129 130 131 132 133 134 135 58 136 137 138 139 140 141 142 143 59 144 145 146 147 148 149 150 151 60 152 153 154 155 156 157 158 159 61 160 161 162 163 164 165 166 167 62 168 169 170 171 172 173 174 175 63 176 177 178 179 180 181 182 183 64 184 185 186 187 188 189 190 191 65 192 193 194 195 196 197 198 199 66 200 201 202 203 204 205 206 207 67 208 209 210 211 212 213 214 215 68 216 217 218 219 220 221 222 223 69 224 225 226 227 228 229 230 231 70 232 233 234 235 236 237 238 239 71 240 241 242 243 244 245 246 247 72 248 249 250 251 252 253 254 255 73 >; 74 default-brightness-level = <200>; 75 }; 76 77 es8316-sound { 78 compatible = "simple-audio-card"; 79 simple-audio-card,format = "i2s"; 80 simple-audio-card,name = "rockchip,es8316-codec"; 81 simple-audio-card,mclk-fs = <256>; 82 simple-audio-card,widgets = 83 "Microphone", "Mic Jack", 84 "Headphone", "Headphone Jack"; 85 simple-audio-card,routing = 86 "Mic Jack", "MICBIAS1", 87 "IN1P", "Mic Jack", 88 "Headphone Jack", "HPOL", 89 "Headphone Jack", "HPOR"; 90 simple-audio-card,cpu { 91 sound-dai = <&i2s0>; 92 system-clock-frequency = <11289600>; 93 }; 94 simple-audio-card,codec { 95 sound-dai = <&es8316>; 96 system-clock-frequency = <11289600>; 97 }; 98 }; 99 100 rk_headset: rk-headset { 101 compatible = "rockchip_headset"; 102 headset_gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&hp_det>; 105 io-channels = <&saradc 2>; 106 }; 107 108 charge-animation { 109 compatible = "rockchip,uboot-charge"; 110 rockchip,uboot-charge-on = <1>; 111 rockchip,android-charge-on = <0>; 112 rockchip,uboot-low-power-voltage = <6700>; 113 rockchip,screen-on-voltage = <6800>; 114 status = "okay"; 115 }; 116 117 sdio_pwrseq: sdio-pwrseq { 118 compatible = "mmc-pwrseq-simple"; 119 clocks = <&rk808 1>; 120 clock-names = "ext_clock"; 121 pinctrl-names = "default"; 122 pinctrl-0 = <&wifi_enable_h>; 123 124 /* 125 * On the module itself this is one of these (depending 126 * on the actual card populated): 127 * - SDIO_RESET_L_WL_REG_ON 128 * - PDN (power down when low) 129 */ 130 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 131 }; 132 133 vcc_sys: vcc-sys { 134 compatible = "regulator-fixed"; 135 regulator-name = "vcc_sys"; 136 regulator-always-on; 137 regulator-boot-on; 138 regulator-min-microvolt = <3900000>; 139 regulator-max-microvolt = <3900000>; 140 }; 141 142 vcc3v3_sys: vcc3v3-sys { 143 compatible = "regulator-fixed"; 144 regulator-name = "vcc3v3_sys"; 145 regulator-always-on; 146 regulator-boot-on; 147 regulator-min-microvolt = <3300000>; 148 regulator-max-microvolt = <3300000>; 149 }; 150 151 vcc5v0_host: vcc5v0-host-regulator { 152 compatible = "regulator-fixed"; 153 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 154 pinctrl-names = "default"; 155 pinctrl-0 = <&host_vbus_drv>; 156 regulator-name = "vcc5v0_host"; 157 regulator-min-microvolt = <5000000>; 158 regulator-max-microvolt = <5000000>; 159 regulator-always-on; 160 enable-active-high; 161 }; 162 163 vdd_log: vdd-log { 164 compatible = "pwm-regulator"; 165 pwms = <&pwm2 0 25000 1>; 166 rockchip,pwm_id= <2>; 167 rockchip,pwm_voltage = <900000>; 168 regulator-name = "vdd_log"; 169 regulator-min-microvolt = <750000>; 170 regulator-max-microvolt = <1350000>; 171 regulator-always-on; 172 regulator-boot-on; 173 }; 174 175 xin32k: xin32k { 176 compatible = "fixed-clock"; 177 clock-frequency = <32768>; 178 clock-output-names = "xin32k"; 179 #clock-cells = <0>; 180 }; 181 182 wireless-wlan { 183 compatible = "wlan-platdata"; 184 rockchip,grf = <&grf>; 185 wifi_chip_type = "ap6255"; 186 sdio_vref = <1800>; 187 WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 188 status = "okay"; 189 }; 190 191 wireless-bluetooth { 192 compatible = "bluetooth-platdata"; 193 clocks = <&rk808 1>; 194 clock-names = "ext_clock"; 195 uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; 196 pinctrl-names = "default", "rts_gpio"; 197 pinctrl-0 = <&uart0_rts>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>; 198 pinctrl-1 = <&uart0_gpios>; 199 BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 200 BT,wake_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 201 BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 202 status = "okay"; 203 }; 204}; 205 206&cdn_dp { 207 status = "okay"; 208 extcon = <&fusb0>; 209 phys = <&tcphy0_dp>; 210}; 211 212&cpu_l0 { 213 cpu-supply = <&vdd_cpu_l>; 214}; 215 216&cpu_l1 { 217 cpu-supply = <&vdd_cpu_l>; 218}; 219 220&cpu_l2 { 221 cpu-supply = <&vdd_cpu_l>; 222}; 223 224&cpu_l3 { 225 cpu-supply = <&vdd_cpu_l>; 226}; 227 228&cpu_b0 { 229 cpu-supply = <&vdd_cpu_b>; 230}; 231 232&cpu_b1 { 233 cpu-supply = <&vdd_cpu_b>; 234}; 235 236&dfi { 237 status = "okay"; 238}; 239 240&dmc { 241 status = "okay"; 242 center-supply = <&vdd_center>; 243 upthreshold = <20>; 244 downdifferential = <10>; 245 system-status-freq = < 246 /*system status freq(KHz)*/ 247 SYS_STATUS_NORMAL 856000 248 SYS_STATUS_REBOOT 856000 249 SYS_STATUS_SUSPEND 416000 250 SYS_STATUS_VIDEO_1080P 416000 251 SYS_STATUS_VIDEO_4K 666000 252 SYS_STATUS_VIDEO_4K_10B 856000 253 SYS_STATUS_PERFORMANCE 856000 254 SYS_STATUS_BOOST 856000 255 SYS_STATUS_DUALVIEW 856000 256 SYS_STATUS_ISP 856000 257 >; 258 vop-bw-dmc-freq = < 259 /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */ 260 0 762 328000 261 763 3012 666000 262 3013 99999 856000 263 >; 264 265 auto-min-freq = <328000>; 266 auto-freq-en = <1>; 267}; 268 269&dmc_opp_table { 270 compatible = "operating-points-v2"; 271 272 opp-200000000 { 273 opp-hz = /bits/ 64 <200000000>; 274 opp-microvolt = <900000>; 275 status = "disabled"; 276 }; 277 opp-300000000 { 278 opp-hz = /bits/ 64 <300000000>; 279 opp-microvolt = <900000>; 280 status = "disabled"; 281 }; 282 opp-328000000 { 283 opp-hz = /bits/ 64 <328000000>; 284 opp-microvolt = <900000>; 285 }; 286 opp-400000000 { 287 opp-hz = /bits/ 64 <400000000>; 288 opp-microvolt = <900000>; 289 status = "disabled"; 290 }; 291 opp-416000000 { 292 opp-hz = /bits/ 64 <416000000>; 293 opp-microvolt = <900000>; 294 }; 295 opp-528000000 { 296 opp-hz = /bits/ 64 <528000000>; 297 opp-microvolt = <900000>; 298 status = "disabled"; 299 }; 300 opp-600000000 { 301 opp-hz = /bits/ 64 <600000000>; 302 opp-microvolt = <900000>; 303 status = "disabled"; 304 }; 305 opp-666000000 { 306 opp-hz = /bits/ 64 <666000000>; 307 opp-microvolt = <900000>; 308 }; 309 opp-800000000 { 310 opp-hz = /bits/ 64 <800000000>; 311 opp-microvolt = <900000>; 312 status = "disabled"; 313 }; 314 opp-856000000 { 315 opp-hz = /bits/ 64 <856000000>; 316 opp-microvolt = <900000>; 317 }; 318 opp-928000000 { 319 opp-hz = /bits/ 64 <928000000>; 320 opp-microvolt = <900000>; 321 status = "disabled"; 322 }; 323}; 324&dp_in_vopb { 325 status = "disabled"; 326}; 327 328&dsi { 329 status = "okay"; 330 rockchip,lane-rate = <1000>; 331 dsi_panel: panel@0 { 332 status = "okay"; 333 compatible = "simple-panel-dsi"; 334 reg = <0>; 335 backlight = <&backlight>; 336 reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; 337 pinctrl-names = "default"; 338 pinctrl-0 = <&lcd_rst_gpio>; 339 reset-delay-ms = <60>; 340 enable-delay-ms = <60>; 341 prepare-delay-ms = <60>; 342 unprepare-delay-ms = <60>; 343 disable-delay-ms = <60>; 344 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 345 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 346 dsi,format = <MIPI_DSI_FMT_RGB888>; 347 dsi,lanes = <4>; 348 panel-init-sequence = [ 349 15 05 02 8F A5 350 15 14 02 01 00 351 15 05 02 8F A5 352 15 00 02 83 AA 353 15 00 02 84 11 354 15 00 02 A9 4B 355 15 00 02 83 00 356 15 00 02 84 00 357 15 00 02 8F 00 358 ]; 359 360 disp_timings: display-timings { 361 native-mode = <&timing0>; 362 timing0: timing0 { 363 clock-frequency = <150000000>; 364 hactive = <1200>; 365 hfront-porch = <80>; 366 hback-porch = <60>; 367 hsync-len = <1>; 368 vactive = <1920>; 369 vfront-porch = <35>; 370 vback-porch = <25>; 371 vsync-len = <1>; 372 hsync-active = <0>; 373 vsync-active = <0>; 374 de-active = <0>; 375 pixelclk-active = <0>; 376 }; 377 }; 378 379 ports { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 383 port@0 { 384 reg = <0>; 385 panel_in_dsi: endpoint { 386 remote-endpoint = <&dsi_out_panel>; 387 }; 388 }; 389 }; 390 }; 391 392 ports { 393 #address-cells = <1>; 394 #size-cells = <0>; 395 396 port@1 { 397 reg = <1>; 398 dsi_out_panel: endpoint { 399 remote-endpoint = <&panel_in_dsi>; 400 }; 401 }; 402 }; 403}; 404 405&dsi_in_vopl { 406 status = "disabled"; 407}; 408 409&emmc_phy { 410 status = "okay"; 411}; 412 413&gpu { 414 status = "okay"; 415 mali-supply = <&vdd_gpu>; 416}; 417 418&hdmi { 419 status = "okay"; 420}; 421 422&hdmi_dp_sound { 423 status = "okay"; 424}; 425 426&hdmi_in_vopb { 427 status = "disabled"; 428}; 429 430&i2c0 { 431 status = "okay"; 432 i2c-scl-rising-time-ns = <180>; 433 i2c-scl-falling-time-ns = <30>; 434 clock-frequency = <400000>; 435 436 vdd_cpu_b: syr837@40 { 437 compatible = "silergy,syr827"; 438 reg = <0x40>; 439 vin-supply = <&vcc_sys>; 440 regulator-compatible = "fan53555-reg"; 441 pinctrl-0 = <&vsel1_gpio>; 442 vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 443 regulator-name = "vdd_cpu_b"; 444 regulator-min-microvolt = <712500>; 445 regulator-max-microvolt = <1500000>; 446 regulator-ramp-delay = <1000>; 447 fcs,suspend-voltage-selector = <1>; 448 regulator-always-on; 449 regulator-initial-state = <3>; 450 regulator-state-mem { 451 regulator-off-in-suspend; 452 }; 453 }; 454 455 vdd_gpu: syr828@41 { 456 compatible = "silergy,syr828"; 457 status = "okay"; 458 reg = <0x41>; 459 vin-supply = <&vcc_sys>; 460 regulator-compatible = "fan53555-reg"; 461 pinctrl-0 = <&vsel2_gpio>; 462 vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 463 regulator-name = "vdd_gpu"; 464 regulator-min-microvolt = <735000>; 465 regulator-max-microvolt = <1400000>; 466 regulator-ramp-delay = <1000>; 467 fcs,suspend-voltage-selector = <1>; 468 regulator-always-on; 469 regulator-boot-on; 470 regulator-state-mem { 471 regulator-off-in-suspend; 472 }; 473 }; 474 475 rk808: pmic@1b { 476 compatible = "rockchip,rk808"; 477 reg = <0x1b>; 478 interrupt-parent = <&gpio1>; 479 interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; 480 pinctrl-0 = <&pmic_int_l>; 481 rockchip,system-power-controller; 482 wakeup-source; 483 #clock-cells = <1>; 484 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 485 vcc1-supply = <&vcc3v3_sys>; 486 vcc2-supply = <&vcc3v3_sys>; 487 vcc3-supply = <&vcc3v3_sys>; 488 vcc4-supply = <&vcc3v3_sys>; 489 vcc6-supply = <&vcc3v3_sys>; 490 vcc7-supply = <&vcc3v3_sys>; 491 vcc8-supply = <&vcc3v3_sys>; 492 vcc9-supply = <&vcc3v3_sys>; 493 vcc10-supply = <&vcc3v3_sys>; 494 vcc11-supply = <&vcc3v3_sys>; 495 vcc12-supply = <&vcc3v3_sys>; 496 vddio-supply = <&vcc1v8_pmu>; 497 498 regulators { 499 500 vdd_center: DCDC_REG1 { 501 regulator-always-on; 502 regulator-boot-on; 503 regulator-min-microvolt = <750000>; 504 regulator-max-microvolt = <1350000>; 505 regulator-ramp-delay = <6001>; 506 regulator-name = "vdd_center"; 507 regulator-state-mem { 508 regulator-off-in-suspend; 509 }; 510 }; 511 vdd_cpu_l: DCDC_REG2 { 512 regulator-always-on; 513 regulator-boot-on; 514 regulator-min-microvolt = <750000>; 515 regulator-max-microvolt = <1350000>; 516 regulator-ramp-delay = <6001>; 517 regulator-name = "vdd_cpu_l"; 518 regulator-state-mem { 519 regulator-off-in-suspend; 520 }; 521 }; 522 vcc_ddr: DCDC_REG3 { 523 regulator-always-on; 524 regulator-boot-on; 525 regulator-name = "vcc_ddr"; 526 regulator-state-mem { 527 regulator-on-in-suspend; 528 }; 529 }; 530 vcc_1v8: DCDC_REG4 { 531 regulator-always-on; 532 regulator-boot-on; 533 regulator-min-microvolt = <1800000>; 534 regulator-max-microvolt = <1800000>; 535 regulator-name = "vcc_1v8"; 536 regulator-state-mem { 537 regulator-on-in-suspend; 538 regulator-suspend-microvolt = <1800000>; 539 }; 540 }; 541 vcc1v8_dvp: LDO_REG1 { 542 regulator-always-on; 543 regulator-boot-on; 544 regulator-min-microvolt = <1800000>; 545 regulator-max-microvolt = <1800000>; 546 regulator-name = "vcc1v8_dvp"; 547 regulator-state-mem { 548 regulator-off-in-suspend; 549 }; 550 }; 551 vcc3v0_tp: LDO_REG2 { 552 regulator-always-on; 553 regulator-boot-on; 554 regulator-min-microvolt = <3000000>; 555 regulator-max-microvolt = <3000000>; 556 regulator-name = "vcc3v0_tp"; 557 regulator-state-mem { 558 regulator-on-in-suspend; 559 }; 560 }; 561 vcc1v8_pmu: LDO_REG3 { 562 regulator-always-on; 563 regulator-boot-on; 564 regulator-min-microvolt = <1800000>; 565 regulator-max-microvolt = <1800000>; 566 regulator-name = "vcc1v8_pmu"; 567 regulator-state-mem { 568 regulator-on-in-suspend; 569 regulator-suspend-microvolt = <1800000>; 570 }; 571 }; 572 vcc_sd: LDO_REG4 { 573 regulator-always-on; 574 regulator-boot-on; 575 regulator-min-microvolt = <3000000>; 576 regulator-max-microvolt = <3000000>; 577 regulator-name = "vcc_sd"; 578 regulator-state-mem { 579 regulator-on-in-suspend; 580 regulator-suspend-microvolt = <3000000>; 581 }; 582 }; 583 vcca3v0_codec: LDO_REG5 { 584 regulator-always-on; 585 regulator-boot-on; 586 regulator-min-microvolt = <3000000>; 587 regulator-max-microvolt = <3000000>; 588 regulator-name = "vcca3v0_codec"; 589 regulator-state-mem { 590 regulator-off-in-suspend; 591 }; 592 }; 593 vcc_1v5: LDO_REG6 { 594 regulator-always-on; 595 regulator-boot-on; 596 regulator-min-microvolt = <1500000>; 597 regulator-max-microvolt = <1500000>; 598 regulator-name = "vcc_1v5"; 599 regulator-state-mem { 600 regulator-on-in-suspend; 601 regulator-suspend-microvolt = <1500000>; 602 }; 603 }; 604 vcca1v8_codec: LDO_REG7 { 605 regulator-always-on; 606 regulator-boot-on; 607 regulator-min-microvolt = <1800000>; 608 regulator-max-microvolt = <1800000>; 609 regulator-name = "vcca1v8_codec"; 610 regulator-state-mem { 611 regulator-off-in-suspend; 612 }; 613 }; 614 vcc_3v0: LDO_REG8 { 615 regulator-always-on; 616 regulator-boot-on; 617 regulator-min-microvolt = <3000000>; 618 regulator-max-microvolt = <3000000>; 619 regulator-name = "vcc_3v0"; 620 regulator-state-mem { 621 regulator-on-in-suspend; 622 regulator-suspend-microvolt = <3000000>; 623 }; 624 }; 625 vcc3v3_s3: SWITCH_REG1 { 626 regulator-always-on; 627 regulator-boot-on; 628 regulator-name = "vcc3v3_s3"; 629 regulator-state-mem { 630 regulator-off-in-suspend; 631 }; 632 }; 633 vcc3v3_s0: SWITCH_REG2 { 634 regulator-boot-on; 635 regulator-always-on; 636 regulator-name = "vcc3v3_s0"; 637 regulator-state-mem { 638 regulator-off-in-suspend; 639 }; 640 }; 641 }; 642 }; 643}; 644 645&i2c1 { 646 status = "okay"; 647 i2c-scl-rising-time-ns = <140>; 648 i2c-scl-falling-time-ns = <30>; 649 650 es8316: es8316@11 { 651 #sound-dai-cells = <0>; 652 compatible = "everest,es8316"; 653 reg = <0x11>; 654 clocks = <&cru SCLK_I2S_8CH_OUT>; 655 clock-names = "mclk"; 656 pinctrl-names = "default"; 657 pinctrl-0 = <&i2s_8ch_mclk>; 658 spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 659 extcon = <&rk_headset>; 660 }; 661}; 662 663&i2c4 { 664 status = "okay"; 665 i2c-scl-rising-time-ns = <345>; 666 i2c-scl-falling-time-ns = <11>; 667 clock-frequency = <100000>; 668 669 bq25700: bq25700@6b { 670 compatible = "ti,bq25703"; 671 reg = <0x6b>; 672 extcon = <&fusb0>; 673 interrupt-parent = <&gpio1>; 674 interrupts = <RK_PC7 IRQ_TYPE_LEVEL_LOW>; 675 pinctrl-names = "default"; 676 pinctrl-0 = <&charger_ok>; 677 ti,charge-current = <1500000>; 678 ti,max-charge-voltage = <8704000>; 679 ti,max-input-voltage = <20000000>; 680 ti,max-input-current = <6000000>; 681 ti,input-current-sdp = <500000>; 682 ti,input-current-dcp = <2000000>; 683 ti,input-current-cdp = <2000000>; 684 ti,input-current-dc = <2000000>; 685 ti,minimum-sys-voltage = <6700000>; 686 ti,otg-voltage = <5000000>; 687 ti,otg-current = <500000>; 688 ti,input-current = <500000>; 689 pd-charge-only = <0>; 690 typec0-enable-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>; 691 status = "okay"; 692 }; 693 694 cw2015: cw2015@62 { 695 status = "okay"; 696 compatible = "cw201x"; 697 reg = <0x62>; 698 bat_config_info = <0x15 0xA8 0x5D 0x5D 0x59 0x55 0x57 0x50 699 0x4B 0x4F 0x55 0x53 0x43 0x37 0x2F 0x28 700 0x21 0x18 0x15 0x17 0x27 0x43 0x57 0x4F 701 0x13 0x5E 0x0A 0xE1 0x19 0x31 0x3C 0x46 702 0x4C 0x52 0x50 0x54 0x44 0x1E 0x7E 0x4C 703 0x1C 0x4A 0x52 0x87 0x8F 0x91 0x94 0x52 704 0x82 0x8C 0x92 0x96 0x00 0xAD 0xFB 0xCB 705 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x1C 0x09>; 706 monitor_sec = <2>; 707 virtual_power = <0>; 708 divider_res1 = <200>; 709 divider_res2 = <200>; 710 }; 711 712 fusb0: fusb30x@22 { 713 compatible = "fairchild,fusb302"; 714 reg = <0x22>; 715 pinctrl-names = "default"; 716 pinctrl-0 = <&fusb0_int>; 717 vbus-5v-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 718 int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; 719 discharge-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 720 charge-dev = <&bq25700>; 721 support-uboot-charge = <1>; 722 port-num = <0>; 723 status = "okay"; 724 }; 725 726 kxtj: kxtj2@0e { 727 status = "okay"; 728 compatible = "gs_kxtj9"; 729 pinctrl-names = "default"; 730 pinctrl-0 = <&kxtj2_irq_gpio>; 731 reg = <0x0e>; 732 irq-gpio = <&gpio1 RK_PC6 IRQ_TYPE_EDGE_RISING>; 733 type = <SENSOR_TYPE_ACCEL>; 734 irq_enable = <0>; 735 poll_delay_ms = <30>; 736 power-off-in-suspend = <1>; 737 layout = <5>; 738 }; 739}; 740 741&i2c5 { 742 status = "okay"; 743 i2c-scl-rising-time-ns = <150>; 744 i2c-scl-falling-time-ns = <30>; 745 clock-frequency = <100000>; 746 747 gslx680: gslx680@40 { 748 compatible = "gslX680_tve"; 749 reg = <0x40>; 750 pinctrl-names = "default"; 751 pinctrl-0 = <&tp_irq_gpio>; 752 touch-gpio = <&gpio3 RK_PB0 IRQ_TYPE_EDGE_RISING>; 753 reset-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; 754 max-x = <1200>; 755 max-y = <1920>; 756 tp-size = <80>; 757 tp-supply = <&vcc3v0_tp>; 758 status = "okay"; 759 }; 760}; 761 762&i2s0 { 763 status = "okay"; 764 rockchip,i2s-broken-burst-len; 765 rockchip,playback-channels = <8>; 766 rockchip,capture-channels = <8>; 767 #sound-dai-cells = <0>; 768}; 769 770&i2s2 { 771 #sound-dai-cells = <0>; 772 status = "okay"; 773}; 774 775&io_domains { 776 status = "okay"; 777 bt656-supply = <&vcc1v8_dvp>; 778 audio-supply = <&vcca1v8_codec>; 779 sdmmc-supply = <&vcc_sd>; 780 gpio1830-supply = <&vcc_3v0>; 781}; 782 783&isp0_mmu { 784 status = "okay"; 785}; 786 787&isp1_mmu { 788 status = "okay"; 789}; 790 791&pinctrl { 792 793 charger { 794 charger_ok: charge-ok { 795 rockchip,pins = 796 <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 797 }; 798 }; 799 800 fusb30x { 801 fusb0_int: fusb0-int { 802 rockchip,pins = 803 <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 804 <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 805 }; 806 }; 807 808 headphone { 809 hp_det: hp-det { 810 rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 811 }; 812 }; 813 814 kxtj2 { 815 kxtj2_irq_gpio: kxtj2-irq-gpio { 816 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 817 }; 818 }; 819 820 lcd_rst { 821 lcd_rst_gpio: lcd-rst-gpio { 822 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 823 }; 824 }; 825 826 pmic { 827 pmic_int_l: pmic-int-l { 828 rockchip,pins = 829 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 830 }; 831 vsel1_gpio: vsel1-gpio { 832 rockchip,pins = 833 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 834 }; 835 vsel2_gpio: vsel2-gpio { 836 rockchip,pins = 837 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 838 }; 839 }; 840 841 sdio-pwrseq { 842 wifi_enable_h: wifi-enable-h { 843 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 844 }; 845 }; 846 847 tp_irq { 848 tp_irq_gpio: tp-irq-gpio { 849 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 850 }; 851 }; 852 853 usb2 { 854 host_vbus_drv: host-vbus-drv { 855 rockchip,pins = 856 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 857 }; 858 }; 859 860 wireless-bluetooth { 861 uart0_gpios: uart0-gpios { 862 rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 863 }; 864 865 bt_reset_gpio: bt-reset-gpio { 866 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 867 }; 868 869 bt_wake_gpio: bt-wake-gpio { 870 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 871 }; 872 873 bt_irq_gpio: bt-irq-gpio { 874 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; 875 }; 876 }; 877}; 878 879&pmu_io_domains { 880 status = "okay"; 881 pmu1830-supply = <&vcc_1v8>; 882}; 883 884&pwm0 { 885 status = "okay"; 886}; 887 888&pwm2 { 889 status = "okay"; 890 pinctrl-names = "active"; 891 pinctrl-0 = <&pwm2_pin_pull_down>; 892}; 893 894&rockchip_suspend { 895 status = "okay"; 896 rockchip,sleep-debug-en = <1>; 897 rockchip,sleep-mode-config = < 898 (0 899 | RKPM_SLP_ARMPD 900 | RKPM_SLP_PERILPPD 901 | RKPM_SLP_DDR_RET 902 | RKPM_SLP_PLLPD 903 | RKPM_SLP_CENTER_PD 904 | RKPM_SLP_OSC_DIS 905 | RKPM_SLP_AP_PWROFF 906 ) 907 >; 908 rockchip,wakeup-config = < 909 (0 910 | RKPM_GPIO_WKUP_EN 911 ) 912 >; 913 rockchip,pwm-regulator-config = < 914 (0 915 | PWM2_REGULATOR_EN 916 ) 917 >; 918 rockchip,power-ctrl = 919 <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>, 920 <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 921}; 922 923&route_dsi { 924 status = "okay"; 925 logo,mode = "center"; 926}; 927 928&saradc { 929 status = "okay"; 930}; 931 932&sdhci { 933 bus-width = <8>; 934 mmc-hs400-1_8v; 935 no-sdio; 936 no-sd; 937 non-removable; 938 keep-power-in-suspend; 939 mmc-hs400-enhanced-strobe; 940 status = "okay"; 941}; 942 943&sdio0 { 944 clock-frequency = <100000000>; 945 clock-freq-min-max = <200000 100000000>; 946 no-sd; 947 no-mmc; 948 bus-width = <4>; 949 disable-wp; 950 cap-sd-highspeed; 951 cap-sdio-irq; 952 keep-power-in-suspend; 953 mmc-pwrseq = <&sdio_pwrseq>; 954 non-removable; 955 num-slots = <1>; 956 pinctrl-names = "default"; 957 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 958 sd-uhs-sdr104; 959 status = "okay"; 960}; 961 962&sdmmc { 963 clock-frequency = <50000000>; 964 clock-freq-min-max = <400000 150000000>; 965 no-sdio; 966 no-mmc; 967 bus-width = <4>; 968 cap-mmc-highspeed; 969 cap-sd-highspeed; 970 disable-wp; 971 num-slots = <1>; 972 //sd-uhs-sdr104; 973 vqmmc-supply = <&vcc_sd>; 974 pinctrl-names = "default"; 975 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 976 status = "okay"; 977}; 978 979&tcphy0 { 980 extcon = <&fusb0>; 981 status = "okay"; 982}; 983 984&tsadc { 985 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 986 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 987 status = "okay"; 988}; 989 990&u2phy0 { 991 status = "okay"; 992 extcon = <&fusb0>; 993 994 u2phy0_otg: otg-port { 995 status = "okay"; 996 }; 997 998 u2phy0_host: host-port { 999 phy-supply = <&vcc5v0_host>; 1000 status = "okay"; 1001 }; 1002}; 1003 1004&uart0 { 1005 pinctrl-names = "default"; 1006 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1007 status = "okay"; 1008}; 1009 1010&uart2 { 1011 status = "disabled"; 1012}; 1013 1014&usb_host0_ehci { 1015 status = "okay"; 1016}; 1017 1018&usb_host0_ohci { 1019 status = "okay"; 1020}; 1021 1022&usbdrd3_0 { 1023 status = "okay"; 1024}; 1025 1026&usbdrd_dwc3_0 { 1027 status = "okay"; 1028 extcon = <&fusb0>; 1029}; 1030 1031&vopb { 1032 assigned-clocks = <&cru DCLK_VOP0_DIV>; 1033 assigned-clock-parents = <&cru PLL_CPLL>; 1034}; 1035 1036&vopl { 1037 assigned-clocks = <&cru DCLK_VOP1_DIV>; 1038 assigned-clock-parents = <&cru PLL_VPLL>; 1039}; 1040