1/* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include "rk3399.dtsi" 11#include "rk3399-sdram-ddr3-1600.dtsi" 12#include "rk3399-u-boot.dtsi" 13 14/ { 15 model = "Firefly-RK3399 Board"; 16 compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; 17 18 chosen { 19 stdout-path = &uart2; 20 u-boot,spl-boot-order = &sdmmc, &sdhci; 21 }; 22 23 backlight: backlight { 24 compatible = "pwm-backlight"; 25 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 26 pwms = <&pwm0 0 25000 0>; 27 brightness-levels = < 28 0 1 2 3 4 5 6 7 29 8 9 10 11 12 13 14 15 30 16 17 18 19 20 21 22 23 31 24 25 26 27 28 29 30 31 32 32 33 34 35 36 37 38 39 33 40 41 42 43 44 45 46 47 34 48 49 50 51 52 53 54 55 35 56 57 58 59 60 61 62 63 36 64 65 66 67 68 69 70 71 37 72 73 74 75 76 77 78 79 38 80 81 82 83 84 85 86 87 39 88 89 90 91 92 93 94 95 40 96 97 98 99 100 101 102 103 41 104 105 106 107 108 109 110 111 42 112 113 114 115 116 117 118 119 43 120 121 122 123 124 125 126 127 44 128 129 130 131 132 133 134 135 45 136 137 138 139 140 141 142 143 46 144 145 146 147 148 149 150 151 47 152 153 154 155 156 157 158 159 48 160 161 162 163 164 165 166 167 49 168 169 170 171 172 173 174 175 50 176 177 178 179 180 181 182 183 51 184 185 186 187 188 189 190 191 52 192 193 194 195 196 197 198 199 53 200 201 202 203 204 205 206 207 54 208 209 210 211 212 213 214 215 55 216 217 218 219 220 221 222 223 56 224 225 226 227 228 229 230 231 57 232 233 234 235 236 237 238 239 58 240 241 242 243 244 245 246 247 59 248 249 250 251 252 253 254 255>; 60 default-brightness-level = <200>; 61 }; 62 63 clkin_gmac: external-gmac-clock { 64 compatible = "fixed-clock"; 65 clock-frequency = <125000000>; 66 clock-output-names = "clkin_gmac"; 67 #clock-cells = <0>; 68 }; 69 70 rt5640-sound { 71 compatible = "simple-audio-card"; 72 simple-audio-card,name = "rockchip,rt5640-codec"; 73 simple-audio-card,format = "i2s"; 74 simple-audio-card,mclk-fs = <256>; 75 simple-audio-card,widgets = 76 "Microphone", "Mic Jack", 77 "Headphone", "Headphone Jack"; 78 simple-audio-card,routing = 79 "Mic Jack", "MICBIAS1", 80 "IN1P", "Mic Jack", 81 "Headphone Jack", "HPOL", 82 "Headphone Jack", "HPOR"; 83 84 simple-audio-card,cpu { 85 sound-dai = <&i2s1>; 86 }; 87 88 simple-audio-card,codec { 89 sound-dai = <&rt5640>; 90 }; 91 }; 92 93 sdio_pwrseq: sdio-pwrseq { 94 compatible = "mmc-pwrseq-simple"; 95 clocks = <&rk808 1>; 96 clock-names = "ext_clock"; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&wifi_enable_h>; 99 100 /* 101 * On the module itself this is one of these (depending 102 * on the actual card populated): 103 * - SDIO_RESET_L_WL_REG_ON 104 * - PDN (power down when low) 105 */ 106 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 107 }; 108 109 vcc3v3_pcie: vcc3v3-pcie-regulator { 110 compatible = "regulator-fixed"; 111 enable-active-high; 112 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&pcie_drv>; 115 regulator-name = "vcc3v3_pcie"; 116 regulator-always-on; 117 regulator-boot-on; 118 }; 119 120 vcc3v3_sys: vcc3v3-sys { 121 compatible = "regulator-fixed"; 122 regulator-name = "vcc3v3_sys"; 123 regulator-always-on; 124 regulator-boot-on; 125 regulator-min-microvolt = <3300000>; 126 regulator-max-microvolt = <3300000>; 127 }; 128 129 vcc5v0_host: vcc5v0-host-regulator { 130 compatible = "regulator-fixed"; 131 enable-active-high; 132 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; 133 pinctrl-names = "default"; 134 pinctrl-0 = <&host_vbus_drv>; 135 regulator-name = "vcc5v0_host"; 136 regulator-always-on; 137 }; 138 139 vcc5v0_sys: vcc5v0-sys { 140 compatible = "regulator-fixed"; 141 regulator-name = "vcc5v0_sys"; 142 regulator-always-on; 143 regulator-boot-on; 144 regulator-min-microvolt = <5000000>; 145 regulator-max-microvolt = <5000000>; 146 }; 147 148 vcc_phy: vcc-phy-regulator { 149 compatible = "regulator-fixed"; 150 regulator-name = "vcc_phy"; 151 regulator-always-on; 152 regulator-boot-on; 153 }; 154 155 vdd_log: vdd-log { 156 compatible = "pwm-regulator"; 157 pwms = <&pwm2 0 25000 1>; 158 regulator-name = "vdd_log"; 159 regulator-always-on; 160 regulator-boot-on; 161 regulator-min-microvolt = <430000>; 162 regulator-max-microvolt = <1400000>; 163 regulator-init-microvolt = <950000>; 164 }; 165 166 vccadc_ref: vccadc-ref { 167 compatible = "regulator-fixed"; 168 regulator-name = "vcc1v8_sys"; 169 regulator-always-on; 170 regulator-boot-on; 171 regulator-min-microvolt = <1800000>; 172 regulator-max-microvolt = <1800000>; 173 }; 174}; 175 176&cpu_l0 { 177 cpu-supply = <&vdd_cpu_l>; 178}; 179 180&cpu_l1 { 181 cpu-supply = <&vdd_cpu_l>; 182}; 183 184&cpu_l2 { 185 cpu-supply = <&vdd_cpu_l>; 186}; 187 188&cpu_l3 { 189 cpu-supply = <&vdd_cpu_l>; 190}; 191 192&cpu_b0 { 193 cpu-supply = <&vdd_cpu_b>; 194}; 195 196&cpu_b1 { 197 cpu-supply = <&vdd_cpu_b>; 198}; 199 200&emmc_phy { 201 status = "okay"; 202}; 203 204&gmac { 205 assigned-clocks = <&cru SCLK_RMII_SRC>; 206 assigned-clock-parents = <&clkin_gmac>; 207 clock_in_out = "input"; 208 phy-supply = <&vcc_phy>; 209 phy-mode = "rgmii"; 210 pinctrl-names = "default"; 211 pinctrl-0 = <&rgmii_pins>; 212 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 213 snps,reset-active-low; 214 snps,reset-delays-us = <0 10000 50000>; 215 tx_delay = <0x33>; 216 rx_delay = <0x45>; 217 status = "okay"; 218}; 219 220&i2c0 { 221 clock-frequency = <400000>; 222 i2c-scl-rising-time-ns = <168>; 223 i2c-scl-falling-time-ns = <4>; 224 status = "okay"; 225 226 rk808: pmic@1b { 227 compatible = "rockchip,rk808"; 228 reg = <0x1b>; 229 interrupt-parent = <&gpio1>; 230 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 231 #clock-cells = <1>; 232 clock-output-names = "xin32k", "rk808-clkout2"; 233 pinctrl-names = "default"; 234 pinctrl-0 = <&pmic_int_l>; 235 rockchip,system-power-controller; 236 wakeup-source; 237 238 vcc1-supply = <&vcc3v3_sys>; 239 vcc2-supply = <&vcc3v3_sys>; 240 vcc3-supply = <&vcc3v3_sys>; 241 vcc4-supply = <&vcc3v3_sys>; 242 vcc6-supply = <&vcc3v3_sys>; 243 vcc7-supply = <&vcc3v3_sys>; 244 vcc8-supply = <&vcc3v3_sys>; 245 vcc9-supply = <&vcc3v3_sys>; 246 vcc10-supply = <&vcc3v3_sys>; 247 vcc11-supply = <&vcc3v3_sys>; 248 vcc12-supply = <&vcc3v3_sys>; 249 vddio-supply = <&vcc1v8_pmu>; 250 251 regulators { 252 vdd_center: DCDC_REG1 { 253 regulator-name = "vdd_center"; 254 regulator-always-on; 255 regulator-boot-on; 256 regulator-min-microvolt = <750000>; 257 regulator-max-microvolt = <1350000>; 258 regulator-ramp-delay = <6001>; 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 }; 262 }; 263 264 vdd_cpu_l: DCDC_REG2 { 265 regulator-name = "vdd_cpu_l"; 266 regulator-always-on; 267 regulator-boot-on; 268 regulator-min-microvolt = <750000>; 269 regulator-max-microvolt = <1350000>; 270 regulator-ramp-delay = <6001>; 271 regulator-state-mem { 272 regulator-off-in-suspend; 273 }; 274 }; 275 276 vcc_ddr: DCDC_REG3 { 277 regulator-name = "vcc_ddr"; 278 regulator-always-on; 279 regulator-boot-on; 280 regulator-state-mem { 281 regulator-on-in-suspend; 282 }; 283 }; 284 285 vcc_1v8: DCDC_REG4 { 286 regulator-name = "vcc_1v8"; 287 regulator-always-on; 288 regulator-boot-on; 289 regulator-min-microvolt = <1800000>; 290 regulator-max-microvolt = <1800000>; 291 regulator-state-mem { 292 regulator-on-in-suspend; 293 regulator-suspend-microvolt = <1800000>; 294 }; 295 }; 296 297 vcc1v8_dvp: LDO_REG1 { 298 regulator-name = "vcc1v8_dvp"; 299 regulator-always-on; 300 regulator-boot-on; 301 regulator-min-microvolt = <1800000>; 302 regulator-max-microvolt = <1800000>; 303 regulator-state-mem { 304 regulator-off-in-suspend; 305 }; 306 }; 307 308 vcc3v0_tp: LDO_REG2 { 309 regulator-name = "vcc3v0_tp"; 310 regulator-always-on; 311 regulator-boot-on; 312 regulator-min-microvolt = <3000000>; 313 regulator-max-microvolt = <3000000>; 314 regulator-state-mem { 315 regulator-off-in-suspend; 316 }; 317 }; 318 319 vcc1v8_pmu: LDO_REG3 { 320 regulator-name = "vcc1v8_pmu"; 321 regulator-always-on; 322 regulator-boot-on; 323 regulator-min-microvolt = <1800000>; 324 regulator-max-microvolt = <1800000>; 325 regulator-state-mem { 326 regulator-on-in-suspend; 327 regulator-suspend-microvolt = <1800000>; 328 }; 329 }; 330 331 vcc_sd: LDO_REG4 { 332 regulator-name = "vcc_sd"; 333 regulator-always-on; 334 regulator-boot-on; 335 regulator-min-microvolt = <1800000>; 336 regulator-max-microvolt = <3000000>; 337 regulator-state-mem { 338 regulator-on-in-suspend; 339 regulator-suspend-microvolt = <3000000>; 340 }; 341 }; 342 343 vcca3v0_codec: LDO_REG5 { 344 regulator-name = "vcca3v0_codec"; 345 regulator-always-on; 346 regulator-boot-on; 347 regulator-min-microvolt = <3000000>; 348 regulator-max-microvolt = <3000000>; 349 regulator-state-mem { 350 regulator-off-in-suspend; 351 }; 352 }; 353 354 vcc_1v5: LDO_REG6 { 355 regulator-name = "vcc_1v5"; 356 regulator-always-on; 357 regulator-boot-on; 358 regulator-min-microvolt = <1500000>; 359 regulator-max-microvolt = <1500000>; 360 regulator-state-mem { 361 regulator-on-in-suspend; 362 regulator-suspend-microvolt = <1500000>; 363 }; 364 }; 365 366 vcca1v8_codec: LDO_REG7 { 367 regulator-name = "vcca1v8_codec"; 368 regulator-always-on; 369 regulator-boot-on; 370 regulator-min-microvolt = <1800000>; 371 regulator-max-microvolt = <1800000>; 372 regulator-state-mem { 373 regulator-off-in-suspend; 374 }; 375 }; 376 377 vcc_3v0: LDO_REG8 { 378 regulator-name = "vcc_3v0"; 379 regulator-always-on; 380 regulator-boot-on; 381 regulator-min-microvolt = <3000000>; 382 regulator-max-microvolt = <3000000>; 383 regulator-state-mem { 384 regulator-on-in-suspend; 385 regulator-suspend-microvolt = <3000000>; 386 }; 387 }; 388 389 vcc3v3_s3: SWITCH_REG1 { 390 regulator-name = "vcc3v3_s3"; 391 regulator-always-on; 392 regulator-boot-on; 393 regulator-state-mem { 394 regulator-off-in-suspend; 395 }; 396 }; 397 398 vcc3v3_s0: SWITCH_REG2 { 399 regulator-name = "vcc3v3_s0"; 400 regulator-always-on; 401 regulator-boot-on; 402 regulator-state-mem { 403 regulator-off-in-suspend; 404 }; 405 }; 406 }; 407 }; 408 409 vdd_cpu_b: regulator@40 { 410 compatible = "silergy,syr827"; 411 reg = <0x40>; 412 fcs,suspend-voltage-selector = <0>; 413 regulator-name = "vdd_cpu_b"; 414 regulator-min-microvolt = <712500>; 415 regulator-max-microvolt = <1500000>; 416 regulator-ramp-delay = <1000>; 417 regulator-always-on; 418 regulator-boot-on; 419 vin-supply = <&vcc5v0_sys>; 420 421 regulator-state-mem { 422 regulator-off-in-suspend; 423 }; 424 }; 425 426 vdd_gpu: regulator@41 { 427 compatible = "silergy,syr828"; 428 reg = <0x41>; 429 fcs,suspend-voltage-selector = <1>; 430 regulator-name = "vdd_gpu"; 431 regulator-min-microvolt = <712500>; 432 regulator-max-microvolt = <1500000>; 433 regulator-ramp-delay = <1000>; 434 regulator-always-on; 435 regulator-boot-on; 436 vin-supply = <&vcc5v0_sys>; 437 438 regulator-state-mem { 439 regulator-off-in-suspend; 440 }; 441 }; 442}; 443 444&i2c1 { 445 i2c-scl-rising-time-ns = <300>; 446 i2c-scl-falling-time-ns = <15>; 447 status = "okay"; 448 449 rt5640: rt5640@1c { 450 compatible = "realtek,rt5640"; 451 reg = <0x1c>; 452 clocks = <&cru SCLK_I2S_8CH_OUT>; 453 clock-names = "mclk"; 454 realtek,in1-differential; 455 #sound-dai-cells = <0>; 456 pinctrl-names = "default"; 457 pinctrl-0 = <&rt5640_hpcon>; 458 }; 459}; 460 461&i2c3 { 462 i2c-scl-rising-time-ns = <450>; 463 i2c-scl-falling-time-ns = <15>; 464 status = "okay"; 465}; 466 467&i2c4 { 468 i2c-scl-rising-time-ns = <600>; 469 i2c-scl-falling-time-ns = <20>; 470 status = "okay"; 471 472 accelerometer@68 { 473 compatible = "invensense,mpu6500"; 474 reg = <0x68>; 475 interrupt-parent = <&gpio1>; 476 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>; 477 }; 478}; 479 480&i2s0 { 481 rockchip,playback-channels = <8>; 482 rockchip,capture-channels = <8>; 483 #sound-dai-cells = <0>; 484 status = "okay"; 485}; 486 487&i2s1 { 488 rockchip,playback-channels = <2>; 489 rockchip,capture-channels = <2>; 490 #sound-dai-cells = <0>; 491 status = "okay"; 492}; 493 494&i2s2 { 495 #sound-dai-cells = <0>; 496 status = "okay"; 497}; 498 499&io_domains { 500 status = "okay"; 501 502 bt656-supply = <&vcc1v8_dvp>; 503 audio-supply = <&vcca1v8_codec>; 504 sdmmc-supply = <&vcc_sd>; 505 gpio1830-supply = <&vcc_3v0>; 506}; 507 508&pcie_phy { 509 status = "okay"; 510}; 511 512&pcie0 { 513 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 514 num-lanes = <4>; 515 pinctrl-names = "default"; 516 pinctrl-0 = <&pcie_clkreqn>; 517 status = "okay"; 518}; 519 520&pmu_io_domains { 521 pmu1830-supply = <&vcc_3v0>; 522 status = "okay"; 523}; 524 525&pinctrl { 526 buttons { 527 pwrbtn: pwrbtn { 528 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 529 }; 530 }; 531 532 lcd-panel { 533 lcd_panel_reset: lcd-panel-reset { 534 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; 535 }; 536 }; 537 538 pcie { 539 pcie_drv: pcie-drv { 540 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 541 }; 542 543 pcie_3g_drv: pcie-3g-drv { 544 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 545 }; 546 }; 547 548 pmic { 549 vsel1_gpio: vsel1-gpio { 550 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; 551 }; 552 553 vsel2_gpio: vsel2-gpio { 554 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 555 }; 556 }; 557 558 sdio-pwrseq { 559 wifi_enable_h: wifi-enable-h { 560 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 561 }; 562 }; 563 564 rt5640 { 565 rt5640_hpcon: rt5640-hpcon { 566 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 567 }; 568 }; 569 570 pmic { 571 pmic_int_l: pmic-int-l { 572 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 573 }; 574 }; 575 576 usb2 { 577 host_vbus_drv: host-vbus-drv { 578 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 579 }; 580 }; 581}; 582 583&pwm0 { 584 status = "okay"; 585}; 586 587&pwm2 { 588 status = "okay"; 589}; 590 591&saradc { 592 vref-supply = <&vccadc_ref>; 593 status = "okay"; 594}; 595 596&sdmmc { 597 bus-width = <4>; 598 status = "okay"; 599}; 600 601&sdhci { 602 bus-width = <8>; 603 keep-power-in-suspend; 604 mmc-hs400-1_8v; 605 mmc-hs400-enhanced-strobe; 606 non-removable; 607 status = "okay"; 608}; 609 610&tsadc { 611 /* tshut mode 0:CRU 1:GPIO */ 612 rockchip,hw-tshut-mode = <1>; 613 /* tshut polarity 0:LOW 1:HIGH */ 614 rockchip,hw-tshut-polarity = <1>; 615 status = "okay"; 616}; 617 618&u2phy0 { 619 status = "okay"; 620 621 u2phy0_otg: otg-port { 622 status = "okay"; 623 }; 624 625 u2phy0_host: host-port { 626 phy-supply = <&vcc5v0_host>; 627 status = "okay"; 628 }; 629}; 630 631&u2phy1 { 632 status = "okay"; 633 634 u2phy1_otg: otg-port { 635 status = "okay"; 636 }; 637 638 u2phy1_host: host-port { 639 phy-supply = <&vcc5v0_host>; 640 status = "okay"; 641 }; 642}; 643 644&uart0 { 645 pinctrl-names = "default"; 646 pinctrl-0 = <&uart0_xfer &uart0_cts>; 647 status = "okay"; 648}; 649 650&usb_host0_ehci { 651 status = "okay"; 652}; 653 654&usb_host0_ohci { 655 status = "okay"; 656}; 657 658&usb_host1_ehci { 659 status = "okay"; 660}; 661 662&usb_host1_ohci { 663 status = "okay"; 664}; 665