1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/input/input.h> 10#include "rk3399.dtsi" 11#include "rk3399-linux.dtsi" 12#include "rk3399-opp.dtsi" 13 14/ { 15 16 model = "ROCK960 - 96boards based on Rockchip RK3399"; 17 compatible = "rockchip,rock960","rockchip,rk3399"; 18 19 fiq_debugger: fiq-debugger { 20 compatible = "rockchip,fiq-debugger"; 21 rockchip,serial-id = <2>; 22 rockchip,signal-irq = <182>; 23 rockchip,wake-irq = <0>; 24 rockchip,irq-mode-enable = <1>; 25 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 26 pinctrl-names = "default"; 27 pinctrl-0 = <&uart2c_xfer>; 28 }; 29 30 vcc1v8_s0: vcc1v8-s0 { 31 compatible = "regulator-fixed"; 32 regulator-name = "vcc1v8_s0"; 33 regulator-min-microvolt = <1800000>; 34 regulator-max-microvolt = <1800000>; 35 regulator-always-on; 36 }; 37 38 vcc_sys: vcc-sys { 39 compatible = "regulator-fixed"; 40 regulator-name = "vcc_sys"; 41 regulator-min-microvolt = <5000000>; 42 regulator-max-microvolt = <5000000>; 43 regulator-always-on; 44 }; 45 46 vcc_phy: vcc-phy-regulator { 47 compatible = "regulator-fixed"; 48 regulator-name = "vcc_phy"; 49 regulator-always-on; 50 regulator-boot-on; 51 }; 52 53 vcc3v3_sys: vcc3v3-sys { 54 compatible = "regulator-fixed"; 55 regulator-name = "vcc3v3_sys"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 regulator-always-on; 59 vin-supply = <&vcc_sys>; 60 }; 61 62 vcc3v3_pcie: vcc3v3-pcie-regulator { 63 compatible = "regulator-fixed"; 64 gpio = <&gpio3 11 GPIO_ACTIVE_LOW>; 65 pinctrl-names = "default"; 66 pinctrl-0 = <&pcie_drv>; 67 regulator-boot-on; 68 regulator-always-on; 69 regulator-name = "vcc3v3_pcie"; 70 vin-supply = <&vcc3v3_sys>; 71 }; 72 73 vcc5v0_host: vcc5v0-host-regulator { 74 compatible = "regulator-fixed"; 75 enable-active-high; 76 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 77 pinctrl-names = "default"; 78 pinctrl-0 = <&host_vbus_drv>; 79 regulator-name = "vcc5v0_host"; 80 regulator-always-on; 81 }; 82 83 vdd_log: vdd-log { 84 compatible = "pwm-regulator"; 85 pwms = <&pwm2 0 25000 1>; 86 regulator-name = "vdd_log"; 87 regulator-min-microvolt = <800000>; 88 regulator-max-microvolt = <1400000>; 89 regulator-always-on; 90 regulator-boot-on; 91 92 /* for rockchip boot on */ 93 rockchip,pwm_id= <2>; 94 rockchip,pwm_voltage = <900000>; 95 96 vin-supply = <&vcc_sys>; 97 }; 98 99 clkin_gmac: external-gmac-clock { 100 compatible = "fixed-clock"; 101 clock-frequency = <125000000>; 102 clock-output-names = "clkin_gmac"; 103 #clock-cells = <0>; 104 }; 105 106 hdmi_codec: hdmi-codec { 107 compatible = "simple-audio-card"; 108 simple-audio-card,format = "i2s"; 109 simple-audio-card,mclk-fs = <256>; 110 simple-audio-card,name = "HDMI-CODEC"; 111 112 simple-audio-card,cpu { 113 sound-dai = <&i2s2>; 114 }; 115 116 simple-audio-card,codec { 117 sound-dai = <&hdmi>; 118 }; 119 }; 120 121 spdif-sound { 122 status = "okay"; 123 compatible = "simple-audio-card"; 124 simple-audio-card,name = "ROCKCHIP,SPDIF"; 125 simple-audio-card,mclk-fs = <128>; 126 simple-audio-card,cpu { 127 sound-dai = <&spdif>; 128 }; 129 simple-audio-card,codec { 130 sound-dai = <&spdif_out>; 131 }; 132 }; 133 134 spdif_out: spdif-out { 135 status = "okay"; 136 compatible = "linux,spdif-dit"; 137 #sound-dai-cells = <0>; 138 }; 139 140 sdio_pwrseq: sdio-pwrseq { 141 compatible = "mmc-pwrseq-simple"; 142 clocks = <&rk808 1>; 143 clock-names = "ext_clock"; 144 pinctrl-names = "default"; 145 pinctrl-0 = <&wifi_enable_h>; 146 147 /* 148 * On the module itself this is one of these (depending 149 * on the actual card populated): 150 * - SDIO_RESET_L_WL_REG_ON 151 * - PDN (power down when low) 152 */ 153 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; 154 }; 155 156 wireless-wlan { 157 compatible = "wlan-platdata"; 158 rockchip,grf = <&grf>; 159 wifi_chip_type = "ap6354"; 160 sdio_vref = <1800>; 161 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; 162 status = "okay"; 163 }; 164 165 wireless-bluetooth { 166 compatible = "bluetooth-platdata"; 167 clocks = <&rk808 1>; 168 clock-names = "ext_clock"; 169 /* wifi-bt-power-toggle; */ 170 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; 171 pinctrl-names = "default", "rts_gpio"; 172 pinctrl-0 = <&uart0_rts>; 173 pinctrl-1 = <&uart0_gpios>; 174 /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */ 175 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; 176 BT,wake_gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; 177 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; 178 status = "okay"; 179 }; 180 181 test-power { 182 status = "okay"; 183 }; 184}; 185 186&hdmi { 187 #address-cells = <1>; 188 #size-cells = <0>; 189 #sound-dai-cells = <0>; 190 status = "okay"; 191}; 192 193&sdmmc { 194 clock-frequency = <100000000>; 195 clock-freq-min-max = <100000 100000000>; 196 no-sdio; 197 no-mmc; 198 bus-width = <4>; 199 cap-mmc-highspeed; 200 cap-sd-highspeed; 201 disable-wp; 202 num-slots = <1>; 203 //sd-uhs-sdr104; 204 vqmmc-supply = <&vcc_sd>; 205 pinctrl-names = "default"; 206 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 207 card-detect-delay = <800>; 208 status = "okay"; 209}; 210 211&sdio0 { 212 clock-frequency = <100000000>; 213 clock-freq-min-max = <200000 100000000>; 214 no-sd; 215 no-mmc; 216 bus-width = <4>; 217 disable-wp; 218 cap-sd-highspeed; 219 cap-sdio-irq; 220 keep-power-in-suspend; 221 mmc-pwrseq = <&sdio_pwrseq>; 222 non-removable; 223 num-slots = <1>; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 226 sd-uhs-sdr104; 227 status = "okay"; 228}; 229 230&emmc_phy { 231 status = "okay"; 232}; 233 234&sdhci { 235 bus-width = <8>; 236 mmc-hs400-1_8v; 237 no-sdio; 238 no-sd; 239 non-removable; 240 mmc-hs400-enhanced-strobe; 241 status = "okay"; 242}; 243 244&i2s0 { 245 status = "okay"; 246 rockchip,i2s-broken-burst-len; 247 rockchip,playback-channels = <8>; 248 rockchip,capture-channels = <8>; 249 #sound-dai-cells = <0>; 250}; 251 252&i2s2 { 253 status = "okay"; 254 #sound-dai-cells = <0>; 255}; 256 257&spdif { 258 pinctrl-0 = <&spdif_bus_1>; 259 status = "okay"; 260 #sound-dai-cells = <0>; 261}; 262 263&i2c0 { 264 status = "okay"; 265 i2c-scl-rising-time-ns = <168>; 266 i2c-scl-falling-time-ns = <4>; 267 clock-frequency = <400000>; 268 269 vdd_cpu_b: syr827@40 { 270 compatible = "silergy,syr827"; 271 reg = <0x40>; 272 regulator-compatible = "fan53555-reg"; 273 pinctrl-0 = <&vsel1_gpio>; 274 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 275 regulator-name = "vdd_cpu_b"; 276 regulator-min-microvolt = <712500>; 277 regulator-max-microvolt = <1500000>; 278 regulator-ramp-delay = <1000>; 279 fcs,suspend-voltage-selector = <1>; 280 regulator-always-on; 281 regulator-boot-on; 282 vin-supply = <&vcc_sys>; 283 regulator-state-mem { 284 regulator-off-in-suspend; 285 }; 286 }; 287 288 vdd_gpu: syr828@41 { 289 compatible = "silergy,syr828"; 290 reg = <0x41>; 291 regulator-compatible = "fan53555-reg"; 292 pinctrl-0 = <&vsel2_gpio>; 293 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 294 regulator-name = "vdd_gpu"; 295 regulator-min-microvolt = <712500>; 296 regulator-max-microvolt = <1500000>; 297 regulator-ramp-delay = <1000>; 298 fcs,suspend-voltage-selector = <1>; 299 regulator-always-on; 300 regulator-boot-on; 301 vin-supply = <&vcc_sys>; 302 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ 303 regulator-state-mem { 304 regulator-off-in-suspend; 305 }; 306 }; 307 308 rk808: pmic@1b { 309 compatible = "rockchip,rk808"; 310 reg = <0x1b>; 311 interrupt-parent = <&gpio1>; 312 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 313 pinctrl-names = "default"; 314 pinctrl-0 = <&pmic_int_l>; 315 rockchip,system-power-controller; 316 wakeup-source; 317 #clock-cells = <1>; 318 clock-output-names = "xin32k", "rk808-clkout2"; 319 320 vcc1-supply = <&vcc_sys>; 321 vcc2-supply = <&vcc_sys>; 322 vcc3-supply = <&vcc_sys>; 323 vcc4-supply = <&vcc_sys>; 324 vcc6-supply = <&vcc_sys>; 325 vcc7-supply = <&vcc_sys>; 326 vcc8-supply = <&vcc3v3_sys>; 327 vcc9-supply = <&vcc_sys>; 328 vcc10-supply = <&vcc_sys>; 329 vcc11-supply = <&vcc_sys>; 330 vcc12-supply = <&vcc3v3_sys>; 331 vddio-supply = <&vcc_1v8>; 332 333 regulators { 334 vdd_center: DCDC_REG1 { 335 regulator-name = "vdd_center"; 336 regulator-min-microvolt = <750000>; 337 regulator-max-microvolt = <1350000>; 338 regulator-ramp-delay = <6001>; 339 regulator-always-on; 340 regulator-boot-on; 341 regulator-state-mem { 342 regulator-off-in-suspend; 343 }; 344 }; 345 346 vdd_cpu_l: DCDC_REG2 { 347 regulator-name = "vdd_cpu_l"; 348 regulator-min-microvolt = <750000>; 349 regulator-max-microvolt = <1350000>; 350 regulator-ramp-delay = <6001>; 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-state-mem { 354 regulator-off-in-suspend; 355 }; 356 }; 357 358 vcc_ddr: DCDC_REG3 { 359 regulator-name = "vcc_ddr"; 360 regulator-always-on; 361 regulator-boot-on; 362 regulator-state-mem { 363 regulator-on-in-suspend; 364 }; 365 }; 366 367 vcc_1v8: DCDC_REG4 { 368 regulator-name = "vcc_1v8"; 369 regulator-min-microvolt = <1800000>; 370 regulator-max-microvolt = <1800000>; 371 regulator-always-on; 372 regulator-boot-on; 373 regulator-state-mem { 374 regulator-on-in-suspend; 375 regulator-suspend-microvolt = <1800000>; 376 }; 377 }; 378 379 vcc1v8_dvp: LDO_REG1 { 380 regulator-name = "vcc1v8_dvp"; 381 regulator-min-microvolt = <1800000>; 382 regulator-max-microvolt = <1800000>; 383 regulator-always-on; 384 regulator-boot-on; 385 regulator-state-mem { 386 regulator-on-in-suspend; 387 regulator-suspend-microvolt = <1800000>; 388 }; 389 }; 390 391 vcca1v8_hdmi: LDO_REG2 { 392 regulator-name = "vcca1v8_hdmi"; 393 regulator-min-microvolt = <1800000>; 394 regulator-max-microvolt = <1800000>; 395 regulator-always-on; 396 regulator-boot-on; 397 regulator-state-mem { 398 regulator-on-in-suspend; 399 regulator-suspend-microvolt = <1800000>; 400 }; 401 }; 402 403 vcca_1v8: LDO_REG3 { 404 regulator-name = "vcca_1v8"; 405 regulator-min-microvolt = <1800000>; 406 regulator-max-microvolt = <1800000>; 407 regulator-always-on; 408 regulator-boot-on; 409 regulator-state-mem { 410 regulator-on-in-suspend; 411 regulator-suspend-microvolt = <1800000>; 412 }; 413 }; 414 415 vcc_sd: LDO_REG4 { 416 regulator-name = "vcc_sd"; 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <3000000>; 419 regulator-always-on; 420 regulator-boot-on; 421 regulator-state-mem { 422 regulator-on-in-suspend; 423 regulator-suspend-microvolt = <3000000>; 424 }; 425 }; 426 427 vcc3v0_sd: LDO_REG5 { 428 regulator-name = "vcc3v0_sd"; 429 regulator-min-microvolt = <3000000>; 430 regulator-max-microvolt = <3000000>; 431 regulator-always-on; 432 regulator-boot-on; 433 regulator-state-mem { 434 regulator-on-in-suspend; 435 regulator-suspend-microvolt = <3000000>; 436 }; 437 }; 438 439 vcc_1v5: LDO_REG6 { 440 regulator-name = "vcc_1v5"; 441 regulator-min-microvolt = <1500000>; 442 regulator-max-microvolt = <1500000>; 443 regulator-always-on; 444 regulator-boot-on; 445 regulator-state-mem { 446 regulator-on-in-suspend; 447 regulator-suspend-microvolt = <1500000>; 448 }; 449 }; 450 451 vcca0v9_hdmi: LDO_REG7 { 452 regulator-name = "vcca0v9_hdmi"; 453 regulator-min-microvolt = <900000>; 454 regulator-max-microvolt = <900000>; 455 regulator-always-on; 456 regulator-boot-on; 457 regulator-state-mem { 458 regulator-on-in-suspend; 459 regulator-suspend-microvolt = <900000>; 460 }; 461 }; 462 463 vcc_3v0: LDO_REG8 { 464 regulator-name = "vcc_3v0"; 465 regulator-min-microvolt = <3000000>; 466 regulator-max-microvolt = <3000000>; 467 regulator-always-on; 468 regulator-boot-on; 469 regulator-state-mem { 470 regulator-on-in-suspend; 471 regulator-suspend-microvolt = <3000000>; 472 }; 473 }; 474 475 vcc3v3_s3: SWITCH_REG1 { 476 regulator-name = "vcc3v3_s3"; 477 regulator-always-on; 478 regulator-boot-on; 479 regulator-state-mem { 480 regulator-on-in-suspend; 481 }; 482 }; 483 484 vcc3v3_s0: SWITCH_REG2 { 485 regulator-name = "vcc3v3_s0"; 486 regulator-always-on; 487 regulator-boot-on; 488 regulator-state-mem { 489 regulator-on-in-suspend; 490 }; 491 }; 492 }; 493 }; 494}; 495 496&i2c1 { 497 status = "okay"; 498}; 499 500&i2c6 { 501 status = "okay"; 502}; 503 504&i2c4 { 505 status = "okay"; 506 fusb0: fusb30x@22 { 507 compatible = "fairchild,fusb302"; 508 reg = <0x22>; 509 pinctrl-names = "default"; 510 pinctrl-0 = <&fusb0_int>; 511 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 512 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 513 status = "okay"; 514 }; 515}; 516 517&i2c2 { 518 status = "okay"; 519 camera0: camera-module@10 { 520 status = "disabled"; 521 compatible = "omnivision,ov13850-v4l2-i2c-subdev"; 522 reg = < 0x10 >; 523 device_type = "v4l2-i2c-subdev"; 524 clocks = <&cru SCLK_CIF_OUT>; 525 clock-names = "clk_cif_out"; 526 pinctrl-names = "rockchip,camera_default", 527 "rockchip,camera_sleep"; 528 pinctrl-0 = <&cam0_default_pins>; 529 pinctrl-1 = <&cam0_sleep_pins>; 530 //rockchip,pd-gpio = <&gpio4 4 GPIO_ACTIVE_LOW>; 531 rockchip,pwr-gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>; 532 rockchip,rst-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>; 533 rockchip,camera-module-mclk-name = "clk_cif_out"; 534 rockchip,camera-module-facing = "back"; 535 rockchip,camera-module-name = "cmk-cb0695-fv1"; 536 rockchip,camera-module-len-name = "lg9569a2"; 537 rockchip,camera-module-fov-h = "66.0"; 538 rockchip,camera-module-fov-v = "50.1"; 539 rockchip,camera-module-orientation = <0>; 540 rockchip,camera-module-iq-flip = <0>; 541 rockchip,camera-module-iq-mirror = <0>; 542 rockchip,camera-module-flip = <1>; 543 rockchip,camera-module-mirror = <0>; 544 545 rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>; 546 rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>; 547 rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>; 548 rockchip,camera-module-flash-support = <1>; 549 rockchip,camera-module-mipi-dphy-index = <0>; 550 }; 551 552 camera1: camera-module@36 { 553 status = "disabled"; 554 compatible = "omnivision,ov4690-v4l2-i2c-subdev"; 555 reg = <0x36>; 556 device_type = "v4l2-i2c-subdev"; 557 clocks = <&cru SCLK_CIF_OUT>; 558 clock-names = "clk_cif_out"; 559 pinctrl-names = "rockchip,camera_default", 560 "rockchip,camera_sleep"; 561 pinctrl-0 = <&cam0_default_pins>; 562 pinctrl-1 = <&cam0_sleep_pins>; 563 rockchip,pd-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>; 564 //rockchip,pwr-gpio = <&gpio3 13 0>; 565 rockchip,rst-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; 566 rockchip,camera-module-mclk-name = "clk_cif_out"; 567 rockchip,camera-module-facing = "back"; 568 rockchip,camera-module-name = "LA6111PA"; 569 rockchip,camera-module-len-name = "YM6011P"; 570 rockchip,camera-module-fov-h = "116"; 571 rockchip,camera-module-fov-v = "61"; 572 rockchip,camera-module-orientation = <0>; 573 rockchip,camera-module-iq-flip = <0>; 574 rockchip,camera-module-iq-mirror = <0>; 575 rockchip,camera-module-flip = <0>; 576 rockchip,camera-module-mirror = <1>; 577 578 rockchip,camera-module-defrect0 = <2688 1520 0 0 2688 1520>; 579 rockchip,camera-module-flash-support = <0>; 580 rockchip,camera-module-mipi-dphy-index = <0>; 581 }; 582 583}; 584 585&cpu_l0 { 586 cpu-supply = <&vdd_cpu_l>; 587}; 588 589&cpu_l1 { 590 cpu-supply = <&vdd_cpu_l>; 591}; 592 593&cpu_l2 { 594 cpu-supply = <&vdd_cpu_l>; 595}; 596 597&cpu_l3 { 598 cpu-supply = <&vdd_cpu_l>; 599}; 600 601&cpu_b0 { 602 cpu-supply = <&vdd_cpu_b>; 603}; 604 605&cpu_b1 { 606 cpu-supply = <&vdd_cpu_b>; 607}; 608 609&gpu { 610 status = "okay"; 611 mali-supply = <&vdd_gpu>; 612}; 613 614&threshold { 615 temperature = <85000>; 616}; 617 618&target { 619 temperature = <100000>; 620}; 621 622&soc_crit { 623 temperature = <105000>; 624}; 625 626&tcphy0 { 627 extcon = <&fusb0>; 628 status = "okay"; 629}; 630 631&tcphy1 { 632 status = "okay"; 633}; 634 635&tsadc { 636 /* tshut mode 0:CRU 1:GPIO */ 637 rockchip,hw-tshut-mode = <1>; 638 /* tshut polarity 0:LOW 1:HIGH */ 639 rockchip,hw-tshut-polarity = <1>; 640 rockchip,hw-tshut-temp = <110000>; 641 status = "okay"; 642}; 643 644&u2phy0 { 645 status = "okay"; 646 extcon = <&fusb0>; 647 648 u2phy0_otg: otg-port { 649 status = "okay"; 650 }; 651 652 u2phy0_host: host-port { 653 phy-supply = <&vcc5v0_host>; 654 status = "okay"; 655 }; 656}; 657 658&u2phy1 { 659 status = "okay"; 660 661 u2phy1_otg: otg-port { 662 status = "okay"; 663 }; 664 665 u2phy1_host: host-port { 666 phy-supply = <&vcc5v0_host>; 667 status = "okay"; 668 }; 669}; 670 671&uart0 { 672 pinctrl-names = "default"; 673 pinctrl-0 = <&uart0_xfer &uart0_cts>; 674 dmas = <&dmac_peri 0>, <&dmac_peri 1>; 675 dma-names = "tx", "rx"; 676 status = "okay"; 677}; 678 679&uart3 { 680 compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; 681 reg = <0x0 0xff1b0000 0x0 0x100>; 682 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; 683 clock-names = "baudclk", "apb_pclk"; 684 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>; 685 dmas = <&dmac_peri 6>, <&dmac_peri 7>; 686 dma-names = "tx", "rx"; 687 reg-shift = <2>; 688 reg-io-width = <4>; 689 pinctrl-names = "default"; 690 pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>; 691 status = "okay"; 692}; 693 694&uart4 { 695 status = "okay"; 696 dmas = <&dmac_peri 8>, <&dmac_peri 9>; 697 dma-names = "tx", "rx"; 698}; 699 700&usb_host0_ehci { 701 status = "okay"; 702}; 703 704&usb_host0_ohci { 705 status = "okay"; 706}; 707 708&usb_host1_ehci { 709 status = "okay"; 710}; 711 712&usb_host1_ohci { 713 status = "okay"; 714}; 715 716&usbdrd3_0 { 717 status = "okay"; 718}; 719 720&usbdrd_dwc3_0 { 721 dr_mode = "otg"; 722 status = "okay"; 723 extcon = <&fusb0>; 724}; 725 726&usbdrd3_1 { 727 status = "okay"; 728}; 729 730&usbdrd_dwc3_1 { 731 dr_mode = "host"; 732 status = "okay"; 733}; 734 735&pwm2 { 736 status = "okay"; 737 pinctrl-names = "active"; 738 pinctrl-0 = <&pwm2_pin_pull_down>; 739}; 740 741&pwm3 { 742 status = "okay"; 743 744 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>; 745 compatible = "rockchip,remotectl-pwm"; 746 remote_pwm_id = <3>; 747 handle_cpu_id = <1>; 748 remote_support_psci = <1>; 749 750 ir_key1 { 751 rockchip,usercode = <0x4040>; 752 rockchip,key_table = 753 <0xf2 KEY_REPLY>, 754 <0xba KEY_BACK>, 755 <0xf4 KEY_UP>, 756 <0xf1 KEY_DOWN>, 757 <0xef KEY_LEFT>, 758 <0xee KEY_RIGHT>, 759 <0xbd KEY_HOME>, 760 <0xea KEY_VOLUMEUP>, 761 <0xe3 KEY_VOLUMEDOWN>, 762 <0xe2 KEY_SEARCH>, 763 <0xb2 KEY_POWER>, 764 <0xbc KEY_MUTE>, 765 <0xec KEY_MENU>, 766 <0xbf 0x190>, 767 <0xe0 0x191>, 768 <0xe1 0x192>, 769 <0xe9 183>, 770 <0xe6 248>, 771 <0xe8 185>, 772 <0xe7 186>, 773 <0xf0 388>, 774 <0xbe 0x175>; 775 }; 776 777 ir_key2 { 778 rockchip,usercode = <0xff00>; 779 rockchip,key_table = 780 <0xf9 KEY_HOME>, 781 <0xbf KEY_BACK>, 782 <0xfb KEY_MENU>, 783 <0xaa KEY_REPLY>, 784 <0xb9 KEY_UP>, 785 <0xe9 KEY_DOWN>, 786 <0xb8 KEY_LEFT>, 787 <0xea KEY_RIGHT>, 788 <0xeb KEY_VOLUMEDOWN>, 789 <0xef KEY_VOLUMEUP>, 790 <0xf7 KEY_MUTE>, 791 <0xe7 KEY_POWER>, 792 <0xfc KEY_POWER>, 793 <0xa9 KEY_VOLUMEDOWN>, 794 <0xa8 KEY_VOLUMEDOWN>, 795 <0xe0 KEY_VOLUMEDOWN>, 796 <0xa5 KEY_VOLUMEDOWN>, 797 <0xab 183>, 798 <0xb7 388>, 799 <0xe8 388>, 800 <0xf8 184>, 801 <0xaf 185>, 802 <0xed KEY_VOLUMEDOWN>, 803 <0xee 186>, 804 <0xb3 KEY_VOLUMEDOWN>, 805 <0xf1 KEY_VOLUMEDOWN>, 806 <0xf2 KEY_VOLUMEDOWN>, 807 <0xf3 KEY_SEARCH>, 808 <0xb4 KEY_VOLUMEDOWN>, 809 <0xbe KEY_SEARCH>; 810 }; 811 812 ir_key3 { 813 rockchip,usercode = <0x1dcc>; 814 rockchip,key_table = 815 <0xee KEY_REPLY>, 816 <0xf0 KEY_BACK>, 817 <0xf8 KEY_UP>, 818 <0xbb KEY_DOWN>, 819 <0xef KEY_LEFT>, 820 <0xed KEY_RIGHT>, 821 <0xfc KEY_HOME>, 822 <0xf1 KEY_VOLUMEUP>, 823 <0xfd KEY_VOLUMEDOWN>, 824 <0xb7 KEY_SEARCH>, 825 <0xff KEY_POWER>, 826 <0xf3 KEY_MUTE>, 827 <0xbf KEY_MENU>, 828 <0xf9 0x191>, 829 <0xf5 0x192>, 830 <0xb3 388>, 831 <0xbe KEY_1>, 832 <0xba KEY_2>, 833 <0xb2 KEY_3>, 834 <0xbd KEY_4>, 835 <0xf9 KEY_5>, 836 <0xb1 KEY_6>, 837 <0xfc KEY_7>, 838 <0xf8 KEY_8>, 839 <0xb0 KEY_9>, 840 <0xb6 KEY_0>, 841 <0xb5 KEY_BACKSPACE>; 842 }; 843}; 844 845&gmac { 846 phy-supply = <&vcc_phy>; 847 phy-mode = "rgmii"; 848 clock_in_out = "input"; 849 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; 850 snps,reset-active-low; 851 snps,reset-delays-us = <0 10000 50000>; 852 assigned-clocks = <&cru SCLK_RMII_SRC>; 853 assigned-clock-parents = <&clkin_gmac>; 854 pinctrl-names = "default", "sleep"; 855 pinctrl-0 = <&rgmii_pins>; 856 pinctrl-1 = <&rgmii_sleep_pins>; 857 tx_delay = <0x28>; 858 rx_delay = <0x11>; 859 status = "disabled"; 860}; 861 862&saradc { 863 status = "okay"; 864}; 865 866&io_domains { 867 status = "okay"; 868 869 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ 870 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ 871 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 872 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 873}; 874 875&pcie_phy { 876 status = "okay"; 877}; 878 879&pcie0 { 880 ep-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; 881 num-lanes = <4>; 882 pinctrl-names = "default"; 883 pinctrl-0 = <&pcie_clkreqn_cpm>; 884 status = "okay"; 885}; 886 887&pinctrl { 888 889 sdio0 { 890 sdio0_bus1: sdio0-bus1 { 891 rockchip,pins = 892 <2 RK_PC4 1 &pcfg_pull_up_20ma>; 893 }; 894 895 sdio0_bus4: sdio0-bus4 { 896 rockchip,pins = 897 <2 RK_PC4 1 &pcfg_pull_up_20ma>, 898 <2 RK_PC5 1 &pcfg_pull_up_20ma>, 899 <2 RK_PC6 1 &pcfg_pull_up_20ma>, 900 <2 RK_PC7 1 &pcfg_pull_up_20ma>; 901 }; 902 903 sdio0_cmd: sdio0-cmd { 904 rockchip,pins = 905 <2 RK_PD0 1 &pcfg_pull_up_20ma>; 906 }; 907 908 sdio0_clk: sdio0-clk { 909 rockchip,pins = 910 <2 RK_PD1 1 &pcfg_pull_none_20ma>; 911 }; 912 }; 913 914 sdmmc { 915 sdmmc_bus1: sdmmc-bus1 { 916 rockchip,pins = 917 <4 RK_PB0 1 &pcfg_pull_up_8ma>; 918 }; 919 920 sdmmc_bus4: sdmmc-bus4 { 921 rockchip,pins = 922 <4 RK_PB0 1 &pcfg_pull_up_8ma>, 923 <4 RK_PB1 1 &pcfg_pull_up_8ma>, 924 <4 RK_PB2 1 &pcfg_pull_up_8ma>, 925 <4 RK_PB3 1 &pcfg_pull_up_8ma>; 926 }; 927 928 sdmmc_clk: sdmmc-clk { 929 rockchip,pins = 930 <4 RK_PB4 1 &pcfg_pull_none_18ma>; 931 }; 932 933 sdmmc_cmd: sdmmc-cmd { 934 rockchip,pins = 935 <4 RK_PB5 1 &pcfg_pull_up_8ma>; 936 }; 937 }; 938 939 sdio-pwrseq { 940 wifi_enable_h: wifi-enable-h { 941 rockchip,pins = 942 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 943 }; 944 }; 945 946 wireless-bluetooth { 947 uart0_gpios: uart0-gpios { 948 rockchip,pins = 949 <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 950 }; 951 }; 952 953 usb2 { 954 host_vbus_drv: host-vbus-drv { 955 rockchip,pins = 956 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 957 }; 958 }; 959 960 pcie { 961 pcie_drv: pcie-drv { 962 rockchip,pins = 963 <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 964 }; 965 }; 966 967 pmic { 968 pmic_int_l: pmic-int-l { 969 rockchip,pins = 970 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 971 }; 972 973 vsel1_gpio: vsel1-gpio { 974 rockchip,pins = 975 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 976 }; 977 978 vsel2_gpio: vsel2-gpio { 979 rockchip,pins = 980 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 981 }; 982 }; 983 984 gmac { 985 rgmii_sleep_pins: rgmii-sleep-pins { 986 rockchip,pins = 987 <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; 988 }; 989 }; 990 991 fusb30x { 992 fusb0_int: fusb0-int { 993 rockchip,pins = 994 <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 995 }; 996 }; 997}; 998 999&pvtm { 1000 status = "okay"; 1001}; 1002 1003&pmu_pvtm { 1004 status = "okay"; 1005}; 1006 1007&pmu_io_domains { 1008 status = "okay"; 1009 pmu1830-supply = <&vcc_1v8>; 1010}; 1011 1012&rockchip_suspend { 1013 status = "okay"; 1014 rockchip,sleep-debug-en = <0>; 1015 rockchip,sleep-mode-config = < 1016 (0 1017 | RKPM_SLP_ARMPD 1018 | RKPM_SLP_PERILPPD 1019 | RKPM_SLP_DDR_RET 1020 | RKPM_SLP_PLLPD 1021 | RKPM_SLP_CENTER_PD 1022 | RKPM_SLP_AP_PWROFF 1023 ) 1024 >; 1025 rockchip,wakeup-config = < 1026 (0 1027 | RKPM_GPIO_WKUP_EN 1028 | RKPM_PWM_WKUP_EN 1029 ) 1030 >; 1031 rockchip,pwm-regulator-config = < 1032 (0 1033 | PWM2_REGULATOR_EN 1034 ) 1035 >; 1036 rockchip,power-ctrl = 1037 <&gpio1 17 GPIO_ACTIVE_HIGH>, 1038 <&gpio1 14 GPIO_ACTIVE_HIGH>; 1039}; 1040 1041&vopb { 1042 status = "okay"; 1043}; 1044 1045&vopb_mmu { 1046 status = "okay"; 1047}; 1048 1049&vopl { 1050 status = "okay"; 1051}; 1052 1053&vopl_mmu { 1054 status = "okay"; 1055}; 1056 1057&cif_isp0 { 1058 rockchip,camera-modules-attached = <&camera0>; 1059 status = "okay"; 1060}; 1061 1062&isp0_mmu { 1063 status = "okay"; 1064}; 1065 1066&cif_isp1 { 1067 rockchip,camera-modules-attached = <&camera1>; 1068 status = "disabled"; 1069}; 1070 1071&isp1_mmu { 1072 status = "okay"; 1073}; 1074 1075&vpu { 1076 status = "okay"; 1077 /* 0 means ion, 1 means drm */ 1078 //allocator = <0>; 1079}; 1080 1081&rkvdec { 1082 status = "okay"; 1083 /* 0 means ion, 1 means drm */ 1084 //allocator = <0>; 1085}; 1086 1087&display_subsystem { 1088 status = "okay"; 1089}; 1090