1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h> 9*4882a593Smuzhiyun#include "rk3399.dtsi" 10*4882a593Smuzhiyun#include "rk3399-android.dtsi" 11*4882a593Smuzhiyun#include "rk3399-opp.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h> 13*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun compatible = "rockchip,rk3399-mid", "rockchip,rk3399"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun edp_panel: edp-panel { 19*4882a593Smuzhiyun compatible = "auo,b125han03"; 20*4882a593Smuzhiyun backlight = <&backlight>; 21*4882a593Smuzhiyun power-supply = <&vcc3v3_s0>; 22*4882a593Smuzhiyun enable-gpios = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>; 23*4882a593Smuzhiyun bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; 24*4882a593Smuzhiyun bpc = <6>; 25*4882a593Smuzhiyun prepare-delay-ms = <50>; 26*4882a593Smuzhiyun ports { 27*4882a593Smuzhiyun panel_in_edp: endpoint { 28*4882a593Smuzhiyun remote-endpoint = <&edp_out_panel>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun usb_cam_gpio: usb-cam-gpio { 34*4882a593Smuzhiyun compatible = "usb-cam-gpio"; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun pinctrl-0 = <&usb_cam_on_gpio>; 37*4882a593Smuzhiyun hd-cam-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; 38*4882a593Smuzhiyun ir-cam-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun vcc_sys: vcc-sys { 43*4882a593Smuzhiyun compatible = "regulator-fixed"; 44*4882a593Smuzhiyun regulator-name = "vcc_sys"; 45*4882a593Smuzhiyun regulator-always-on; 46*4882a593Smuzhiyun regulator-boot-on; 47*4882a593Smuzhiyun regulator-min-microvolt = <3900000>; 48*4882a593Smuzhiyun regulator-max-microvolt = <3900000>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vcc3v3_sys: vcc3v3-sys { 52*4882a593Smuzhiyun compatible = "regulator-fixed"; 53*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 54*4882a593Smuzhiyun regulator-always-on; 55*4882a593Smuzhiyun regulator-boot-on; 56*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 57*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host-regulator { 61*4882a593Smuzhiyun compatible = "regulator-fixed"; 62*4882a593Smuzhiyun enable-active-high; 63*4882a593Smuzhiyun gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 64*4882a593Smuzhiyun pinctrl-names = "default"; 65*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 66*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 67*4882a593Smuzhiyun regulator-always-on; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun vdd_log: vdd-log { 71*4882a593Smuzhiyun compatible = "pwm-regulator"; 72*4882a593Smuzhiyun pwms = <&pwm2 0 25000 1>; 73*4882a593Smuzhiyun rockchip,pwm_id= <2>; 74*4882a593Smuzhiyun rockchip,pwm_voltage = <900000>; 75*4882a593Smuzhiyun regulator-name = "vdd_log"; 76*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 77*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 78*4882a593Smuzhiyun regulator-always-on; 79*4882a593Smuzhiyun regulator-boot-on; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun xin32k: xin32k { 83*4882a593Smuzhiyun compatible = "fixed-clock"; 84*4882a593Smuzhiyun clock-frequency = <32768>; 85*4882a593Smuzhiyun clock-output-names = "xin32k"; 86*4882a593Smuzhiyun #clock-cells = <0>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun backlight: backlight { 90*4882a593Smuzhiyun compatible = "pwm-backlight"; 91*4882a593Smuzhiyun pwms = <&pwm0 0 25000 0>; 92*4882a593Smuzhiyun brightness-levels = < 93*4882a593Smuzhiyun 0 1 51 52 52 53 53 54 94*4882a593Smuzhiyun 54 55 55 56 56 57 57 58 95*4882a593Smuzhiyun 58 59 59 60 61 61 62 63 96*4882a593Smuzhiyun 63 64 65 65 66 67 67 68 97*4882a593Smuzhiyun 69 69 70 71 71 72 73 73 98*4882a593Smuzhiyun 74 75 75 76 77 77 78 79 99*4882a593Smuzhiyun 79 80 80 81 81 82 83 83 100*4882a593Smuzhiyun 84 85 86 86 87 88 89 89 101*4882a593Smuzhiyun 90 91 92 92 93 94 95 95 102*4882a593Smuzhiyun 96 97 98 98 99 100 101 101 103*4882a593Smuzhiyun 102 103 104 104 105 106 107 107 104*4882a593Smuzhiyun 108 109 110 110 111 112 113 113 105*4882a593Smuzhiyun 114 115 116 116 117 118 119 119 106*4882a593Smuzhiyun 120 121 122 122 123 124 125 125 107*4882a593Smuzhiyun 126 127 128 128 129 130 131 131 108*4882a593Smuzhiyun 132 133 134 134 135 136 137 137 109*4882a593Smuzhiyun 138 139 140 140 141 142 143 143 110*4882a593Smuzhiyun 144 145 146 146 147 148 149 149 111*4882a593Smuzhiyun 150 151 152 152 153 154 155 155 112*4882a593Smuzhiyun 156 157 158 158 159 160 161 161 113*4882a593Smuzhiyun 162 163 164 164 165 166 167 167 114*4882a593Smuzhiyun 168 169 170 170 171 172 173 173 115*4882a593Smuzhiyun 174 175 176 176 177 178 179 179 116*4882a593Smuzhiyun 180 181 182 182 183 184 185 185 117*4882a593Smuzhiyun 186 187 188 188 189 190 191 191 118*4882a593Smuzhiyun 216 217 218 218 219 220 221 221 119*4882a593Smuzhiyun 222 223 224 224 225 226 227 227 120*4882a593Smuzhiyun 228 229 230 230 231 232 233 233 121*4882a593Smuzhiyun 234 235 236 236 237 238 239 239 122*4882a593Smuzhiyun 240 241 242 242 243 244 245 245 123*4882a593Smuzhiyun 246 247 248 248 249 250 251 251 124*4882a593Smuzhiyun 252 253 254 254 255 255 255 255>; 125*4882a593Smuzhiyun default-brightness-level = <200>; 126*4882a593Smuzhiyun enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 130*4882a593Smuzhiyun compatible = "regulator-fixed"; 131*4882a593Smuzhiyun regulator-name = "vcc_phy"; 132*4882a593Smuzhiyun regulator-always-on; 133*4882a593Smuzhiyun regulator-boot-on; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun cx2072x-sound { 137*4882a593Smuzhiyun compatible = "simple-audio-card"; 138*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 139*4882a593Smuzhiyun simple-audio-card,name = "rockchip,cx2072x-codec"; 140*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 141*4882a593Smuzhiyun simple-audio-card,widgets = 142*4882a593Smuzhiyun "Microphone", "Microphone Jack", 143*4882a593Smuzhiyun "Line", "Microphone Headset", 144*4882a593Smuzhiyun "Headphone", "Headphone Jack", 145*4882a593Smuzhiyun "Speaker", "Speaker External"; 146*4882a593Smuzhiyun simple-audio-card,routing = 147*4882a593Smuzhiyun "PORTC", "Microphone Jack", 148*4882a593Smuzhiyun "PortD Mic Bias", "Microphone Headset", 149*4882a593Smuzhiyun "Headphone Jack", "PORTA", 150*4882a593Smuzhiyun "Speaker External", "PORTG"; 151*4882a593Smuzhiyun simple-audio-card,cpu { 152*4882a593Smuzhiyun sound-dai = <&i2s0>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun simple-audio-card,codec { 155*4882a593Smuzhiyun sound-dai = <&cx2072x>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun sound { 160*4882a593Smuzhiyun compatible = "rockchip,cdndp-sound"; 161*4882a593Smuzhiyun rockchip,cpu = <&i2s2>; 162*4882a593Smuzhiyun rockchip,codec = <&cdn_dp>; 163*4882a593Smuzhiyun status = "okay"; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun bt-sound { 167*4882a593Smuzhiyun compatible = "simple-audio-card"; 168*4882a593Smuzhiyun simple-audio-card,format = "dsp_b"; 169*4882a593Smuzhiyun simple-audio-card,bitclock-inversion = <1>; 170*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 171*4882a593Smuzhiyun simple-audio-card,name = "rockchip,bt"; 172*4882a593Smuzhiyun simple-audio-card,cpu { 173*4882a593Smuzhiyun sound-dai = <&i2s1>; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun simple-audio-card,codec { 176*4882a593Smuzhiyun sound-dai = <&bt_sco>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun bt_sco: bt-sco { 181*4882a593Smuzhiyun compatible = "delta,dfbmcs320"; 182*4882a593Smuzhiyun #sound-dai-cells = <0>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 186*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 187*4882a593Smuzhiyun clocks = <&rk808 1>; 188*4882a593Smuzhiyun clock-names = "ext_clock"; 189*4882a593Smuzhiyun pinctrl-names = "default"; 190*4882a593Smuzhiyun pinctrl-0 = <&wifi_enable_h>; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /* 193*4882a593Smuzhiyun * On the module itself this is one of these (depending 194*4882a593Smuzhiyun * on the actual card populated): 195*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 196*4882a593Smuzhiyun * - PDN (power down when low) 197*4882a593Smuzhiyun */ 198*4882a593Smuzhiyun reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */ 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun leds: gpio-leds { 202*4882a593Smuzhiyun compatible = "gpio-leds"; 203*4882a593Smuzhiyun pinctrl-names = "default"; 204*4882a593Smuzhiyun pinctrl-0 =<&leds_gpio>; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun led@1 { 207*4882a593Smuzhiyun gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; 208*4882a593Smuzhiyun label = "battery_led_amber"; 209*4882a593Smuzhiyun retain-state-suspended; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun led@2 { 213*4882a593Smuzhiyun gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 214*4882a593Smuzhiyun label = "battery_led_white"; 215*4882a593Smuzhiyun retain-state-suspended; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun led@3 { 219*4882a593Smuzhiyun gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; 220*4882a593Smuzhiyun label = "call_answer_led"; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun led@4 { 224*4882a593Smuzhiyun gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 225*4882a593Smuzhiyun label = "call_decline_led"; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun led@5 { 229*4882a593Smuzhiyun gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; 230*4882a593Smuzhiyun label = "rec_mute_led"; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun led@6 { 234*4882a593Smuzhiyun gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 235*4882a593Smuzhiyun label = "play_mute_led"; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun led@7 { 239*4882a593Smuzhiyun gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; 240*4882a593Smuzhiyun label = "wl_led"; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun wireless-wlan { 245*4882a593Smuzhiyun compatible = "wlan-platdata"; 246*4882a593Smuzhiyun rockchip,grf = <&grf>; 247*4882a593Smuzhiyun wifi_chip_type = "ap6354"; 248*4882a593Smuzhiyun sdio_vref = <1800>; 249*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */ 250*4882a593Smuzhiyun status = "okay"; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun wireless-bluetooth { 254*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 255*4882a593Smuzhiyun clocks = <&rk808 1>; 256*4882a593Smuzhiyun clock-names = "ext_clock"; 257*4882a593Smuzhiyun //wifi-bt-power-toggle; 258*4882a593Smuzhiyun uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */ 259*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 260*4882a593Smuzhiyun pinctrl-0 = <&uart0_rts>; 261*4882a593Smuzhiyun pinctrl-1 = <&uart0_gpios>; 262*4882a593Smuzhiyun //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */ 263*4882a593Smuzhiyun BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */ 264*4882a593Smuzhiyun BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */ 265*4882a593Smuzhiyun BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */ 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun uboot-charge { 270*4882a593Smuzhiyun compatible = "rockchip,uboot-charge"; 271*4882a593Smuzhiyun rockchip,uboot-charge-on = <1>; 272*4882a593Smuzhiyun rockchip,android-charge-on = <0>; 273*4882a593Smuzhiyun rockchip,uboot-exit-charge-level = <2>; 274*4882a593Smuzhiyun rockchip,uboot-low-power-level = <1>; 275*4882a593Smuzhiyun rockchip,uboot-charge-brightness = <0>; 276*4882a593Smuzhiyun max-input-voltage = <20000>; 277*4882a593Smuzhiyun max-input-current = <6000>; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun vibrator { 281*4882a593Smuzhiyun compatible = "rk-vibrator-gpio"; 282*4882a593Smuzhiyun vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>; 283*4882a593Smuzhiyun status = "okay"; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun rk_headset: rk-headset { 287*4882a593Smuzhiyun compatible = "rockchip_headset"; 288*4882a593Smuzhiyun headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>; 289*4882a593Smuzhiyun pinctrl-names = "default"; 290*4882a593Smuzhiyun pinctrl-0 = <&hp_det>; 291*4882a593Smuzhiyun io-channels = <&saradc 2>; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun hall_sensor: hall-mh248 { 295*4882a593Smuzhiyun compatible = "hall-mh248"; 296*4882a593Smuzhiyun pinctrl-names = "default"; 297*4882a593Smuzhiyun pinctrl-0 = <&mh248_irq_gpio>; 298*4882a593Smuzhiyun irq-gpio = <&gpio0 RK_PA1 IRQ_TYPE_EDGE_BOTH>; 299*4882a593Smuzhiyun hall-active = <1>; 300*4882a593Smuzhiyun status = "okay"; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&rk_key { 305*4882a593Smuzhiyun compatible = "rockchip,key"; 306*4882a593Smuzhiyun status = "okay"; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun io-channels = <&saradc 1>; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun vol-up-key { 311*4882a593Smuzhiyun linux,code = <114>; 312*4882a593Smuzhiyun label = "volume up"; 313*4882a593Smuzhiyun rockchip,adc_value = <1>; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun vol-down-key { 317*4882a593Smuzhiyun linux,code = <115>; 318*4882a593Smuzhiyun label = "volume down"; 319*4882a593Smuzhiyun rockchip,adc_value = <170>; 320*4882a593Smuzhiyun }; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun power-key { 323*4882a593Smuzhiyun gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 324*4882a593Smuzhiyun linux,code = <116>; 325*4882a593Smuzhiyun label = "power"; 326*4882a593Smuzhiyun gpio-key,wakeup; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun menu-key { 330*4882a593Smuzhiyun linux,code = <59>; 331*4882a593Smuzhiyun label = "menu"; 332*4882a593Smuzhiyun rockchip,adc_value = <746>; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun home-key { 336*4882a593Smuzhiyun linux,code = <102>; 337*4882a593Smuzhiyun label = "home"; 338*4882a593Smuzhiyun rockchip,adc_value = <355>; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun back-key { 342*4882a593Smuzhiyun linux,code = <158>; 343*4882a593Smuzhiyun label = "back"; 344*4882a593Smuzhiyun rockchip,adc_value = <560>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun camera-key { 348*4882a593Smuzhiyun linux,code = <212>; 349*4882a593Smuzhiyun label = "camera"; 350*4882a593Smuzhiyun rockchip,adc_value = <450>; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun}; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun&cpu_l0 { 355*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 356*4882a593Smuzhiyun}; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun&cpu_l1 { 359*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 360*4882a593Smuzhiyun}; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun&cpu_l2 { 363*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 364*4882a593Smuzhiyun}; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun&cpu_l3 { 367*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_l>; 368*4882a593Smuzhiyun}; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun&cpu_b0 { 371*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 372*4882a593Smuzhiyun}; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun&cpu_b1 { 375*4882a593Smuzhiyun cpu-supply = <&vdd_cpu_b>; 376*4882a593Smuzhiyun}; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun&edp { 379*4882a593Smuzhiyun status = "okay"; 380*4882a593Smuzhiyun pinctrl-names = "default"; 381*4882a593Smuzhiyun pinctrl-0 = <&edp_hpd>; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun ports { 384*4882a593Smuzhiyun edp_out: port@1 { 385*4882a593Smuzhiyun reg = <1>; 386*4882a593Smuzhiyun #address-cells = <1>; 387*4882a593Smuzhiyun #size-cells = <0>; 388*4882a593Smuzhiyun edp_out_panel: endpoint@0 { 389*4882a593Smuzhiyun reg = <0>; 390*4882a593Smuzhiyun remote-endpoint = <&panel_in_edp>; 391*4882a593Smuzhiyun }; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun}; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun&edp_in_vopl { 397*4882a593Smuzhiyun status = "disabled"; 398*4882a593Smuzhiyun}; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun&emmc_phy { 401*4882a593Smuzhiyun status = "okay"; 402*4882a593Smuzhiyun}; 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun&firmware_android { 405*4882a593Smuzhiyun compatible = "android,firmware"; 406*4882a593Smuzhiyun fstab { 407*4882a593Smuzhiyun compatible = "android,fstab"; 408*4882a593Smuzhiyun system { 409*4882a593Smuzhiyun compatible = "android,system"; 410*4882a593Smuzhiyun dev = "/dev/block/by-name/system"; 411*4882a593Smuzhiyun type = "ext4"; 412*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 413*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 414*4882a593Smuzhiyun }; 415*4882a593Smuzhiyun vendor { 416*4882a593Smuzhiyun compatible = "android,vendor"; 417*4882a593Smuzhiyun dev = "/dev/block/by-name/vendor"; 418*4882a593Smuzhiyun type = "ext4"; 419*4882a593Smuzhiyun mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 420*4882a593Smuzhiyun fsmgr_flags = "wait,verify"; 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun}; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun&gpu { 426*4882a593Smuzhiyun status = "okay"; 427*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 428*4882a593Smuzhiyun}; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun&hdmi { 431*4882a593Smuzhiyun status = "disabled"; 432*4882a593Smuzhiyun}; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun&cdn_dp { 435*4882a593Smuzhiyun status = "okay"; 436*4882a593Smuzhiyun extcon = <&fusb0>, <&fusb1>; 437*4882a593Smuzhiyun}; 438*4882a593Smuzhiyun 439*4882a593Smuzhiyun&dp_in_vopb { 440*4882a593Smuzhiyun status = "disabled"; 441*4882a593Smuzhiyun}; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun&i2s0 { 444*4882a593Smuzhiyun status = "okay"; 445*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 446*4882a593Smuzhiyun rockchip,playback-channels = <8>; 447*4882a593Smuzhiyun rockchip,capture-channels = <8>; 448*4882a593Smuzhiyun rockchip,bclk-fs = <32>; 449*4882a593Smuzhiyun #sound-dai-cells = <0>; 450*4882a593Smuzhiyun}; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun&i2s1 { 453*4882a593Smuzhiyun status = "okay"; 454*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 455*4882a593Smuzhiyun rockchip,playback-channels = <2>; 456*4882a593Smuzhiyun rockchip,capture-channels = <2>; 457*4882a593Smuzhiyun #sound-dai-cells = <0>; 458*4882a593Smuzhiyun}; 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun&i2s2 { 461*4882a593Smuzhiyun status = "okay"; 462*4882a593Smuzhiyun #sound-dai-cells = <0>; 463*4882a593Smuzhiyun}; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun&i2c0 { 466*4882a593Smuzhiyun status = "okay"; 467*4882a593Smuzhiyun i2c-scl-rising-time-ns = <180>; 468*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 469*4882a593Smuzhiyun clock-frequency = <400000>; 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun vdd_cpu_b: syr837@40 { 472*4882a593Smuzhiyun compatible = "silergy,syr827"; 473*4882a593Smuzhiyun reg = <0x40>; 474*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 475*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 476*4882a593Smuzhiyun pinctrl-0 = <&vsel1_gpio>; 477*4882a593Smuzhiyun vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 478*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 479*4882a593Smuzhiyun regulator-min-microvolt = <712500>; 480*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 481*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 482*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 483*4882a593Smuzhiyun regulator-always-on; 484*4882a593Smuzhiyun regulator-initial-state = <3>; 485*4882a593Smuzhiyun regulator-state-mem { 486*4882a593Smuzhiyun regulator-off-in-suspend; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun }; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun vdd_gpu: syr828@41 { 491*4882a593Smuzhiyun compatible = "silergy,syr828"; 492*4882a593Smuzhiyun status = "okay"; 493*4882a593Smuzhiyun reg = <0x41>; 494*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 495*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 496*4882a593Smuzhiyun pinctrl-0 = <&vsel2_gpio>; 497*4882a593Smuzhiyun vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 498*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 499*4882a593Smuzhiyun regulator-min-microvolt = <735000>; 500*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 501*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 502*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 503*4882a593Smuzhiyun regulator-always-on; 504*4882a593Smuzhiyun regulator-boot-on; 505*4882a593Smuzhiyun regulator-state-mem { 506*4882a593Smuzhiyun regulator-off-in-suspend; 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun }; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun rk808: pmic@1b { 511*4882a593Smuzhiyun compatible = "rockchip,rk808"; 512*4882a593Smuzhiyun reg = <0x1b>; 513*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 514*4882a593Smuzhiyun interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 515*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 516*4882a593Smuzhiyun rockchip,system-power-controller; 517*4882a593Smuzhiyun wakeup-source; 518*4882a593Smuzhiyun #clock-cells = <1>; 519*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun vcc1-supply = <&vcc3v3_sys>; 522*4882a593Smuzhiyun vcc2-supply = <&vcc3v3_sys>; 523*4882a593Smuzhiyun vcc3-supply = <&vcc3v3_sys>; 524*4882a593Smuzhiyun vcc4-supply = <&vcc3v3_sys>; 525*4882a593Smuzhiyun vcc6-supply = <&vcc3v3_sys>; 526*4882a593Smuzhiyun vcc7-supply = <&vcc3v3_sys>; 527*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 528*4882a593Smuzhiyun vcc9-supply = <&vcc3v3_sys>; 529*4882a593Smuzhiyun vcc10-supply = <&vcc3v3_sys>; 530*4882a593Smuzhiyun vcc11-supply = <&vcc3v3_sys>; 531*4882a593Smuzhiyun vcc12-supply = <&vcc3v3_sys>; 532*4882a593Smuzhiyun vddio-supply = <&vcc1v8_pmu>; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun regulators { 535*4882a593Smuzhiyun vdd_center: DCDC_REG1 { 536*4882a593Smuzhiyun regulator-always-on; 537*4882a593Smuzhiyun regulator-boot-on; 538*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 539*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 540*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 541*4882a593Smuzhiyun regulator-name = "vdd_center"; 542*4882a593Smuzhiyun regulator-state-mem { 543*4882a593Smuzhiyun regulator-off-in-suspend; 544*4882a593Smuzhiyun }; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 548*4882a593Smuzhiyun regulator-always-on; 549*4882a593Smuzhiyun regulator-boot-on; 550*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 551*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 552*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 553*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 554*4882a593Smuzhiyun regulator-state-mem { 555*4882a593Smuzhiyun regulator-off-in-suspend; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 560*4882a593Smuzhiyun regulator-always-on; 561*4882a593Smuzhiyun regulator-boot-on; 562*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 563*4882a593Smuzhiyun regulator-state-mem { 564*4882a593Smuzhiyun regulator-on-in-suspend; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun }; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun vcc_1v8: DCDC_REG4 { 569*4882a593Smuzhiyun regulator-always-on; 570*4882a593Smuzhiyun regulator-boot-on; 571*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 572*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 573*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 574*4882a593Smuzhiyun regulator-state-mem { 575*4882a593Smuzhiyun regulator-on-in-suspend; 576*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 577*4882a593Smuzhiyun }; 578*4882a593Smuzhiyun }; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun vcc1v8_dvp: LDO_REG1 { 581*4882a593Smuzhiyun regulator-always-on; 582*4882a593Smuzhiyun regulator-boot-on; 583*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 584*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 585*4882a593Smuzhiyun regulator-name = "vcc1v8_dvp"; 586*4882a593Smuzhiyun regulator-state-mem { 587*4882a593Smuzhiyun regulator-off-in-suspend; 588*4882a593Smuzhiyun }; 589*4882a593Smuzhiyun }; 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun vcc3v0_tp: LDO_REG2 { 592*4882a593Smuzhiyun regulator-always-on; 593*4882a593Smuzhiyun regulator-boot-on; 594*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 595*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 596*4882a593Smuzhiyun regulator-name = "vcc3v0_tp"; 597*4882a593Smuzhiyun regulator-state-mem { 598*4882a593Smuzhiyun regulator-off-in-suspend; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun }; 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun vcc1v8_pmu: LDO_REG3 { 603*4882a593Smuzhiyun regulator-always-on; 604*4882a593Smuzhiyun regulator-boot-on; 605*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 606*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 607*4882a593Smuzhiyun regulator-name = "vcc1v8_pmu"; 608*4882a593Smuzhiyun regulator-state-mem { 609*4882a593Smuzhiyun regulator-on-in-suspend; 610*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 611*4882a593Smuzhiyun }; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun vcc_sd: LDO_REG4 { 615*4882a593Smuzhiyun regulator-always-on; 616*4882a593Smuzhiyun regulator-boot-on; 617*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 618*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 619*4882a593Smuzhiyun regulator-name = "vcc_sd"; 620*4882a593Smuzhiyun regulator-state-mem { 621*4882a593Smuzhiyun regulator-on-in-suspend; 622*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 623*4882a593Smuzhiyun }; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun vcca3v0_codec: LDO_REG5 { 627*4882a593Smuzhiyun regulator-always-on; 628*4882a593Smuzhiyun regulator-boot-on; 629*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 630*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 631*4882a593Smuzhiyun regulator-name = "vcca3v0_codec"; 632*4882a593Smuzhiyun regulator-state-mem { 633*4882a593Smuzhiyun regulator-off-in-suspend; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun }; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun vcc_1v5: LDO_REG6 { 638*4882a593Smuzhiyun regulator-always-on; 639*4882a593Smuzhiyun regulator-boot-on; 640*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 641*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 642*4882a593Smuzhiyun regulator-name = "vcc_1v5"; 643*4882a593Smuzhiyun regulator-state-mem { 644*4882a593Smuzhiyun regulator-on-in-suspend; 645*4882a593Smuzhiyun regulator-suspend-microvolt = <1500000>; 646*4882a593Smuzhiyun }; 647*4882a593Smuzhiyun }; 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun vcca1v8_codec: LDO_REG7 { 650*4882a593Smuzhiyun regulator-always-on; 651*4882a593Smuzhiyun regulator-boot-on; 652*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 653*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 654*4882a593Smuzhiyun regulator-name = "vcca1v8_codec"; 655*4882a593Smuzhiyun regulator-state-mem { 656*4882a593Smuzhiyun regulator-off-in-suspend; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun }; 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun vcc_3v0: LDO_REG8 { 661*4882a593Smuzhiyun regulator-always-on; 662*4882a593Smuzhiyun regulator-boot-on; 663*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 664*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 665*4882a593Smuzhiyun regulator-name = "vcc_3v0"; 666*4882a593Smuzhiyun regulator-state-mem { 667*4882a593Smuzhiyun regulator-on-in-suspend; 668*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 669*4882a593Smuzhiyun }; 670*4882a593Smuzhiyun }; 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun vcc3v3_s3: SWITCH_REG1 { 673*4882a593Smuzhiyun regulator-always-on; 674*4882a593Smuzhiyun regulator-boot-on; 675*4882a593Smuzhiyun regulator-name = "vcc3v3_s3"; 676*4882a593Smuzhiyun regulator-state-mem { 677*4882a593Smuzhiyun regulator-off-in-suspend; 678*4882a593Smuzhiyun }; 679*4882a593Smuzhiyun }; 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun vcc3v3_s0: SWITCH_REG2 { 682*4882a593Smuzhiyun regulator-always-on; 683*4882a593Smuzhiyun regulator-boot-on; 684*4882a593Smuzhiyun regulator-name = "vcc3v3_s0"; 685*4882a593Smuzhiyun regulator-state-mem { 686*4882a593Smuzhiyun regulator-off-in-suspend; 687*4882a593Smuzhiyun }; 688*4882a593Smuzhiyun }; 689*4882a593Smuzhiyun }; 690*4882a593Smuzhiyun }; 691*4882a593Smuzhiyun}; 692*4882a593Smuzhiyun 693*4882a593Smuzhiyun&i2c1 { 694*4882a593Smuzhiyun status = "okay"; 695*4882a593Smuzhiyun i2c-scl-rising-time-ns = <140>; 696*4882a593Smuzhiyun i2c-scl-falling-time-ns = <30>; 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun cx2072x:cx2072x@33 { 699*4882a593Smuzhiyun status = "okay"; 700*4882a593Smuzhiyun #sound-dai-cells = <0>; 701*4882a593Smuzhiyun compatible = "cnxt,cx20723"; 702*4882a593Smuzhiyun reg = <0x33>; 703*4882a593Smuzhiyun clocks = <&cru SCLK_I2S_8CH_OUT>; 704*4882a593Smuzhiyun clock-names = "mclk"; 705*4882a593Smuzhiyun pinctrl-names = "default"; 706*4882a593Smuzhiyun pinctrl-0 = <&i2s_8ch_mclk>; 707*4882a593Smuzhiyun spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; 708*4882a593Smuzhiyun }; 709*4882a593Smuzhiyun}; 710*4882a593Smuzhiyun 711*4882a593Smuzhiyun&i2c3 { 712*4882a593Smuzhiyun status="okay"; 713*4882a593Smuzhiyun 714*4882a593Smuzhiyun hidkey@68 { 715*4882a593Smuzhiyun clock-frequency = <100000>; 716*4882a593Smuzhiyun compatible = "hid-over-i2c"; 717*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 718*4882a593Smuzhiyun interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 719*4882a593Smuzhiyun pinctrl-names = "default"; 720*4882a593Smuzhiyun pinctrl-0 = <&hidkey_irq_gpio>; 721*4882a593Smuzhiyun reg = <0x68>; 722*4882a593Smuzhiyun hid-descr-addr = <0x0001>; 723*4882a593Smuzhiyun hid-support-wakeup; 724*4882a593Smuzhiyun }; 725*4882a593Smuzhiyun 726*4882a593Smuzhiyun ec_battery@76 { 727*4882a593Smuzhiyun compatible = "rockchip,ec-battery"; 728*4882a593Smuzhiyun reg = <0x76>; 729*4882a593Smuzhiyun virtual_power = <0>; 730*4882a593Smuzhiyun monitor_sec = <5>; 731*4882a593Smuzhiyun ec-notify-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; 732*4882a593Smuzhiyun }; 733*4882a593Smuzhiyun}; 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun&i2c2 { 736*4882a593Smuzhiyun status = "okay"; 737*4882a593Smuzhiyun i2c-scl-rising-time-ns = <345>; 738*4882a593Smuzhiyun i2c-scl-falling-time-ns = <11>; 739*4882a593Smuzhiyun clock-frequency = <400000>; 740*4882a593Smuzhiyun 741*4882a593Smuzhiyun touchpad: touchpad@2c { 742*4882a593Smuzhiyun compatible = "hid-over-i2c"; 743*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 744*4882a593Smuzhiyun interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>; 745*4882a593Smuzhiyun pinctrl-names = "default"; 746*4882a593Smuzhiyun pinctrl-0 = <&touchpad_irq_gpio>; 747*4882a593Smuzhiyun reg = <0x2c>; 748*4882a593Smuzhiyun hid-descr-addr = <0x002c>; 749*4882a593Smuzhiyun }; 750*4882a593Smuzhiyun}; 751*4882a593Smuzhiyun 752*4882a593Smuzhiyun&i2c4 { 753*4882a593Smuzhiyun status = "okay"; 754*4882a593Smuzhiyun clock-frequency = <100000>; 755*4882a593Smuzhiyun bq25700: bq25700@09 {//6a 756*4882a593Smuzhiyun compatible = "ti,bq25700"; 757*4882a593Smuzhiyun reg = <0x09>; 758*4882a593Smuzhiyun extcon = <&fusb0>, <&fusb1>; 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 761*4882a593Smuzhiyun interrupts = <23 IRQ_TYPE_LEVEL_LOW>; 762*4882a593Smuzhiyun pinctrl-names = "default"; 763*4882a593Smuzhiyun pinctrl-0 = <&charger_ok>; 764*4882a593Smuzhiyun ti,charge-current = <2500000>; 765*4882a593Smuzhiyun ti,max-input-voltage = <20000000>; 766*4882a593Smuzhiyun ti,max-input-current = <6000000>; 767*4882a593Smuzhiyun ti,max-charge-voltage = <8750000>; 768*4882a593Smuzhiyun ti,input-current = <500000>; 769*4882a593Smuzhiyun ti,input-current-sdp = <500000>; 770*4882a593Smuzhiyun ti,input-current-dcp = <2000000>; 771*4882a593Smuzhiyun ti,input-current-cdp = <2000000>; 772*4882a593Smuzhiyun ti,minimum-sys-voltage = <7400000>; 773*4882a593Smuzhiyun ti,otg-voltage = <5000000>; 774*4882a593Smuzhiyun ti,otg-current = <500000>; 775*4882a593Smuzhiyun pd-charge-only = <1>; 776*4882a593Smuzhiyun typec0-enable-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 777*4882a593Smuzhiyun typec1-enable-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 778*4882a593Smuzhiyun }; 779*4882a593Smuzhiyun}; 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun&i2c6 { 782*4882a593Smuzhiyun status = "okay"; 783*4882a593Smuzhiyun i2c-scl-rising-time-ns = <345>; 784*4882a593Smuzhiyun i2c-scl-falling-time-ns = <11>; 785*4882a593Smuzhiyun clock-frequency = <400000>; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun fusb1: fusb30x@22 { 788*4882a593Smuzhiyun compatible = "fairchild,fusb302"; 789*4882a593Smuzhiyun reg = <0x22>; 790*4882a593Smuzhiyun pinctrl-names = "default"; 791*4882a593Smuzhiyun pinctrl-0 = <&fusb1_int>; 792*4882a593Smuzhiyun vbus-5v-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 793*4882a593Smuzhiyun int-n-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 794*4882a593Smuzhiyun discharge-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 795*4882a593Smuzhiyun charge-dev = <&bq25700>; 796*4882a593Smuzhiyun support-uboot-charge = <1>; 797*4882a593Smuzhiyun port-num = <1>; 798*4882a593Smuzhiyun status = "okay"; 799*4882a593Smuzhiyun }; 800*4882a593Smuzhiyun}; 801*4882a593Smuzhiyun 802*4882a593Smuzhiyun&i2c7 { 803*4882a593Smuzhiyun status = "okay"; 804*4882a593Smuzhiyun i2c-scl-rising-time-ns = <345>; 805*4882a593Smuzhiyun i2c-scl-falling-time-ns = <11>; 806*4882a593Smuzhiyun clock-frequency = <400000>; 807*4882a593Smuzhiyun 808*4882a593Smuzhiyun fusb0: fusb30x@22 { 809*4882a593Smuzhiyun compatible = "fairchild,fusb302"; 810*4882a593Smuzhiyun reg = <0x22>; 811*4882a593Smuzhiyun pinctrl-names = "default"; 812*4882a593Smuzhiyun pinctrl-0 = <&fusb0_int>; 813*4882a593Smuzhiyun vbus-5v-gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; 814*4882a593Smuzhiyun int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; 815*4882a593Smuzhiyun discharge-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 816*4882a593Smuzhiyun charge-dev = <&bq25700>; 817*4882a593Smuzhiyun support-uboot-charge = <1>; 818*4882a593Smuzhiyun port-num = <0>; 819*4882a593Smuzhiyun status = "okay"; 820*4882a593Smuzhiyun }; 821*4882a593Smuzhiyun}; 822*4882a593Smuzhiyun 823*4882a593Smuzhiyun&io_domains { 824*4882a593Smuzhiyun status = "okay"; 825*4882a593Smuzhiyun bt656-supply = <&vcc_3v0>; 826*4882a593Smuzhiyun audio-supply = <&vcca1v8_codec>; 827*4882a593Smuzhiyun sdmmc-supply = <&vcc_sd>; 828*4882a593Smuzhiyun gpio1830-supply = <&vcc_3v0>; 829*4882a593Smuzhiyun}; 830*4882a593Smuzhiyun 831*4882a593Smuzhiyun&dsi { 832*4882a593Smuzhiyun status = "disabled"; 833*4882a593Smuzhiyun}; 834*4882a593Smuzhiyun 835*4882a593Smuzhiyun&pcie_phy { 836*4882a593Smuzhiyun status = "okay"; 837*4882a593Smuzhiyun}; 838*4882a593Smuzhiyun 839*4882a593Smuzhiyun&pcie0 { 840*4882a593Smuzhiyun ep-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; 841*4882a593Smuzhiyun num-lanes = <4>; 842*4882a593Smuzhiyun pinctrl-names = "default"; 843*4882a593Smuzhiyun pinctrl-0 = <&pcie_clkreqn_cpm>; 844*4882a593Smuzhiyun status = "okay"; 845*4882a593Smuzhiyun}; 846*4882a593Smuzhiyun 847*4882a593Smuzhiyun&pmu_io_domains { 848*4882a593Smuzhiyun status = "okay"; 849*4882a593Smuzhiyun pmu1830-supply = <&vcc_1v8>; 850*4882a593Smuzhiyun}; 851*4882a593Smuzhiyun 852*4882a593Smuzhiyun&pwm0 { 853*4882a593Smuzhiyun status = "okay"; 854*4882a593Smuzhiyun}; 855*4882a593Smuzhiyun 856*4882a593Smuzhiyun&pwm2 { 857*4882a593Smuzhiyun status = "okay"; 858*4882a593Smuzhiyun pinctrl-names = "active"; 859*4882a593Smuzhiyun pinctrl-0 = <&pwm2_pin_pull_down>; 860*4882a593Smuzhiyun}; 861*4882a593Smuzhiyun 862*4882a593Smuzhiyun&route_edp { 863*4882a593Smuzhiyun status = "okay"; 864*4882a593Smuzhiyun logo,mode = "center"; 865*4882a593Smuzhiyun}; 866*4882a593Smuzhiyun 867*4882a593Smuzhiyun&saradc { 868*4882a593Smuzhiyun status = "okay"; 869*4882a593Smuzhiyun}; 870*4882a593Smuzhiyun 871*4882a593Smuzhiyun&sdmmc { 872*4882a593Smuzhiyun clock-frequency = <50000000>; 873*4882a593Smuzhiyun clock-freq-min-max = <400000 150000000>; 874*4882a593Smuzhiyun no-sdio; 875*4882a593Smuzhiyun no-mmc; 876*4882a593Smuzhiyun bus-width = <4>; 877*4882a593Smuzhiyun cap-mmc-highspeed; 878*4882a593Smuzhiyun cap-sd-highspeed; 879*4882a593Smuzhiyun disable-wp; 880*4882a593Smuzhiyun num-slots = <1>; 881*4882a593Smuzhiyun //sd-uhs-sdr104; 882*4882a593Smuzhiyun vqmmc-supply = <&vcc_sd>; 883*4882a593Smuzhiyun pinctrl-names = "default"; 884*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 885*4882a593Smuzhiyun status = "okay"; 886*4882a593Smuzhiyun}; 887*4882a593Smuzhiyun 888*4882a593Smuzhiyun&sdio0 { 889*4882a593Smuzhiyun clock-frequency = <150000000>; 890*4882a593Smuzhiyun clock-freq-min-max = <200000 150000000>; 891*4882a593Smuzhiyun no-sd; 892*4882a593Smuzhiyun no-mmc; 893*4882a593Smuzhiyun bus-width = <4>; 894*4882a593Smuzhiyun disable-wp; 895*4882a593Smuzhiyun cap-sd-highspeed; 896*4882a593Smuzhiyun cap-sdio-irq; 897*4882a593Smuzhiyun keep-power-in-suspend; 898*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 899*4882a593Smuzhiyun non-removable; 900*4882a593Smuzhiyun num-slots = <1>; 901*4882a593Smuzhiyun pinctrl-names = "default"; 902*4882a593Smuzhiyun pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 903*4882a593Smuzhiyun sd-uhs-sdr104; 904*4882a593Smuzhiyun status = "okay"; 905*4882a593Smuzhiyun}; 906*4882a593Smuzhiyun 907*4882a593Smuzhiyun&sdhci { 908*4882a593Smuzhiyun bus-width = <8>; 909*4882a593Smuzhiyun mmc-hs400-1_8v; 910*4882a593Smuzhiyun no-sdio; 911*4882a593Smuzhiyun no-sd; 912*4882a593Smuzhiyun non-removable; 913*4882a593Smuzhiyun keep-power-in-suspend; 914*4882a593Smuzhiyun mmc-hs400-enhanced-strobe; 915*4882a593Smuzhiyun status = "okay"; 916*4882a593Smuzhiyun}; 917*4882a593Smuzhiyun 918*4882a593Smuzhiyun&spdif { 919*4882a593Smuzhiyun status = "okay"; 920*4882a593Smuzhiyun #sound-dai-cells = <0>; 921*4882a593Smuzhiyun}; 922*4882a593Smuzhiyun 923*4882a593Smuzhiyun&spi1 { 924*4882a593Smuzhiyun status = "disabled"; 925*4882a593Smuzhiyun}; 926*4882a593Smuzhiyun 927*4882a593Smuzhiyun&tcphy0 { 928*4882a593Smuzhiyun extcon = <&fusb0>; 929*4882a593Smuzhiyun status = "okay"; 930*4882a593Smuzhiyun}; 931*4882a593Smuzhiyun 932*4882a593Smuzhiyun&tcphy1 { 933*4882a593Smuzhiyun extcon = <&fusb1>; 934*4882a593Smuzhiyun status = "okay"; 935*4882a593Smuzhiyun}; 936*4882a593Smuzhiyun 937*4882a593Smuzhiyun&tsadc { 938*4882a593Smuzhiyun rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 939*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 940*4882a593Smuzhiyun status = "okay"; 941*4882a593Smuzhiyun}; 942*4882a593Smuzhiyun 943*4882a593Smuzhiyun&u2phy0 { 944*4882a593Smuzhiyun status = "okay"; 945*4882a593Smuzhiyun extcon = <&fusb0>; 946*4882a593Smuzhiyun 947*4882a593Smuzhiyun u2phy0_otg: otg-port { 948*4882a593Smuzhiyun status = "okay"; 949*4882a593Smuzhiyun }; 950*4882a593Smuzhiyun 951*4882a593Smuzhiyun u2phy0_host: host-port { 952*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 953*4882a593Smuzhiyun status = "okay"; 954*4882a593Smuzhiyun }; 955*4882a593Smuzhiyun}; 956*4882a593Smuzhiyun 957*4882a593Smuzhiyun&u2phy1 { 958*4882a593Smuzhiyun status = "okay"; 959*4882a593Smuzhiyun extcon = <&fusb1>; 960*4882a593Smuzhiyun 961*4882a593Smuzhiyun u2phy1_otg: otg-port { 962*4882a593Smuzhiyun status = "okay"; 963*4882a593Smuzhiyun }; 964*4882a593Smuzhiyun 965*4882a593Smuzhiyun u2phy1_host: host-port { 966*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 967*4882a593Smuzhiyun status = "okay"; 968*4882a593Smuzhiyun }; 969*4882a593Smuzhiyun}; 970*4882a593Smuzhiyun 971*4882a593Smuzhiyun&uart0 { 972*4882a593Smuzhiyun pinctrl-names = "default"; 973*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 974*4882a593Smuzhiyun status = "okay"; 975*4882a593Smuzhiyun}; 976*4882a593Smuzhiyun 977*4882a593Smuzhiyun&uart2 { 978*4882a593Smuzhiyun status = "okay"; 979*4882a593Smuzhiyun}; 980*4882a593Smuzhiyun 981*4882a593Smuzhiyun&usb_host0_ehci { 982*4882a593Smuzhiyun status = "okay"; 983*4882a593Smuzhiyun}; 984*4882a593Smuzhiyun 985*4882a593Smuzhiyun&usb_host0_ohci { 986*4882a593Smuzhiyun status = "okay"; 987*4882a593Smuzhiyun}; 988*4882a593Smuzhiyun 989*4882a593Smuzhiyun&usbdrd3_0 { 990*4882a593Smuzhiyun status = "okay"; 991*4882a593Smuzhiyun}; 992*4882a593Smuzhiyun 993*4882a593Smuzhiyun&usbdrd_dwc3_0 { 994*4882a593Smuzhiyun status = "okay"; 995*4882a593Smuzhiyun extcon = <&fusb0>; 996*4882a593Smuzhiyun}; 997*4882a593Smuzhiyun 998*4882a593Smuzhiyun&usb_host1_ehci { 999*4882a593Smuzhiyun status = "okay"; 1000*4882a593Smuzhiyun}; 1001*4882a593Smuzhiyun 1002*4882a593Smuzhiyun&usb_host1_ohci { 1003*4882a593Smuzhiyun status = "okay"; 1004*4882a593Smuzhiyun}; 1005*4882a593Smuzhiyun 1006*4882a593Smuzhiyun&usbdrd3_1 { 1007*4882a593Smuzhiyun status = "okay"; 1008*4882a593Smuzhiyun}; 1009*4882a593Smuzhiyun 1010*4882a593Smuzhiyun&usbdrd_dwc3_1 { 1011*4882a593Smuzhiyun status = "okay"; 1012*4882a593Smuzhiyun extcon = <&fusb1>; 1013*4882a593Smuzhiyun}; 1014*4882a593Smuzhiyun 1015*4882a593Smuzhiyun&rockchip_suspend { 1016*4882a593Smuzhiyun status = "okay"; 1017*4882a593Smuzhiyun rockchip,sleep-debug-en = <1>; 1018*4882a593Smuzhiyun rockchip,sleep-mode-config = < 1019*4882a593Smuzhiyun (0 1020*4882a593Smuzhiyun | RKPM_SLP_ARMPD 1021*4882a593Smuzhiyun | RKPM_SLP_PERILPPD 1022*4882a593Smuzhiyun | RKPM_SLP_DDR_RET 1023*4882a593Smuzhiyun | RKPM_SLP_PLLPD 1024*4882a593Smuzhiyun | RKPM_SLP_CENTER_PD 1025*4882a593Smuzhiyun | RKPM_SLP_AP_PWROFF 1026*4882a593Smuzhiyun ) 1027*4882a593Smuzhiyun >; 1028*4882a593Smuzhiyun rockchip,wakeup-config = < 1029*4882a593Smuzhiyun (0 1030*4882a593Smuzhiyun | RKPM_GPIO_WKUP_EN 1031*4882a593Smuzhiyun | RKPM_PWM_WKUP_EN 1032*4882a593Smuzhiyun ) 1033*4882a593Smuzhiyun >; 1034*4882a593Smuzhiyun rockchip,pwm-regulator-config = < 1035*4882a593Smuzhiyun (0 1036*4882a593Smuzhiyun | PWM2_REGULATOR_EN 1037*4882a593Smuzhiyun ) 1038*4882a593Smuzhiyun >; 1039*4882a593Smuzhiyun rockchip,power-ctrl = 1040*4882a593Smuzhiyun <&gpio1 17 GPIO_ACTIVE_HIGH>, 1041*4882a593Smuzhiyun <&gpio1 14 GPIO_ACTIVE_HIGH>; 1042*4882a593Smuzhiyun}; 1043*4882a593Smuzhiyun 1044*4882a593Smuzhiyun&pinctrl { 1045*4882a593Smuzhiyun sdio-pwrseq { 1046*4882a593Smuzhiyun wifi_enable_h: wifi-enable-h { 1047*4882a593Smuzhiyun rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 1048*4882a593Smuzhiyun }; 1049*4882a593Smuzhiyun }; 1050*4882a593Smuzhiyun 1051*4882a593Smuzhiyun wireless-bluetooth { 1052*4882a593Smuzhiyun uart0_gpios: uart0-gpios { 1053*4882a593Smuzhiyun rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 1054*4882a593Smuzhiyun }; 1055*4882a593Smuzhiyun }; 1056*4882a593Smuzhiyun 1057*4882a593Smuzhiyun pmic { 1058*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 1059*4882a593Smuzhiyun rockchip,pins = 1060*4882a593Smuzhiyun <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 1061*4882a593Smuzhiyun }; 1062*4882a593Smuzhiyun vsel1_gpio: vsel1-gpio { 1063*4882a593Smuzhiyun rockchip,pins = 1064*4882a593Smuzhiyun <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 1065*4882a593Smuzhiyun }; 1066*4882a593Smuzhiyun vsel2_gpio: vsel2-gpio { 1067*4882a593Smuzhiyun rockchip,pins = 1068*4882a593Smuzhiyun <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 1069*4882a593Smuzhiyun }; 1070*4882a593Smuzhiyun }; 1071*4882a593Smuzhiyun 1072*4882a593Smuzhiyun headphone { 1073*4882a593Smuzhiyun hp_det: hp-det { 1074*4882a593Smuzhiyun rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 1075*4882a593Smuzhiyun }; 1076*4882a593Smuzhiyun }; 1077*4882a593Smuzhiyun 1078*4882a593Smuzhiyun hallsensor { 1079*4882a593Smuzhiyun mh248_irq_gpio: mh248-irq-gpio { 1080*4882a593Smuzhiyun rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 1081*4882a593Smuzhiyun }; 1082*4882a593Smuzhiyun }; 1083*4882a593Smuzhiyun 1084*4882a593Smuzhiyun hidkey { 1085*4882a593Smuzhiyun hidkey_irq_gpio: hidkey-irq-gpio { 1086*4882a593Smuzhiyun rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 1087*4882a593Smuzhiyun }; 1088*4882a593Smuzhiyun }; 1089*4882a593Smuzhiyun 1090*4882a593Smuzhiyun touchpad { 1091*4882a593Smuzhiyun touchpad_irq_gpio: touchpad-irq-gpio { 1092*4882a593Smuzhiyun rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; 1093*4882a593Smuzhiyun }; 1094*4882a593Smuzhiyun }; 1095*4882a593Smuzhiyun 1096*4882a593Smuzhiyun charger { 1097*4882a593Smuzhiyun charger_ok: charge-ok { 1098*4882a593Smuzhiyun rockchip,pins = 1099*4882a593Smuzhiyun <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 1100*4882a593Smuzhiyun }; 1101*4882a593Smuzhiyun }; 1102*4882a593Smuzhiyun 1103*4882a593Smuzhiyun gpio-leds { 1104*4882a593Smuzhiyun leds_gpio: leds-gpio { 1105*4882a593Smuzhiyun rockchip,pins = 1106*4882a593Smuzhiyun <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, 1107*4882a593Smuzhiyun <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>, 1108*4882a593Smuzhiyun <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 1109*4882a593Smuzhiyun <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, 1110*4882a593Smuzhiyun <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>, 1111*4882a593Smuzhiyun <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, 1112*4882a593Smuzhiyun <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; 1113*4882a593Smuzhiyun }; 1114*4882a593Smuzhiyun }; 1115*4882a593Smuzhiyun 1116*4882a593Smuzhiyun usb2 { 1117*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 1118*4882a593Smuzhiyun rockchip,pins = 1119*4882a593Smuzhiyun <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 1120*4882a593Smuzhiyun }; 1121*4882a593Smuzhiyun }; 1122*4882a593Smuzhiyun 1123*4882a593Smuzhiyun usb_camera { 1124*4882a593Smuzhiyun usb_cam_on_gpio: usb-cam-on-gpio { 1125*4882a593Smuzhiyun rockchip,pins = 1126*4882a593Smuzhiyun <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 1127*4882a593Smuzhiyun <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 1128*4882a593Smuzhiyun }; 1129*4882a593Smuzhiyun }; 1130*4882a593Smuzhiyun 1131*4882a593Smuzhiyun fusb30x { 1132*4882a593Smuzhiyun fusb0_int: fusb0-int { 1133*4882a593Smuzhiyun rockchip,pins = 1134*4882a593Smuzhiyun <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 1135*4882a593Smuzhiyun <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 1136*4882a593Smuzhiyun }; 1137*4882a593Smuzhiyun fusb1_int: fusb1-int { 1138*4882a593Smuzhiyun rockchip,pins = 1139*4882a593Smuzhiyun <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 1140*4882a593Smuzhiyun <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 1141*4882a593Smuzhiyun }; 1142*4882a593Smuzhiyun }; 1143*4882a593Smuzhiyun}; 1144