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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Dqcom,spi-qcom-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm Quad Serial Peripheral Interface (QSPI)
11 - Mukesh Savaliya <msavaliy@codeaurora.org>
12 - Akash Asthana <akashast@codeaurora.org>
14 description: The QSPI controller allows SPI protocol communication in single,
19 - $ref: /spi/spi-controller.yaml#
24 - const: qcom,sdm845-qspi
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dzynq-topic-miami.dts4 * Copyright (C) 2014-2016 Topic Embedded Products
6 * SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
9 #include "zynq-7000.dtsi"
13 compatible = "topic,miami", "xlnx,zynq-7000";
18 spi0 = &qspi;
31 stdout-path = "serial0:115200n8";
35 &qspi {
36 u-boot,dm-pre-reloc;
38 is-dual = <0>;
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H A Dkeystone-k2g-evm.dts10 /dts-v1/;
12 #include "keystone-k2g.dtsi"
15 compatible = "ti,k2g-evm","ti,keystone";
19 stdout-path = &uart0;
30 ethphy0: ethernet-phy@0 {
32 phy-mode = "rgmii-id";
37 phy-handle = <&ethphy0>;
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "spi-flash";
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H A Dzynqmp-zc1751-xm015-dc1.dts2 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
8 * SPDX-License-Identifier: GPL-2.0+
11 /dts-v1/;
14 #include "zynqmp-clk.dtsi"
17 model = "ZynqMP zc1751-xm015-dc1 RevA";
18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
28 spi0 = &qspi;
34 stdout-path = "serial0:115200n8";
46 xlnx,include-sg; /* for testing purpose */
49 xlnx,src-issue = <31>;
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H A Dfsl-ls2088a-rdb-qspi.dts2 * NXP ls2080a RDB board device tree source for QSPI-boot
8 * SPDX-License-Identifier: GPL-2.0+
11 /dts-v1/;
13 #include "fsl-ls2080a.dtsi"
17 compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
20 spi0 = &qspi;
26 bus-num = <0>;
30 #address-cells = <1>;
31 #size-cells = <1>;
32 compatible = "spi-flash";
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H A Dfsl-ls2081a-rdb.dts2 * NXP LS2081A RDB board device tree source for QSPI-boot
8 * SPDX-License-Identifier: GPL-2.0+
11 /dts-v1/;
13 #include "fsl-ls2080a.dtsi"
17 compatible = "fsl,ls2081a-rdb", "fsl,ls2080a";
20 spi0 = &qspi;
26 bus-num = <0>;
30 #address-cells = <1>;
31 #size-cells = <1>;
32 compatible = "spi-flash";
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H A Dstv0991.dts1 /dts-v1/;
6 #address-cells = <1>;
7 #size-cells = <1>;
10 stdout-path = &uart0;
25 spi0 = "/spi@80203000"; /* QSPI */
28 qspi: spi@80203000 { label
29 compatible = "cadence,qspi";
30 #address-cells = <1>;
31 #size-cells = <0>;
35 sram-size = <256>;
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H A Dzynqmp-ep108.dts4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
8 * SPDX-License-Identifier: GPL-2.0+
11 /dts-v1/;
14 #include "zynqmp-ep108-clk.dtsi"
23 spi0 = &qspi;
32 stdout-path = "serial0:115200n8";
51 phy-handle = <&phy0>;
52 phy-mode = "rgmii-id";
55 max-speed = <100>;
65 clock-frequency = <400000>;
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H A Dzynq-picozed.dts6 * SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
9 #include "zynq-7000.dtsi"
13 compatible = "xlnx,zynq-picozed", "xlnx,zynq-7000";
17 spi0 = &qspi;
28 u-boot,dm-pre-reloc;
32 &qspi {
33 u-boot,dm-pre-reloc;
38 u-boot,dm-pre-reloc;
H A Dfsl-ls1046a-rdb.dts2 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
13 /dts-v1/;
14 /include/ "fsl-ls1046a.dtsi"
20 spi0 = &qspi;
25 &qspi {
26 bus-num = <0>;
30 #address-cells = <1>;
31 #size-cells = <1>;
32 compatible = "spi-flash";
33 spi-max-frequency = <50000000>;
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H A Dzynq-zybo.dts4 * Copyright (C) 2011 - 2015 Xilinx
7 * SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
14 compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
19 spi0 = &qspi;
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
36 reset-gpios = <&gpio0 46 1>;
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H A Dzynq-microzed.dts4 * Copyright (C) 2013 - 2016 Xilinx, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
9 #include "zynq-7000.dtsi"
13 compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
17 spi0 = &qspi;
28 stdout-path = "serial0:115200n8";
32 compatible = "usb-nop-xceiv";
33 #phy-cells = <0>;
38 ps-clk-frequency = <33333333>;
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H A Dzynq-zed.dts4 * Copyright (C) 2011 - 2015 Xilinx
7 * SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
14 compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
19 spi0 = &qspi;
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
40 ps-clk-frequency = <33333333>;
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H A Dfsl-ls2080a-qds.dts4 * Copyright 2013-2015 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
11 #include "fsl-ls2080a.dtsi"
15 compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
18 spi0 = &qspi;
24 bus-num = <0>;
28 #address-cells = <1>;
29 #size-cells = <1>;
30 compatible = "spi-flash";
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H A Dzynq-zc770-xm013.dts6 * SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
9 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
19 spi0 = &qspi;
25 stdout-path = "serial0:115200n8";
40 phy-mode = "rgmii-id";
41 phy-handle = <&ethernet_phy>;
43 ethernet_phy: ethernet-phy@7 {
50 clock-frequency = <400000>;
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H A Dzynq-zc770-xm010.dts4 * Copyright (C) 2013 - 2015 Xilinx, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
9 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
19 spi0 = &qspi;
25 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
45 phy-mode = "rgmii-id";
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H A Dzynq-zturn-myir.dts5 * Based on zynq-zed.dts which is:
6 * Copyright (C) 2011 - 2014 Xilinx
18 /dts-v1/;
19 /include/ "zynq-7000.dtsi"
22 model = "Zynq Z-Turn MYIR Board";
23 compatible = "xlnx,zynq-7000";
29 spi0 = &qspi;
39 stdout-path = "serial0:115200n8";
42 gpio-leds {
43 compatible = "gpio-leds";
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H A Dam437x-idk-evm.dts2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
9 /dts-v1/;
12 #include <dt-bindings/pinctrl/am43xx.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
19 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
22 stdout-path = &uart0;
23 tick-timer = &timer2;
26 v24_0d: fixed-regulator-v24_0d {
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H A Dstm32f746-disco.dts2 * Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
3 * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
6 * stm32f469-disco.dts from Linux
7 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
9 * This file is dual-licensed: you can use it either under the terms
48 /dts-v1/;
50 #include <dt-bindings/memory/stm32-sdram.h>
53 model = "STMicroelectronics STM32F746-DISCO board";
54 compatible = "st,stm32f746-disco", "st,stm32f746";
58 stdout-path = "serial0:115200n8";
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H A Dstm32f769-disco.dts2 * Copyright 2016 - Vikas Manocha <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/memory/stm32-sdram.h>
48 model = "STMicroelectronics STM32F769-DISCO board";
49 compatible = "st,stm32f769-disco", "st,stm32f7";
53 stdout-path = "serial0:115200n8";
62 spi0 = &qspi;
79 led-gpio = <&gpioj 5 0>;
84 button-gpio = <&gpioa 0 0>;
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H A Ddra72-evm-common.dtsi2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/clk/ti-dra7-atl.h>
15 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
22 stdout-path = &uart1;
23 tick-timer = &timer2;
26 evm_12v0: fixedregulator-evm12v0 {
28 compatible = "regulator-fixed";
29 regulator-name = "evm_12v0";
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsocfpga_arria10_socdk_qspi.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 &qspi {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "micron,mt25qu02g", "jedec,spi-nor";
17 spi-max-frequency = <100000000>;
19 m25p,fast-read;
20 cdns,page-size = <256>;
21 cdns,block-size = <16>;
[all …]
H A Ddra72-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-ipu-dsp-common.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/ti-dra7-atl.h>
13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
20 stdout-path = &uart1;
23 evm_12v0: fixedregulator-evm12v0 {
25 compatible = "regulator-fixed";
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/brcm/
H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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/OK3568_Linux_fs/buildroot/board/qmtech/zynq/patches/linux/
H A D0001-DTS-for-QMTech-Zynq-starter-kit.patch6 Signed-off-by: Martin Chabot <martin.chabot@gmail.com>
7 Signed-off-by: Julien Olivain <juju@cotds.org>
8 ---
9 arch/arm/boot/dts/zynq-qmtech.dts | 397 ++++++++++++++++++++++++++++++
11 create mode 100644 arch/arm/boot/dts/zynq-qmtech.dts
13 diff --git a/arch/arm/boot/dts/zynq-qmtech.dts b/arch/arm/boot/dts/zynq-qmtech.dts
16 --- /dev/null
17 +++ b/arch/arm/boot/dts/zynq-qmtech.dts
18 @@ -0,0 +1,397 @@
19 +// SPDX-License-Identifier: GPL-2.0+
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