1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com> 3*4882a593Smuzhiyun * Copyright (C) 2017 Alexander Graf <agraf@suse.de> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on zynq-zed.dts which is: 6*4882a593Smuzhiyun * Copyright (C) 2011 - 2014 Xilinx 7*4882a593Smuzhiyun * Copyright (C) 2012 National Instruments Corp. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This software is licensed under the terms of the GNU General Public 10*4882a593Smuzhiyun * License version 2, as published by the Free Software Foundation, and 11*4882a593Smuzhiyun * may be copied, distributed, and modified under those terms. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*4882a593Smuzhiyun * GNU General Public License for more details. 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun/dts-v1/; 19*4882a593Smuzhiyun/include/ "zynq-7000.dtsi" 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun/ { 22*4882a593Smuzhiyun model = "Zynq Z-Turn MYIR Board"; 23*4882a593Smuzhiyun compatible = "xlnx,zynq-7000"; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun aliases { 26*4882a593Smuzhiyun ethernet0 = &gem0; 27*4882a593Smuzhiyun serial0 = &uart1; 28*4882a593Smuzhiyun serial1 = &uart0; 29*4882a593Smuzhiyun spi0 = &qspi; 30*4882a593Smuzhiyun mmc0 = &sdhci0; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun memory { 34*4882a593Smuzhiyun device_type = "memory"; 35*4882a593Smuzhiyun reg = <0x0 0x40000000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun chosen { 39*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun gpio-leds { 43*4882a593Smuzhiyun compatible = "gpio-leds"; 44*4882a593Smuzhiyun led_r { 45*4882a593Smuzhiyun label = "led_r"; 46*4882a593Smuzhiyun gpios = <&gpio0 0x72 0x1>; 47*4882a593Smuzhiyun default-state = "on"; 48*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun led_g { 52*4882a593Smuzhiyun label = "led_g"; 53*4882a593Smuzhiyun gpios = <&gpio0 0x73 0x1>; 54*4882a593Smuzhiyun default-state = "on"; 55*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun led_b { 59*4882a593Smuzhiyun label = "led_b"; 60*4882a593Smuzhiyun gpios = <&gpio0 0x74 0x1>; 61*4882a593Smuzhiyun default-state = "on"; 62*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun usr_led1 { 66*4882a593Smuzhiyun label = "usr_led1"; 67*4882a593Smuzhiyun gpios = <&gpio0 0x0 0x1>; 68*4882a593Smuzhiyun default-state = "off"; 69*4882a593Smuzhiyun linux,default-trigger = "none"; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun usr_led2 { 73*4882a593Smuzhiyun label = "usr_led2"; 74*4882a593Smuzhiyun gpios = <&gpio0 0x9 0x1>; 75*4882a593Smuzhiyun default-state = "off"; 76*4882a593Smuzhiyun linux,default-trigger = "none"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun gpio-beep { 81*4882a593Smuzhiyun compatible = "gpio-beeper"; 82*4882a593Smuzhiyun label = "pl-beep"; 83*4882a593Smuzhiyun gpios = <&gpio0 0x75 0x0>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun gpio-keys { 87*4882a593Smuzhiyun compatible = "gpio-keys"; 88*4882a593Smuzhiyun #address-cells = <0x1>; 89*4882a593Smuzhiyun #size-cells = <0x0>; 90*4882a593Smuzhiyun autorepeat; 91*4882a593Smuzhiyun K1 { 92*4882a593Smuzhiyun label = "K1"; 93*4882a593Smuzhiyun gpios = <&gpio0 0x32 0x1>; 94*4882a593Smuzhiyun linux,code = <0x66>; 95*4882a593Smuzhiyun gpio-key,wakeup; 96*4882a593Smuzhiyun autorepeat; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&clkc { 102*4882a593Smuzhiyun ps-clk-frequency = <33333333>; 103*4882a593Smuzhiyun fclk-enable = <0xf>; 104*4882a593Smuzhiyun}; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun&qspi { 107*4882a593Smuzhiyun u-boot,dm-pre-reloc; 108*4882a593Smuzhiyun status = "okay"; 109*4882a593Smuzhiyun}; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun&gem0 { 112*4882a593Smuzhiyun status = "okay"; 113*4882a593Smuzhiyun phy-mode = "rgmii-id"; 114*4882a593Smuzhiyun phy-handle = <ðernet_phy>; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun ethernet_phy: ethernet-phy@0 { 117*4882a593Smuzhiyun reg = <0x0>; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&sdhci0 { 122*4882a593Smuzhiyun u-boot,dm-pre-reloc; 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&uart0 { 127*4882a593Smuzhiyun u-boot,dm-pre-reloc; 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&uart1 { 132*4882a593Smuzhiyun u-boot,dm-pre-reloc; 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&usb0 { 137*4882a593Smuzhiyun status = "okay"; 138*4882a593Smuzhiyun dr_mode = "host"; 139*4882a593Smuzhiyun}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun&can0 { 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun}; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun&i2c0 { 146*4882a593Smuzhiyun status = "okay"; 147*4882a593Smuzhiyun clock-frequency = <400000>; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun stlm75@49 { 150*4882a593Smuzhiyun status = "okay"; 151*4882a593Smuzhiyun compatible = "lm75"; 152*4882a593Smuzhiyun reg = <0x49>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun adxl345@53 { 156*4882a593Smuzhiyun compatible = "adi,adxl34x", "adxl34x"; 157*4882a593Smuzhiyun reg = <0x53>; 158*4882a593Smuzhiyun interrupt-parent = <&intc>; 159*4882a593Smuzhiyun interrupts = <0x0 0x1e 0x4>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun}; 162