arm/dts/zynqmp-ep108.dts

4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
8  * SPDX-License-Identifier:	GPL-2.0+
11 /dts-v1/;
14 #include "zynqmp-ep108-clk.dtsi"
23 		spi0 = &qspi;
32 		stdout-path = "serial0:115200n8";
51 	phy-handle = <&phy0>;
52 	phy-mode = "rgmii-id";
55 		max-speed = <100>;
65 	clock-frequency = <400000>;
74 	clock-frequency = <400000>;
83 	arasan,has-mdma;
84 	num-cs = <1>;
87 		label = "nand-fsbl-uboot";
91 		label = "nand-linux";
95 		label = "nand-device-tree";
99 		label = "nand-rootfs";
103 		label = "nand-bitstream";
107 		label = "nand-misc";
112 &qspi {
116 		#address-cells = <1>;
117 		#size-cells = <1>;
119 		spi-tx-bus-width = <1>;
120 		spi-rx-bus-width = <4>;
121 		spi-max-frequency = <10000000>;
122 		partition@qspi-fsbl-uboot { /* for testing purpose */
123 			label = "qspi-fsbl-uboot";
126 		partition@qspi-linux { /* for testing purpose */
127 			label = "qspi-linux";
130 		partition@qspi-device-tree { /* for testing purpose */
131 			label = "qspi-device-tree";
134 		partition@qspi-rootfs { /* for testing purpose */
135 			label = "qspi-rootfs";
143 	ceva,broken-gen2;
145 	ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
146 	ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
147 	ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
148 	ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
149 	ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
150 	ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
151 	ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
152 	ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
157 	bus-width = <8>;
168 	num-cs = <1>;
171 		#address-cells = <1>;
172 		#size-cells = <1>;
173 		spi-max-frequency = <50000000>;
185 	num-cs = <1>;
188 		#address-cells = <1>;
189 		#size-cells = <1>;
190 		spi-max-frequency = <50000000>;
211 	maximum-speed = "high-speed";
221 	maximum-speed = "high-speed";
229 	xlnx,max-pclock-frequency = <200000>;
233 	xlnx,axi-clock-freq = <200000000>;