arm/dts/zynqmp-zc1751-xm015-dc1.dts

2  * dts file for Xilinx ZynqMP zc1751-xm015-dc1
8  * SPDX-License-Identifier:	GPL-2.0+
11 /dts-v1/;
14 #include "zynqmp-clk.dtsi"
17 	model = "ZynqMP zc1751-xm015-dc1 RevA";
18 	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
28 		spi0 = &qspi;
34 		stdout-path = "serial0:115200n8";
46 	xlnx,include-sg; /* for testing purpose */
49 	xlnx,src-issue = <31>;
55 	xlnx,src-issue = <4>; /* for testing purpose */
64 	xlnx,include-sg; /* for testing purpose */
73 	xlnx,include-sg; /* for testing purpose */
82 	xlnx,include-sg; /* for testing purpose */
87 	local-mac-address = [00 0a 35 00 02 90];
88 	phy-handle = <&phy0>;
89 	phy-mode = "rgmii-id";
105 	clock-frequency = <400000>;
112 &qspi {
116 		#address-cells = <1>;
117 		#size-cells = <1>;
119 		spi-tx-bus-width = <1>;
120 		spi-rx-bus-width = <4>;
121 		spi-max-frequency = <108000000>; /* Based on DC1 spec */
122 		partition@qspi-fsbl-uboot { /* for testing purpose */
123 			label = "qspi-fsbl-uboot";
126 		partition@qspi-linux { /* for testing purpose */
127 			label = "qspi-linux";
130 		partition@qspi-device-tree { /* for testing purpose */
131 			label = "qspi-device-tree";
134 		partition@qspi-rootfs { /* for testing purpose */
135 			label = "qspi-rootfs";
148 	ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
149 	ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
150 	ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
151 	ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
152 	ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
153 	ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
154 	ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
155 	ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
161 	bus-width = <8>;
168 	no-1-8-v;       /* for 1.0 silicon */
196 	xlnx,vid-clk-pl;