Lines Matching +full:qspi +full:- +full:v1
2 * Copyright 2016 - Vikas Manocha <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/memory/stm32-sdram.h>
48 model = "STMicroelectronics STM32F769-DISCO board";
49 compatible = "st,stm32f769-disco", "st,stm32f7";
53 stdout-path = "serial0:115200n8";
62 spi0 = &qspi;
79 led-gpio = <&gpioj 5 0>;
84 button-gpio = <&gpioa 0 0>;
89 clock-frequency = <25000000>;
96 bias-disable;
97 drive-push-pull;
98 slew-rate = <2>;
102 bias-disable;
117 slew-rate = <2>;
121 qspi_pins: qspi@0 {
129 slew-rate = <2>;
196 slew-rate = <2>;
202 pinctrl-0 = <&usart1_pins_a>;
203 pinctrl-names = "default";
208 pinctrl-0 = <&fmc_pins>;
209 pinctrl-names = "default";
212 /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */
214 st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_32 BANKS_4
217 st,sdram-timing = /bits/ 8 <TMRD_2 TXSR_6 TRAS_4 TRC_6 TWR_2
219 /* refcount = (64msec/total_row_sdram)*freq - 20 */
220 st,sdram-refcount = < 1542 >;
226 pinctrl-0 = <ðernet_mii>;
227 phy-mode = "rmii";
228 phy-handle = <&phy0>;
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "snps,dwmac-mdio";
234 phy0: ethernet-phy@0 {
240 &qspi {
241 pinctrl-0 = <&qspi_pins>;
245 #address-cells = <1>;
246 #size-cells = <1>;
247 compatible = "micron,n25q128a13", "spi-flash";
248 spi-max-frequency = <108000000>;
249 spi-tx-bus-width = <1>;
250 spi-rx-bus-width = <1>;
251 memory-map = <0x90000000 0x1000000>;