Lines Matching +full:qspi +full:- +full:v1
5 * Based on zynq-zed.dts which is:
6 * Copyright (C) 2011 - 2014 Xilinx
18 /dts-v1/;
19 /include/ "zynq-7000.dtsi"
22 model = "Zynq Z-Turn MYIR Board";
23 compatible = "xlnx,zynq-7000";
29 spi0 = &qspi;
39 stdout-path = "serial0:115200n8";
42 gpio-leds {
43 compatible = "gpio-leds";
47 default-state = "on";
48 linux,default-trigger = "heartbeat";
54 default-state = "on";
55 linux,default-trigger = "heartbeat";
61 default-state = "on";
62 linux,default-trigger = "heartbeat";
68 default-state = "off";
69 linux,default-trigger = "none";
75 default-state = "off";
76 linux,default-trigger = "none";
80 gpio-beep {
81 compatible = "gpio-beeper";
82 label = "pl-beep";
86 gpio-keys {
87 compatible = "gpio-keys";
88 #address-cells = <0x1>;
89 #size-cells = <0x0>;
95 gpio-key,wakeup;
102 ps-clk-frequency = <33333333>;
103 fclk-enable = <0xf>;
106 &qspi {
107 u-boot,dm-pre-reloc;
113 phy-mode = "rgmii-id";
114 phy-handle = <ðernet_phy>;
116 ethernet_phy: ethernet-phy@0 {
122 u-boot,dm-pre-reloc;
127 u-boot,dm-pre-reloc;
132 u-boot,dm-pre-reloc;
147 clock-frequency = <400000>;
158 interrupt-parent = <&intc>;