1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Xilinx ZC770 XM013 board DTS 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013 Xilinx, Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "zynq-7000.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; 13*4882a593Smuzhiyun model = "Xilinx Zynq"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun ethernet0 = &gem1; 17*4882a593Smuzhiyun i2c0 = &i2c1; 18*4882a593Smuzhiyun serial0 = &uart0; 19*4882a593Smuzhiyun spi0 = &qspi; 20*4882a593Smuzhiyun spi1 = &spi0; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun chosen { 24*4882a593Smuzhiyun bootargs = ""; 25*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun memory@0 { 29*4882a593Smuzhiyun device_type = "memory"; 30*4882a593Smuzhiyun reg = <0x0 0x40000000>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun}; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun&can1 { 35*4882a593Smuzhiyun status = "okay"; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&gem1 { 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun phy-mode = "rgmii-id"; 41*4882a593Smuzhiyun phy-handle = <ðernet_phy>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun ethernet_phy: ethernet-phy@7 { 44*4882a593Smuzhiyun reg = <7>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun}; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun&i2c1 { 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun clock-frequency = <400000>; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun si570: clock-generator@55 { 53*4882a593Smuzhiyun #clock-cells = <0>; 54*4882a593Smuzhiyun compatible = "silabs,si570"; 55*4882a593Smuzhiyun temperature-stability = <50>; 56*4882a593Smuzhiyun reg = <0x55>; 57*4882a593Smuzhiyun factory-fout = <156250000>; 58*4882a593Smuzhiyun clock-frequency = <148500000>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&qspi { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun&spi0 { 67*4882a593Smuzhiyun status = "okay"; 68*4882a593Smuzhiyun num-cs = <4>; 69*4882a593Smuzhiyun is-decoded-cs = <0>; 70*4882a593Smuzhiyun eeprom: at25@0 { 71*4882a593Smuzhiyun at25,byte-len = <8192>; 72*4882a593Smuzhiyun at25,addr-mode = <2>; 73*4882a593Smuzhiyun at25,page-size = <32>; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun compatible = "atmel,at25"; 76*4882a593Smuzhiyun reg = <2>; 77*4882a593Smuzhiyun spi-max-frequency = <1000000>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&uart0 { 82*4882a593Smuzhiyun u-boot,dm-pre-reloc; 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun}; 85