| /OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 11 ---------
12 The LS1043A integrated multicore processor combines four ARM Cortex-A53
18 - Four 64-bit ARM Cortex-A53 CPUs
19 - 1 MB unified L2 Cache
20 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
22 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
24 - Packet parsing, classification, and distribution (FMan)
25 - Queue management for scheduling, packet sequencing, and congestion
27 - Hardware buffer management for buffer allocation and de-allocation (BMan)
28 - Cryptography acceleration (SEC)
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| /OK3568_Linux_fs/kernel/Documentation/driver-api/memory-devices/ |
| H A D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 GPMC (General Purpose Memory Controller)
7 GPMC is an unified memory controller dedicated to interfacing external
8 memory devices like
14 * Pseudo-SRAM devices
23 GPMC has certain timings that has to be programmed for proper
24 functioning of the peripheral, while peripheral has another set of
25 timings. To have peripheral work with gpmc, peripheral timings has to
26 be translated to the form gpmc can understand. The way it has to be
27 translated depends on the connected peripheral. Also there is a
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| /OK3568_Linux_fs/u-boot/drivers/video/drm/ |
| H A D | drm_mipi_dsi.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
17 * mipi_dsi_attach - attach a DSI device to its DSI host
18 * @dsi: DSI peripheral
22 const struct mipi_dsi_host_ops *ops = dsi->host->ops; in mipi_dsi_attach()
24 if (!ops || !ops->attach) in mipi_dsi_attach()
25 return -ENOSYS; in mipi_dsi_attach()
27 return ops->attach(dsi->host, dsi); in mipi_dsi_attach()
31 * mipi_dsi_detach - detach a DSI device from its DSI host
32 * @dsi: DSI peripheral
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iommu/ |
| H A D | samsung,sysmmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit)
10 - Marek Szyprowski <m.szyprowski@samsung.com>
14 physical memory chunks visible as a contiguous region to DMA-capable peripheral
15 devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
17 System MMU is an IOMMU and supports identical translation table format to
20 another capabilities like L2 TLB or block-fetch buffers to minimize translation
23 System MMUs are in many to one relation with peripheral devices, i.e. single
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/ |
| H A D | atmel-xdma.txt | 1 * Atmel Extensible Direct Memory Access Controller (XDMAC)
5 - compatible: Should be "atmel,sama5d4-dma" or "microchip,sam9x60-dma".
6 - reg: Should contain DMA registers location and length.
7 - interrupts: Should contain DMA interrupt.
8 - #dma-cells: Must be <1>, used to represent the number of integer cells in
10 - The 1st cell specifies the channel configuration register:
11 - bit 13: SIF, source interface identifier, used to get the memory
13 - bit 14: DIF, destination interface identifier, used to get the peripheral
15 - bit 30-24: PERID, peripheral identifier.
19 dma1: dma-controller@f0004000 {
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| H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
11 supporting 8 independent DMA channels. Each channel can have up to 8 requests.
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
19 -bit 9: Peripheral Increment Address
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| H A D | fsl-imx-sdma.txt | 1 * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
4 - compatible : Should be one of
5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx8mq-sdma"
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| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.arm-caches | 1 Disabling I-cache:
2 - Set CONFIG_SYS_ICACHE_OFF
4 Disabling D-cache:
5 - Set CONFIG_SYS_DCACHE_OFF
7 Enabling I-cache:
8 - Make sure CONFIG_SYS_ICACHE_OFF is not set and call icache_enable().
10 Enabling D-cache:
11 - Make sure CONFIG_SYS_DCACHE_OFF is not set and call dcache_enable().
14 - Implement enable_caches() for your platform and enable the I-cache and
15 D-cache from this function. This function is called immediately
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/ |
| H A D | drm_mipi_dsi.c | 4 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
43 * These functions contain some common logic and helpers to deal with MIPI DSI
59 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
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| /OK3568_Linux_fs/kernel/Documentation/driver-api/ |
| H A D | sm501.rst | 15 ----
27 peripheral set as platform devices for the specific drivers.
29 The core re-uses the platform device system as the platform device
30 system provides enough features to support the drivers without the
31 need to create a new bus-type and the associated code to go with it.
35 ---------
37 Each peripheral has a view of the device which is implicitly narrowed to
38 the specific set of resources that peripheral requires in order to
41 The centralised memory allocation allows the driver to ensure that the
42 maximum possible resource allocation can be made to the video subsystem
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| H A D | spi.rst | 1 Serial Peripheral Interface (SPI)
4 SPI is the "Serial Peripheral Interface", widely used with embedded
7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
11 words of various sizes on the way to and from system memory. An
12 additional chipselect line is usually active-low (nCS); four signals are
13 normally used for each peripheral, plus sometimes an interrupt.
15 The SPI bus facilities listed here provide a generalized interface to
16 declare SPI busses and devices, manage them according to the standard
18 only "master" side interfaces are supported, where Linux talks to SPI
19 peripherals and does not implement such a peripheral itself. (Interfaces
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| /OK3568_Linux_fs/kernel/drivers/dma/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
12 used to offload memory copies in the network stack and
103 tristate "Analog Devices AXI-DMAC DMA support"
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
125 has the capability to offload memcpy, xor and pq computation
129 bool "ST-Ericsson COH901318 DMA support"
133 Enable support for ST-Ericsson COH 901 318 DMA.
148 If you have a board based on such a SoC and wish to use DMA for
152 tristate "SA-11x0 DMA support"
157 Support the DMA engine found on Intel StrongARM SA-1100 and
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| /OK3568_Linux_fs/kernel/drivers/firmware/ |
| H A D | qcom_scm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
17 #include <linux/reset-controller.h>
18 #include <linux/arm-smccc.h>
87 ret = clk_prepare_enable(__scm->core_clk); in qcom_scm_clk_enable()
91 ret = clk_prepare_enable(__scm->iface_clk); in qcom_scm_clk_enable()
95 ret = clk_prepare_enable(__scm->bus_clk); in qcom_scm_clk_enable()
102 clk_disable_unprepare(__scm->iface_clk); in qcom_scm_clk_enable()
104 clk_disable_unprepare(__scm->core_clk); in qcom_scm_clk_enable()
111 clk_disable_unprepare(__scm->core_clk); in qcom_scm_clk_disable()
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| /OK3568_Linux_fs/kernel/drivers/clk/qcom/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
28 Say Y if you want to support higher CPU frequencies on MSM8916
37 Say Y if you want to support CPU frequency scaling on devices
46 Say Y if you want to support CPU clock scaling using CPUfreq
55 managing the shared SoC resources in order to keep the lowest power
57 memory and accepts clock requests, aggregates the requests and turns
59 Say Y if you want to support the clocks exposed by the RPM on
68 managing the shared SoC resources in order to keep the lowest power
70 memory and accepts clock requests, aggregates the requests and turns
72 Say Y if you want to support the clocks exposed by the RPM on
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | sama5d2.h | 2 * Chip-specific header file for the SAMA5D2 SoC
7 * SPDX-License-Identifier: GPL-2.0+
14 * definitions to be used in other places
19 * Peripheral identifiers/interrupts.
35 #define ATMEL_ID_MATRIX1 14 /* H32MX, 32-bit AHB Matrix */
36 #define ATMEL_ID_MATRIX0 15 /* H64MX, 64-bit AHB Matrix */
38 #define ATMEL_ID_HSMC 17 /* Multi-bit ECC interrupt */
50 #define ATMEL_ID_TWIHS0 29 /* Two-wire Interface 0 */
51 #define ATMEL_ID_TWIHS1 30 /* Two-wire Interface 1 */
52 #define ATMEL_ID_SDMMC0 31 /* Secure Data Memory Card Controller 0 */
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| H A D | sama5d4.h | 2 * Chip-specific header file for the SAMA5D4 SoC
7 * SPDX-License-Identifier: GPL-2.0+
14 * defines to be used in other places
19 * Peripheral identifiers/interrupts.
37 #define ATMEL_ID_MATRIX1 17 /* H32MX, 32-bit AHB Matrix */
38 #define ATMEL_ID_MATRIX0 18 /* H64MX, 64-bit AHB Matrix */
41 #define ATMEL_ID_SMC 22 /* Multi-bit ECC interrupt */
51 #define ATMEL_ID_TWI0 32 /* Two-Wire Interface 0 */
52 #define ATMEL_ID_TWI1 33 /* Two-Wire Interface 1 */
53 #define ATMEL_ID_TWI2 34 /* Two-Wire Interface 2 */
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/txx9/ |
| H A D | dmac.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 * struct txx9dmac_platform_data - Controller configuration parameters
24 * struct txx9dmac_chan_platform_data - Channel configuration parameters
32 * struct txx9dmac_slave - Controller-specific information about a slave
34 * memory-to-peripheral transfers
36 * peripheral-to-memory transfers
37 * @reg_width: peripheral register width
|
| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/ |
| H A D | clock.c | 3 * (C) Copyright 2010-2015
6 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch-tegra/clk_rst.h>
17 #include <asm/arch-tegra/timer.h>
23 * peripheral clocks, and in most cases there are four options for the clock
30 * clock supplied to the SOC from an external oscillator. The latter is the
31 * memory clock PLL.
41 CLOCK_TYPE_PCMT16, /* CLOCK_TYPE_PCMT with 16-bit divider */
46 CLOCK_TYPE_NONE = -1, /* invalid clock type */
63 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO) },
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| /OK3568_Linux_fs/u-boot/board/freescale/t1040qds/ |
| H A D | README | 2 --------
7 ------------------
8 The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
9 processor cores with high-performance data path acceleration architecture
10 and network peripheral interfaces required for networking & telecommunications.
14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
16 - Interconnect CoreNet platform
17 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
19 - Data Path Acceleration Architecture (DPAA) incorporating acceleration
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| /OK3568_Linux_fs/u-boot/drivers/usb/gadget/ |
| H A D | Kconfig | 3 # (a) a peripheral controller, and
6 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
8 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
9 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
10 # - Some systems have both kinds of controllers.
12 # With help from a special transceiver and a "Mini-AB" jack, systems with
13 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
20 host (such as a PC) controlling up to 127 peripheral devices.
21 The USB hardware is asymmetric, which makes it easier to set up:
22 you can't connect a "to-the-host" connector to a peripheral.
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra114/ |
| H A D | clock.c | 2 * (C) Copyright 2010-2015
5 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch-tegra/clk_rst.h>
16 #include <asm/arch-tegra/timer.h>
22 * peripheral clocks, and in most cases there are four options for the clock
29 * clock supplied to the SOC from an external oscillator. The latter is the
30 * memory clock PLL.
48 CLOCK_TYPE_NONE = -1, /* invalid clock type */
60 * The extra column in each clock source array is used to store the mask
68 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),
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| /OK3568_Linux_fs/kernel/arch/powerpc/platforms/chrp/ |
| H A D | gg2.h | 2 * include/asm-ppc/gg2.h -- VLSI VAS96011/12 `Golden Gate 2' register definitions
11 * This file is subject to the terms and conditions of the GNU General Public
20 * Memory Map (CHRP mode)
23 #define GG2_PCI_MEM_BASE 0xc0000000 /* Peripheral memory space */
24 #define GG2_ISA_MEM_BASE 0xf7000000 /* Peripheral memory alias */
25 #define GG2_ISA_IO_BASE 0xf8000000 /* Peripheral I/O space */
|
| /OK3568_Linux_fs/kernel/drivers/usb/gadget/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
23 PC) controlling up to 127 peripheral devices.
24 The USB hardware is asymmetric, which makes it easier to set up:
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra30/ |
| H A D | clock.c | 2 * (C) Copyright 2010-2015
5 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch-tegra/clk_rst.h>
16 #include <asm/arch-tegra/timer.h>
22 * peripheral clocks, and in most cases there are four options for the clock
29 * clock supplied to the SOC from an external oscillator. The latter is the
30 * memory clock PLL.
48 CLOCK_TYPE_NONE = -1, /* invalid clock type */
60 * The extra column in each clock source array is used to store the mask
68 { CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),
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| /OK3568_Linux_fs/kernel/drivers/reset/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
84 Say Y to control the reset signals provided by reset controller.
107 tristate "Meson Audio Memory Arbiter Reset Driver"
110 This enables the reset driver for Audio Memory Arbiter of
134 for Qualcomm SDM845 SoCs. Say Y if you want to control
144 to control reset signals provided by PDC for Modem, Compute,
152 Raspberry Pi 4's co-processor controls some of the board's HW
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