1*4882a593Smuzhiyun* Atmel Extensible Direct Memory Access Controller (XDMAC) 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun* XDMA Controller 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible: Should be "atmel,sama5d4-dma" or "microchip,sam9x60-dma". 6*4882a593Smuzhiyun- reg: Should contain DMA registers location and length. 7*4882a593Smuzhiyun- interrupts: Should contain DMA interrupt. 8*4882a593Smuzhiyun- #dma-cells: Must be <1>, used to represent the number of integer cells in 9*4882a593Smuzhiyunthe dmas property of client devices. 10*4882a593Smuzhiyun - The 1st cell specifies the channel configuration register: 11*4882a593Smuzhiyun - bit 13: SIF, source interface identifier, used to get the memory 12*4882a593Smuzhiyun interface identifier, 13*4882a593Smuzhiyun - bit 14: DIF, destination interface identifier, used to get the peripheral 14*4882a593Smuzhiyun interface identifier, 15*4882a593Smuzhiyun - bit 30-24: PERID, peripheral identifier. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyundma1: dma-controller@f0004000 { 20*4882a593Smuzhiyun compatible = "atmel,sama5d4-dma"; 21*4882a593Smuzhiyun reg = <0xf0004000 0x200>; 22*4882a593Smuzhiyun interrupts = <50 4 0>; 23*4882a593Smuzhiyun #dma-cells = <1>; 24*4882a593Smuzhiyun}; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun* DMA clients 28*4882a593SmuzhiyunDMA clients connected to the Atmel XDMA controller must use the format 29*4882a593Smuzhiyundescribed in the dma.txt file, using a one-cell specifier for each channel. 30*4882a593SmuzhiyunThe two cells in order are: 31*4882a593Smuzhiyun1. A phandle pointing to the DMA controller. 32*4882a593Smuzhiyun2. Channel configuration register. Configurable fields are: 33*4882a593Smuzhiyun - bit 13: SIF, source interface identifier, used to get the memory 34*4882a593Smuzhiyun interface identifier, 35*4882a593Smuzhiyun - bit 14: DIF, destination interface identifier, used to get the peripheral 36*4882a593Smuzhiyun interface identifier, 37*4882a593Smuzhiyun - bit 30-24: PERID, peripheral identifier. 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunExample: 40*4882a593Smuzhiyun 41*4882a593Smuzhiyuni2c2: i2c@f8024000 { 42*4882a593Smuzhiyun compatible = "atmel,at91sam9x5-i2c"; 43*4882a593Smuzhiyun reg = <0xf8024000 0x4000>; 44*4882a593Smuzhiyun interrupts = <34 4 6>; 45*4882a593Smuzhiyun dmas = <&dma1 46*4882a593Smuzhiyun (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 47*4882a593Smuzhiyun | AT91_XDMAC_DT_PERID(6))>, 48*4882a593Smuzhiyun <&dma1 49*4882a593Smuzhiyun (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 50*4882a593Smuzhiyun | AT91_XDMAC_DT_PERID(7))>; 51*4882a593Smuzhiyun dma-names = "tx", "rx"; 52*4882a593Smuzhiyun}; 53