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Searched full:cfg_tzdram_start (Results 1 – 25 of 52) sorted by relevance

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/optee_os/core/arch/arm/plat-mediatek/
H A Dconf.mk25 CFG_TZDRAM_START ?= 0xbe000000
36 CFG_TZDRAM_START ?= 0x43200000
38 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
45 CFG_TZDRAM_START ?= 0x4fd00000
47 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
56 CFG_TZDRAM_START ?= 0x4fd00000
58 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
68 CFG_TZDRAM_START ?= 0x43200000
70 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
80 CFG_TZDRAM_START ?= 0x43200000
[all …]
/optee_os/core/arch/arm/include/mm/
H A Dgeneric_ram_layout.h15 * CFG_TZDRAM_START
26 * CFG_TZSRAM_START If no set, emulated at CFG_TZDRAM_START
58 * of CFG_TZDRAM_START/_SIZE.
64 * +----------------------------------+ <-- CFG_TZDRAM_START
70 * +----------------------------------+ <-- CFG_TZDRAM_START + CFG_TZDRAM_SIZE
79 * +----------------------------------+ <-- CFG_TZDRAM_START
88 * +----------------------------------+ <-+ CFG_TZDRAM_START + CFG_TZDRAM_SIZE
101 * +----------------------------------+ <- CFG_TZDRAM_START
106 * +----------------------------------+ <-+ CFG_TZDRAM_START + CFG_TZDRAM_SIZE
141 #ifdef CFG_TZDRAM_START
[all …]
/optee_os/core/arch/arm/plat-marvell/
H A Dconf.mk6 $(call force,CFG_TZDRAM_START,0x04400000)
20 $(call force,CFG_TZDRAM_START,0x04400000)
36 $(call force,CFG_TZDRAM_START,0x00001000)
55 $(call force,CFG_TZDRAM_START,0x00001000)
74 $(call force,CFG_TZDRAM_START,0x00001000)
92 $(call force,CFG_TZDRAM_START,0x00001000)
109 $(call force,CFG_TZDRAM_START,0x00001000)
126 $(call force,CFG_TZDRAM_START,0x00001000)
143 $(call force,CFG_TZDRAM_START,0x00001000)
160 $(call force,CFG_TZDRAM_START,0x00001000)
[all …]
/optee_os/core/arch/arm/plat-rockchip/
H A Dconf.mk17 CFG_TZDRAM_START ?= 0x68400000
35 CFG_TZDRAM_START ?= 0x30000000
51 CFG_TZDRAM_START ?= 0x30000000
67 CFG_TZDRAM_START ?= 0x30000000
/optee_os/core/arch/arm/plat-sam/
H A Dconf.mk51 $(call force,CFG_TZDRAM_START,0x60000000)
54 $(call force,CFG_TZDRAM_START,0x20000000)
64 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + 0x1000000)
67 CFG_SCMI_SHMEM_START ?= ($(CFG_TZDRAM_START) + 0x1400000)
73 CFG_DT_ADDR ?= ($(CFG_TZDRAM_START) + 0x1500000)
/optee_os/core/arch/arm/plat-totalcompute/
H A Dconf.mk32 CFG_TZDRAM_START ?= 0xfd000000
35 CFG_TZDRAM_START ?= 0xfd284000
39 CFG_TZDRAM_START ?= 0xff000000
/optee_os/core/arch/arm/plat-k3/
H A Dconf.mk11 CFG_TZDRAM_START ?= 0x80200000
15 CFG_TZDRAM_START ?= 0x9e800000
20 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
/optee_os/core/arch/arm/plat-vexpress/
H A Dconf.mk73 CFG_TZDRAM_START ?= 0x06281000
76 CFG_TZDRAM_START ?= 0x06000000
96 CFG_TZDRAM_START ?= 0xff000000
113 CFG_TZDRAM_START ?= 0x0e100000
150 CFG_TZDRAM_START ?= 0x0e100000
/optee_os/core/arch/arm/plat-sunxi/
H A Dconf.mk23 CFG_TZDRAM_START ?= 0x5c000000
33 CFG_TZDRAM_START ?= 0x40000000
/optee_os/core/arch/arm/plat-stm/
H A Dconf.mk41 CFG_TZDRAM_START ?= ($(CFG_DDR_TEETZ_RESERVED_START))
45 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
/optee_os/core/arch/arm/plat-aspeed/
H A Dconf.mk17 CFG_TZDRAM_START ?= 0xb0000000
41 CFG_TZDRAM_START ?= 0x430080000
H A Dplatform_ast2600.c98 CFG_TZDRAM_START + CFG_TZDRAM_SIZE - 1); in plat_primary_init_early()
100 CFG_TZDRAM_START | BIT(0)); in plat_primary_init_early()
/optee_os/core/arch/arm/plat-bcm/
H A Dconf.mk14 CFG_TZDRAM_START ?= 0x8e000000
16 CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) - $(CFG_SHMEM_SIZE))
/optee_os/core/arch/arm/plat-uniphier/
H A Dplatform_config.h38 * 0x8108_0000 [CFG_TZDRAM_START] - |
52 #define CFG_TEE_LOAD_ADDR CFG_TZDRAM_START
/optee_os/core/arch/arm/plat-telechips/
H A Dplat_tzc.c19 .base = CFG_TZDRAM_START - DRAM0_BASE, in tzc_protect_teeos()
20 .top = (CFG_TZDRAM_START + CFG_TZDRAM_SIZE - 1) - DRAM0_BASE, in tzc_protect_teeos()
H A Dlink.mk9 $(CFG_TZDRAM_START) $(PLATFORM_FLAVOR)
/optee_os/core/arch/arm/plat-rcar/
H A Dlink.mk3 SRECFLAGS ?= --srec-forceS3 --adjust-vma=$(CFG_TZDRAM_START)
/optee_os/core/arch/arm/plat-amlogic/
H A Dconf.mk7 CFG_TZDRAM_START ?= 0x05300000
/optee_os/core/arch/arm/plat-synquacer/
H A Dconf.mk10 CFG_TZDRAM_START ?= 0xfc000000
/optee_os/core/arch/arm/plat-rpi5/
H A Dconf.mk11 CFG_TZDRAM_START ?= 0x1D000000
/optee_os/core/arch/arm/plat-imx/
H A Dlink.mk8 $(q)ADDR=`printf 0x%x $$(($(subst UL,,$(CFG_TZDRAM_START))))`; \
/optee_os/core/arch/arm/plat-ls/
H A Dconf.mk106 CFG_TZDRAM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_TEE_OS_DRAM0_SIZE)
114 CFG_TZDRAM_START ?= ((CFG_DRAM0_BASE + CFG_DRAM0_SIZE) - CFG_TEE_OS_DRAM0_SIZE)
/optee_os/core/arch/arm/plat-rzn1/
H A Dconf.mk19 CFG_TZDRAM_START ?= 0x88000000
/optee_os/core/arch/arm/plat-d06/
H A Dconf.mk28 CFG_TZDRAM_START ?= 0x20C0000000
/optee_os/core/arch/arm/plat-qcom/
H A Dconf.mk22 CFG_TZDRAM_START ?= 0x1c300000

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