plat-vexpress: add QEMU sbsa-ref platform

Add support for the QEMU sbsa-ref platform. This platform is similar to
the QEMU virt platform, but with different memory configuration and
device addresses

plat-vexpress: add QEMU sbsa-ref platform

Add support for the QEMU sbsa-ref platform. This platform is similar to
the QEMU virt platform, but with different memory configuration and
device addresses.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: qemu-v8: fix CFG_CORE_CLUSTER_SHIFT

QEMU virt puts 8 or 16 CPUs in each cluster, depending on the GIC
configuration [1]. So set CFG_CORE_CLUSTER_SHIFT to match the GIC
configuration t

plat-vexpress: qemu-v8: fix CFG_CORE_CLUSTER_SHIFT

QEMU virt puts 8 or 16 CPUs in each cluster, depending on the GIC
configuration [1]. So set CFG_CORE_CLUSTER_SHIFT to match the GIC
configuration to calculate core position correctly for more than 16
CPUs.

Link: https://gitlab.com/qemu-project/qemu/-/blob/v10.0.0/hw/arm/virt.c?ref_type=tags#L1785-1789 [1]
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a)

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core: panic: allow core halting on SGI in other cases than panic()

There may be cases where we want to halt several cores outside of a
panic() sequence.

Therefore, add CFG_MULTI_CORE_HALTING switch

core: panic: allow core halting on SGI in other cases than panic()

There may be cases where we want to halt several cores outside of a
panic() sequence.

Therefore, add CFG_MULTI_CORE_HALTING switch that allows to register
an interrupt handler for the CFG_HALT_CORES_SGI that is dedicated to
halt other cores.

This reduces the scope of CFG_HALT_CORES_ON_PANIC that is now used only
for halting other cores in a panic() sequence.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when

vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when
pager is enabled. For example, without this change the command
"time xtest regression_1006" takes around 3 minutes on my build machine,
but it takes only 9 seconds with the increased TZSRAM. Similarly, the
same test on the GitHub CI runners needs 10 minutes before the change
and only 15 seconds after.

This is related to commit 46fdfeea761f ("vexpress-qemu_armv8a: increase
CFG_CORE_HEAP_SIZE to 131072") and commit b4ed37a8c754 ("plat-vexpress:
increase QEMU heap size") which effectively took away 64K + 64KB from
the pager.

This is expected to solve the occasional timeouts that we see occurring
with the QEMUv8_check1 CI job.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: increase QEMU heap size

The core heap usage is increased by around 20kB with fTPM enabled so it
makes sense if this has to be compensated.

Increase heap size for the QEMU variants:
-

plat-vexpress: increase QEMU heap size

The core heap usage is increased by around 20kB with fTPM enabled so it
makes sense if this has to be compensated.

Increase heap size for the QEMU variants:
- QEMU v7 from 64kB to 96kB
- QEMU v8 from 128kB to 192kB

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-vexpress: conf: default enable CFG_PKCS11_TA_RSA_X_509

Default enable PKCS#11 TA config switch CFG_PKCS11_TA_RSA_X_509 to
embed this feature in the TA test environment. Raw RSA is no more
a rec

plat-vexpress: conf: default enable CFG_PKCS11_TA_RSA_X_509

Default enable PKCS#11 TA config switch CFG_PKCS11_TA_RSA_X_509 to
embed this feature in the TA test environment. Raw RSA is no more
a recommended feature but can be required for some TLS v1.2
feature support. Therefore CFG_PKCS11_TA_RSA_X_509 has been disable
in PKCS#11 TA default configuration but should still be supported
hence we enable it in vexpress platforms that are intended to
test and development environments.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE to 512 kB

Set the default emulated SRAM to 512 kB since the default 448 kB isn't
enough to build with CFG_CORE_ASLR=y with a margin.

Signed-

vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE to 512 kB

Set the default emulated SRAM to 512 kB since the default 448 kB isn't
enough to build with CFG_CORE_ASLR=y with a margin.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core/scmi: export sub.mk files in SCP-firmware

In order to ease the update of makefile when C or Header files of
SCP-firmware project changes, we integrate them in the optee subdirectory
of SCP-firm

core/scmi: export sub.mk files in SCP-firmware

In order to ease the update of makefile when C or Header files of
SCP-firmware project changes, we integrate them in the optee subdirectory
of SCP-firmware.

sub-optee-fvp.mk and sub-optee-stm32mp1.mk are moved unchanged in their
product directories of SCP-repository.

scmi-server/sub.mk is split:
- macro and compilation flags stay in optee-os
- srcs and incdirs are moved in product/optee directory

All modules and products related to optee are located in the
product/optee directory in the SCP-firmware repository, adding an "optee-"
prefix in the product name is useless. Remove it.

the ci will temporary point to the sha1 of the merged MR branch of
SCP-firmware. This will be replaced with next SCP-firmware tag v2.15.0
once released.

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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vexpress-qemu_armv8a: increase CFG_CORE_HEAP_SIZE to 131072

Set the default core heap size for QEMUv8 to 128K because 64K is not
enough to complete the "make check" test with CFG_RPMB_FS=y
CFG_RPMB_

vexpress-qemu_armv8a: increase CFG_CORE_HEAP_SIZE to 131072

Set the default core heap size for QEMUv8 to 128K because 64K is not
enough to complete the "make check" test with CFG_RPMB_FS=y
CFG_RPMB_WRITE_KEY=y.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: configure CFG_CORE_ASYNC_NOTIF_GIC_INTID

When compiled for SPMC at S-EL1 (CFG_CORE_SEL1_SPMC=y), configure
CFG_CORE_ASYNC_NOTIF_GIC_INTID to an unused secure SGI that can be
donated t

plat-vexpress: configure CFG_CORE_ASYNC_NOTIF_GIC_INTID

When compiled for SPMC at S-EL1 (CFG_CORE_SEL1_SPMC=y), configure
CFG_CORE_ASYNC_NOTIF_GIC_INTID to an unused secure SGI that can be
donated to the normal world.

In boot_primary_init_intc(), only donate the interrupt id if it's in the
predefined secure SGI range.

Fixes: 462028ede02d ("qemu_armv8a: add GIC v3 redistributor base address")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: use CFG_AUTO_MAX_PA_BITS on virtual platforms

By default set CFG_AUTO_MAX_PA_BITS=y on the virtual platforms fvp and
qemu_armv8a to allow automatic configuration of the maximal suppor

plat-vexpress: use CFG_AUTO_MAX_PA_BITS on virtual platforms

By default set CFG_AUTO_MAX_PA_BITS=y on the virtual platforms fvp and
qemu_armv8a to allow automatic configuration of the maximal supported
physical address.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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qemu_armv8a: enable testing of notifications using the console

When asynchronous notifications are enabled the console driver in
qemu_armv8a is configured as a top half and bottom half driver allowi

qemu_armv8a: enable testing of notifications using the console

When asynchronous notifications are enabled the console driver in
qemu_armv8a is configured as a top half and bottom half driver allowing
basic testing of the notification framework.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: relax CFG_ASAN_SHADOW_OFFSET configuration value

Fixes CFG_ASAN_SHADOW_OFFSET configuration value for vexpress
platform qemu* flavors. Before this change CFG_ASAN_SHADOW_OFFSET
variab

plat-vexpress: relax CFG_ASAN_SHADOW_OFFSET configuration value

Fixes CFG_ASAN_SHADOW_OFFSET configuration value for vexpress
platform qemu* flavors. Before this change CFG_ASAN_SHADOW_OFFSET
variable needed a specific scope to override the default value set
by platform conf.mk file.

Fixes: 24475b562b81 ("plat-vexpress: move CFG_TEE_CORE_NB_CORE to platform conf.mk")
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: relax CFG_TEE_CORE_NB_CORE configuration value

Fixes CFG_TEE_CORE_NB_CORE configuration value for all vexpress
platform flavors. Before this change CFG_TEE_CORE_NB_CORE variable
neede

plat-vexpress: relax CFG_TEE_CORE_NB_CORE configuration value

Fixes CFG_TEE_CORE_NB_CORE configuration value for all vexpress
platform flavors. Before this change CFG_TEE_CORE_NB_CORE variable
needed a specific scope to override the default value set by platform
conf.mk file.

Fixes: 24475b562b81 ("plat-vexpress: move CFG_TEE_CORE_NB_CORE to platform conf.mk")
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-vexpress: activate CFG_CORE_HALT_CORES_ON_PANIC

Default halt the other cores when panicking on fvp, juno, qemu_virt and
qemu_armv8a platforms.

Signed-off-by: Gatien Chevallier <gatien.chevalli

plat-vexpress: activate CFG_CORE_HALT_CORES_ON_PANIC

Default halt the other cores when panicking on fvp, juno, qemu_virt and
qemu_armv8a platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a)
Tested-by: Gatien Chevallier <gatien.chevallier@foss.st.com> (vexpress-qemu_armv8a)
Tested-by: Gatien Chevallier <gatien.chevallier@foss.st.com> (vexpress-qemu_virt)

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qemu_armv8a: define CFG_ASAN_SHADOW_OFFSET

Sets the proper value for CFG_ASAN_SHADOW_OFFSET in order to enable
CFG_CORE_SANITIZE_KADDRESS=y.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro

qemu_armv8a: define CFG_ASAN_SHADOW_OFFSET

Sets the proper value for CFG_ASAN_SHADOW_OFFSET in order to enable
CFG_CORE_SANITIZE_KADDRESS=y.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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qemu_armv8a: fix build with CFG_USER_TA_TARGETS=ta_arm32

The proper way to build in-tree TAs in 64-bit mode by default is to set
supported-ta-targets to "ta_arm64 ta_arm32". Indeed, the default targ

qemu_armv8a: fix build with CFG_USER_TA_TARGETS=ta_arm32

The proper way to build in-tree TAs in 64-bit mode by default is to set
supported-ta-targets to "ta_arm64 ta_arm32". Indeed, the default target
is always defined as the first entry in supported-ta-targets, as
documented in mk/config.mk.

Fixes the following build error:

$ make CFG_USER_TA_TARGETS=ta_arm32 PLATFORM=vexpress-qemu_armv8a
bash: -W: invalid option
...

default-user-ta-target is not to be used by the platform configuration
files. It is meant to be set by the main Makefile. For this reason,
replace the conditional assignment (?=) with $(call force, ...) in order
to catch inconsistencies in a more friendly way.

Fixes: 07031b23de23 ("qemu_armv8a: set default-user-ta-target ?= ta_arm64")
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: enable CFG_PCKS11_TA by default

Enable the PKCS#11 TA in plat-vexpress for easier testing (such as in
CI). With this, the PKCS#11 in-tree TA is built with optee_os and
CFG_PKCS11_TA i

plat-vexpress: enable CFG_PCKS11_TA by default

Enable the PKCS#11 TA in plat-vexpress for easier testing (such as in
CI). With this, the PKCS#11 in-tree TA is built with optee_os and
CFG_PKCS11_TA is exported in the host_include folder of the TA dev kit
(host_include/conf.{mk,h,cmake}) where optee_test will find it and
also enable the PKCS#11 tests.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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qemu_armv8a: set default-user-ta-target ?= ta_arm64

Update platform vexpress-qemu_armv8a to build in-tree TAs in 64 bit
mode (ta_arm64) by default instead of 32-bit. This makes more sense
because th

qemu_armv8a: set default-user-ta-target ?= ta_arm64

Update platform vexpress-qemu_armv8a to build in-tree TAs in 64 bit
mode (ta_arm64) by default instead of 32-bit. This makes more sense
because that is the default setting in the OP-TEE development/test
environment [1].

Link: [1] https://github.com/OP-TEE/build/blob/3.20.0/qemu_v8.mk#L8
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: S-EL2 SPMC: update for hafnium

Updates needed to run with Hafnium as S-EL2 SPMC on QEMU. GIC and
reserved (static) shared is not supported, so disable it for
CFG_CORE_SEL2_SPMC=y.

Wi

plat-vexpress: S-EL2 SPMC: update for hafnium

Updates needed to run with Hafnium as S-EL2 SPMC on QEMU. GIC and
reserved (static) shared is not supported, so disable it for
CFG_CORE_SEL2_SPMC=y.

With S-EL2 on QEMU some secure memory must be set aside for Hafnium.
Since this depends on how Hafnium is compiled etc don't assume which
address range can be used by OP-TEE, instead leave that as an open
configuration option.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: fvp and qemuv8a support building with CFG_SCMI_SCPFW=y

Adds support for CFG_SCMI_SCPFW to platform flavors vexpress-fvp and
vexpress-qemuv8a. Both rely on the same SCP-firmware so-cal

plat-vexpress: fvp and qemuv8a support building with CFG_SCMI_SCPFW=y

Adds support for CFG_SCMI_SCPFW to platform flavors vexpress-fvp and
vexpress-qemuv8a. Both rely on the same SCP-firmware so-called product
configuration named "optee-fvp".

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-vexpress: juno: default enable hwrng from smccc trng interface

Changes juno default configuration to get random bytes from TF-A
SMCCC TRNG interface instead of the pseudo-RNG support form OP-TE

plat-vexpress: juno: default enable hwrng from smccc trng interface

Changes juno default configuration to get random bytes from TF-A
SMCCC TRNG interface instead of the pseudo-RNG support form OP-TEE.

Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y

Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the
common file core/arch/arm/arm.mk instead of leaving it to the platfo

core: arm.mk: set CFG_WITH_LPAE=y when CFG_ARCH64_core=y

Since CFG_WITH_LPAE=y is mandatory when CFG_ARCH64_core=y, set it in the
common file core/arch/arm/arm.mk instead of leaving it to the platforms.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-vexpress: embed dt_driver test in qemu_virt and qemu_armv8a

Default embeds DT_DRIVER probing test with companion DTS file in
vexpress qemu_virt and qemu_armv8a. These platforms do not embed
any

plat-vexpress: embed dt_driver test in qemu_virt and qemu_armv8a

Default embeds DT_DRIVER probing test with companion DTS file in
vexpress qemu_virt and qemu_armv8a. These platforms do not embed
any DTB so we can set straight CFG_EMBED_DTB_SOURCE_FILE.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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qemu: enable testing of notifications using the console

When asynchronous notifications are enabled the console driver in qemu
is configured as a top half and bottom half driver allowing basic
testi

qemu: enable testing of notifications using the console

When asynchronous notifications are enabled the console driver in qemu
is configured as a top half and bottom half driver allowing basic
testing of the notification framework.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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