1PLATFORM_FLAVOR ?= qemu_virt 2 3ifeq ($(PLATFORM_FLAVOR),qemu_virt) 4include core/arch/arm/cpu/cortex-a15.mk 5endif 6ifeq ($(PLATFORM_FLAVOR),fvp) 7include core/arch/arm/cpu/cortex-armv8-0.mk 8platform-debugger-arm := 1 9endif 10ifeq ($(PLATFORM_FLAVOR),juno) 11include core/arch/arm/cpu/cortex-armv8-0.mk 12platform-debugger-arm := 1 13# Workaround 808870: Unconditional VLDM instructions might cause an 14# alignment fault even though the address is aligned 15# Either hard float must be disabled for AArch32 or strict alignment checks 16# must be disabled 17ifeq ($(CFG_SCTLR_ALIGNMENT_CHECK),y) 18$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y) 19else 20$(call force,CFG_SCTLR_ALIGNMENT_CHECK,n) 21endif 22endif #juno 23ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 24include core/arch/arm/cpu/cortex-armv8-0.mk 25CFG_ARM64_core ?= y 26supported-ta-targets ?= ta_arm64 ta_arm32 27endif 28ifeq ($(PLATFORM_FLAVOR),qemu_sbsa) 29include core/arch/arm/cpu/cortex-armv8-0.mk 30CFG_ARM64_core ?= y 31endif 32 33 34ifeq ($(platform-debugger-arm),1) 35# ARM debugger needs this 36platform-cflags-debug-info = -gdwarf-2 37platform-aflags-debug-info = -gdwarf-2 38endif 39 40ifeq ($(platform-flavor-armv8),1) 41$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 42endif 43 44$(call force,CFG_PL011,y) 45$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 46 47ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 48# NOTE: Below values for the TPM event log are implementation 49# dependent and used mostly for debugging purposes. 50# Care must be taken to properly configure them if used. 51CFG_TPM_LOG_BASE_ADDR ?= 0x402c951 52CFG_TPM_MAX_LOG_SIZE ?= 0x200 53endif 54 55ifneq ($(CFG_ARM64_core),y) 56$(call force,CFG_ARM32_core,y) 57endif 58 59CFG_WITH_STATS ?= y 60CFG_ENABLE_EMBEDDED_TESTS ?= y 61 62ifeq ($(CFG_CORE_SEL2_SPMC),y) 63$(call force,CFG_CORE_RESERVED_SHM,n) 64CFG_GIC ?= n 65else 66$(call force,CFG_GIC,y) 67endif 68 69ifeq ($(PLATFORM_FLAVOR),fvp) 70CFG_MULTI_CORE_HALTING ?= y 71CFG_TEE_CORE_NB_CORE ?= 8 72ifeq ($(CFG_CORE_SEL2_SPMC),y) 73CFG_TZDRAM_START ?= 0x06281000 74CFG_TZDRAM_SIZE ?= 0x01D80000 75else 76CFG_TZDRAM_START ?= 0x06000000 77CFG_TZDRAM_SIZE ?= 0x02000000 78endif 79CFG_SHMEM_START ?= 0x83000000 80CFG_SHMEM_SIZE ?= 0x00200000 81# DRAM1 is defined above 4G 82$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 83$(call force,CFG_CORE_ARM64_PA_BITS,36) 84CFG_AUTO_MAX_PA_BITS ?= y 85ifeq ($(CFG_SCMI_SCPFW),y) 86$(call force,CFG_SCMI_SCPFW_PRODUCT,fvp) 87endif 88ifeq ($(CFG_CORE_SEL1_SPMC),y) 89CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 9 90endif 91endif 92 93ifeq ($(PLATFORM_FLAVOR),juno) 94CFG_MULTI_CORE_HALTING ?= y 95CFG_TEE_CORE_NB_CORE ?= 6 96CFG_TZDRAM_START ?= 0xff000000 97CFG_TZDRAM_SIZE ?= 0x00ff8000 98CFG_SHMEM_START ?= 0xfee00000 99CFG_SHMEM_SIZE ?= 0x00200000 100# DRAM1 is defined above 4G 101$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 102$(call force,CFG_CORE_ARM64_PA_BITS,36) 103CFG_CRYPTO_WITH_CE ?= y 104CFG_ARM_SMCCC_TRNG ?= y 105CFG_WITH_SOFTWARE_PRNG ?= n 106endif 107 108ifeq ($(PLATFORM_FLAVOR),qemu_virt) 109CFG_CORE_HEAP_SIZE ?= 98304 110CFG_MULTI_CORE_HALTING ?= y 111CFG_TEE_CORE_NB_CORE ?= 4 112# [0e00.0000 0e0f.ffff] is reserved to early boot 113CFG_TZDRAM_START ?= 0x0e100000 114CFG_TZDRAM_SIZE ?= 0x00f00000 115CFG_SHMEM_START ?= 0x7fe00000 116CFG_SHMEM_SIZE ?= 0x00200000 117# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 118CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 119# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs 120CFG_TEE_RAM_VA_SIZE ?= 0x00200000 121ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 122# CFG_ASAN_SHADOW_OFFSET is calculated as: 123# (&__asan_shadow_start - (TEE_RAM_VA_START / 8) 124# This is unfortunately currently not possible to do in make so we have to 125# calculate it offline, there's some asserts in 126# core/arch/arm/kernel/generic_boot.c to check that we got it right 127CFG_ASAN_SHADOW_OFFSET ?= 0xc6a71c0 128endif 129$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 130$(call force,CFG_PSCI_ARM32,y) 131$(call force,CFG_DT,y) 132CFG_DTB_MAX_SIZE ?= 0x100000 133CFG_CORE_ASYNC_NOTIF ?= y 134CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 219 135endif 136 137ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 138CFG_CORE_TZSRAM_EMUL_SIZE ?= 655360 139CFG_CORE_HEAP_SIZE ?= 196608 140CFG_MULTI_CORE_HALTING ?= y 141CFG_TEE_CORE_NB_CORE ?= 4 142CFG_AUTO_MAX_PA_BITS ?= y 143ifeq ($(CFG_ARM_GICV3),y) 144CFG_CORE_CLUSTER_SHIFT ?= 4 145else 146CFG_CORE_CLUSTER_SHIFT ?= 3 147endif 148ifneq ($(CFG_CORE_SEL2_SPMC),y) 149# [0e00.0000 0e0f.ffff] is reserved to early boot 150CFG_TZDRAM_START ?= 0x0e100000 151CFG_TZDRAM_SIZE ?= 0x00f00000 152# SHM chosen arbitrary, in a way that it does not interfere 153# with initial location of linux kernel, dtb and initrd. 154CFG_SHMEM_START ?= 0x42000000 155CFG_SHMEM_SIZE ?= 0x00200000 156# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 157CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 158ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 159# See comment above 160CFG_ASAN_SHADOW_OFFSET ?= 0xc6a71c0 161endif 162endif 163$(call force,CFG_DT,y) 164CFG_DTB_MAX_SIZE ?= 0x100000 165ifeq ($(CFG_SCMI_SCPFW),y) 166$(call force,CFG_SCMI_SCPFW_PRODUCT,fvp) 167endif 168 169CFG_CORE_ASYNC_NOTIF ?= y 170ifeq ($(CFG_CORE_SEL1_SPMC),y) 171CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 8 172else ifneq ($(CFG_CORE_SEL2_SPMC),y) 173CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 219 174endif 175endif #PLATFORM_FLAVOR==qemu_armv8a 176 177ifeq ($(PLATFORM_FLAVOR),qemu_sbsa) 178CFG_CORE_HEAP_SIZE ?= 196608 179CFG_HALT_CORES_ON_PANIC ?= y 180CFG_TEE_CORE_NB_CORE ?= 4 181CFG_AUTO_MAX_PA_BITS ?= y 182CFG_CORE_RESERVED_SHM ?= n 183ifeq ($(CFG_CORE_SEL2_SPMC),y) 184else 185$(call force,CFG_ARM_GICV3,y) 186$(call force,CFG_DT_ADDR,0) 187$(call force,CFG_DT,y) 188CFG_DTB_MAX_SIZE ?= 0x100000 189endif 190endif #PLATFORM==qemu_sbsa 191 192ifneq (,$(filter $(PLATFORM_FLAVOR),qemu_virt qemu_armv8a)) 193CFG_DT_DRIVER_EMBEDDED_TEST ?= y 194ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 195$(call force,CFG_EMBED_DTB_SOURCE_FILE,embedded_dtb_test.dts,Mandated for DT tests) 196endif 197endif 198 199CFG_PKCS11_TA ?= y 200CFG_PKCS11_TA_RSA_X_509 ?= y 201