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/OK3568_Linux_fs/u-boot/board/sunxi/
H A DREADME.nand35 sunxi-fel write 0x4a000000 u-boot-dtb.bin
36 sunxi-fel write 0x43000000 spl/sunxi-spl-with-ecc.bin
39 sunxi-fel exe 0x4a000000
48 nand write.raw.noverify 0x43000000 0 40
49 nand write.raw.noverify 0x43000000 0x400000 40
52 nand write 0x4a000000 0x800000 0xc0000
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/
H A Dcdns,cdns-pcie-host.yaml47 bus-range = <0x0 0xff>;
48 linux,pci-domain = <0>;
49 vendor-id = <0x17cd>;
50 device-id = <0x0200>;
52 reg = <0x0 0xfb000000 0x0 0x01000000>,
53 <0x0 0x41000000 0x0 0x00001000>;
56 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
57 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
58 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
60 #interrupt-cells = <0x1>;
[all …]
H A Dversatile.yaml38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
H A Dxilinx-versal-cpm.yaml47 const: 0
79 interrupts = <0 72 4>;
81 interrupt-map-mask = <0 0 0 7>;
82 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
83 <0 0 0 2 &pcie_intc_0 1>,
84 <0 0 0 3 &pcie_intc_0 2>,
85 <0 0 0 4 &pcie_intc_0 3>;
86 bus-range = <0x00 0xff>;
87 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
88 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
[all …]
H A Dxilinx-nwl-pcie.txt34 address. The value must be 0.
48 interrupts = <0 114 4>, <0 115 4>, <0 116 4>, <0 117 4>, <0 118 4>;
50 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
51 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
52 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
53 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
54 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
57 reg = <0x0 0xfd0e0000 0x0 0x1000>,
58 <0x0 0xfd480000 0x0 0x1000>,
59 <0x80 0x00000000 0x0 0x1000000>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Dfaraday,fttmr010.txt32 reg = <0x43000000 0x1000>;
/OK3568_Linux_fs/u-boot/include/configs/
H A Dexynos7420-common.h41 #define CONFIG_IRAM_BASE 0x02100000
42 #define CONFIG_IRAM_SIZE 0x58000
47 #define CONFIG_CORE_COUNT 0x8
51 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
75 func(MMC, mmc, 0) \
79 "bootm_size=0x10000000\0" \
80 "kernel_addr_r=0x42000000\0" \
81 "fdt_addr_r=0x43000000\0" \
82 "ramdisk_addr_r=0x43300000\0" \
83 "scriptaddr=0x50000000\0" \
[all …]
H A Dexynos5-common.h23 #define CONFIG_TRACE_EARLY_ADDR 0x50000000
30 #define S5P_CHECK_SLEEP 0x00000BAD
31 #define S5P_CHECK_DIDLE 0xBAD00000
32 #define S5P_CHECK_LPA 0xABAD0000
35 #define INFORM0_OFFSET 0x800
36 #define INFORM1_OFFSET 0x804
37 #define INFORM2_OFFSET 0x808
38 #define INFORM3_OFFSET 0x80c
41 #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
47 #define COPY_BL2_FNPTR_ADDR 0x02020030
[all …]
H A Ds5pc210_universal.h22 #define CONFIG_SYS_SDRAM_BASE 0x40000000
33 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
40 #define CONFIG_SYS_MONITOR_BASE 0x00000000
44 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
60 ",-(UBI)\0"
68 ",-(UMS)\0"
89 "onenand erase 0x0 0x100000;" \
90 "onenand write 0x42008000 0x0 0x100000\0" \
92 "onenand erase 0xc00000 0x500000;" \
[all …]
H A Dtrats.h22 #define CONFIG_SYS_PL310_BASE 0x10502000
27 #define CONFIG_SYS_SDRAM_BASE 0x40000000
29 #define CONFIG_SYS_TEXT_BASE 0x63300000
34 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
35 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
37 #define CONFIG_SYS_TEXT_BASE 0x63300000
45 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
52 #define CONFIG_SYS_MONITOR_BASE 0x00000000
83 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
86 "u-boot raw 0x80 0x400;" \
[all …]
H A Dsunxi-common.h25 # define CONFIG_MACH_TYPE_COMPAT_REV 0
63 #define SDRAM_OFFSET(x) 0x2##x
64 #define CONFIG_SYS_SDRAM_BASE 0x20000000
65 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
66 #define CONFIG_SYS_TEXT_BASE 0x2a000000
70 #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
71 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
73 #define SDRAM_OFFSET(x) 0x4##x
74 #define CONFIG_SYS_SDRAM_BASE 0x40000000
75 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
[all …]
H A DMPC837XERDB.h19 #define CONFIG_SYS_TEXT_BASE 0xFE000000
88 #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
89 #define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
92 #define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC1&2 emergency priority (0-3) */
95 #define CONFIG_SYS_SCCR_TSEC1CM 1 /* eTSEC1 clock mode (0-3) */
96 #define CONFIG_SYS_SCCR_TSEC2CM 1 /* eTSEC2 clock mode (0-3) */
97 #define CONFIG_SYS_SCCR_SATACM SCCR_SATACM_2 /* SATA1-4 clock mode (0-3) */
102 #define CONFIG_SYS_SICRH 0x08200000
103 #define CONFIG_SYS_SICRL 0x00000000
108 #define CONFIG_SYS_OBIR 0x30100000
[all …]
H A DMPC837XEMDS.h18 #define CONFIG_SYS_TEXT_BASE 0xFE000000
87 #define CONFIG_SYS_SCCR_SATACM SCCR_SATACM_2 /* CSB:SATA[0:3] = 2:1 */
92 #define CONFIG_SYS_SICRH 0x00000000
93 #define CONFIG_SYS_SICRL 0x00000000
98 #define CONFIG_SYS_OBIR 0x31100000
106 #define CONFIG_SYS_IMMR 0xE0000000
111 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */
119 /* 0x80080001 */ /* ODT 150ohm on SoC */
128 #define SPD_EEPROM_ADDRESS 0x51 /* I2C address of DDR SODIMM SPD */
136 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000001f
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Ds5p-mfc.txt44 reg = <0x13400000 0x10000>;
45 interrupts = <0 94 0>;
62 reg = <0x51000000 0x800000>;
68 reg = <0x43000000 0x800000>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/apm/
H A Dapm-storm.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
29 reg = <0x0 0x001>;
31 cpu-release-addr = <0x1 0x0000fff8>;
37 reg = <0x0 0x100>;
39 cpu-release-addr = <0x1 0x0000fff8>;
45 reg = <0x0 0x101>;
47 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
H A Dapm-shadowcat.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
26 clocks = <&pmd0clk 0>;
31 reg = <0x0 0x001>;
33 cpu-release-addr = <0x1 0x0000fff8>;
36 clocks = <&pmd0clk 0>;
41 reg = <0x0 0x100>;
43 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
H A Dgemini.dtsi23 pinctrl-0 = <&pflash_default_pins>;
33 reg = <0x40000000 0x1000>;
41 offset = <0x0c>;
43 mask = <0xC0000000>;
51 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
161 reg = <0x41000000 0x1000>;
170 reg = <0x42000000 0x100>;
175 pinctrl-0 = <&uart_default_pins>;
181 reg = <0x43000000 0x1000>;
195 reg = <0x45000000 0x100>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/
H A Dgemini.txt59 reg = <0x00000000 0x8000000>;
71 reg = <0x40000000 0x1000>;
78 reg = <0x42000000 0x100>;
87 reg = <0x43000000 0x1000>;
102 reg = <0x48000000 0x1000>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/cavium/
H A Dthunder2-99xx.dtsi21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
27 reg = <0x0 0x0>;
34 reg = <0x0 0x1>;
41 reg = <0x0 0x2>;
48 reg = <0x0 0x3>;
66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi19 bus@0 {
23 ranges = <0x0 0x0 0x0 0x40000000>;
27 reg = <0x00100000 0xf000>,
28 <0x0010f000 0x1000>;
34 reg = <0x2200000 0x10000>,
35 <0x2210000 0x10000>;
52 reg = <0x02490000 0x10000>;
69 snps,burst-map = <0x7>;
83 ranges = <0x02900000 0x02900000 0x200000>;
89 reg = <0x02930000 0x20000>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amd/
H A Damd-seattle-soc.dtsi20 reg = <0x0 0xe1110000 0 0x1000>,
21 <0x0 0xe112f000 0 0x2000>,
22 <0x0 0xe1140000 0 0x2000>,
23 <0x0 0xe1160000 0 0x2000>;
24 interrupts = <1 9 0xf04>;
25 ranges = <0 0 0 0xe1100000 0 0x100000>;
29 reg = <0x0 0x00080000 0 0x1000>;
35 interrupts = <1 13 0xff04>,
36 <1 14 0xff04>,
37 <1 11 0xff04>,
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/
H A Dcuboot-pq2.c73 if (!dt_xlate_reg(bus_node, 0, (unsigned long *)&ctrl_addr, in update_cs_ranges()
79 for (i = 0; i < len / sizeof(struct cs_range); i++) { in update_cs_ranges()
85 if (cs_ranges_buf[i].base != 0) in update_cs_ranges()
94 base &= 0x7fff; in update_cs_ranges()
95 option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; in update_cs_ranges()
97 base = 0x1801; in update_cs_ranges()
98 option = 0x10; in update_cs_ranges()
101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
134 for (i = 0; i < 3; i++) in fixup_pci()
158 for (i = 0; i < len / sizeof(struct pci_range); i++) { in fixup_pci()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt8516.dtsi21 cluster0_opp: opp-table-0 {
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x0>;
66 reg = <0x1>;
79 reg = <0x2>;
92 reg = <0x3>;
105 CPU_SLEEP_0_0: cpu-sleep-0-0 {
110 arm,psci-suspend-param = <0x0010000>;
113 CLUSTER_SLEEP_0: cluster-sleep-0 {
[all …]
/OK3568_Linux_fs/external/security/rk_tee_user/v2/export-ta_arm64/include/
H A Dfdlibm.h61 #define FLT_UWORD_IS_NAN(x) 0
62 #define FLT_UWORD_IS_INFINITE(x) 0
63 #define FLT_UWORD_MAX 0x7fffffff
64 #define FLT_UWORD_EXP_MAX 0x43010000
65 #define FLT_UWORD_LOG_MAX 0x42b2d4fc
66 #define FLT_UWORD_LOG_2MAX 0x42b437e0
67 #define HUGE ((float)0X1.FFFFFEP128)
69 #define FLT_UWORD_IS_FINITE(x) ((x)<0x7f800000L)
70 #define FLT_UWORD_IS_NAN(x) ((x)>0x7f800000L)
71 #define FLT_UWORD_IS_INFINITE(x) ((x)==0x7f800000L)
[all …]

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