1*4882a593Smuzhiyun* Samsung Multi Format Codec (MFC) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunMulti Format Codec (MFC) is the IP present in Samsung SoCs which 4*4882a593Smuzhiyunsupports high resolution decoding and encoding functionalities. 5*4882a593SmuzhiyunThe MFC device driver is a v4l2 driver which can encode/decode 6*4882a593Smuzhiyunvideo raw/elementary streams and has support for all popular 7*4882a593Smuzhiyunvideo codecs. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties: 10*4882a593Smuzhiyun - compatible : value should be either one among the following 11*4882a593Smuzhiyun (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs 12*4882a593Smuzhiyun (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs 13*4882a593Smuzhiyun (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC 14*4882a593Smuzhiyun (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC 15*4882a593Smuzhiyun (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC 16*4882a593Smuzhiyun (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun - reg : Physical base address of the IP registers and length of memory 19*4882a593Smuzhiyun mapped region. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun - interrupts : MFC interrupt number to the CPU. 22*4882a593Smuzhiyun - clocks : from common clock binding: handle to mfc clock. 23*4882a593Smuzhiyun - clock-names : from common clock binding: must contain "mfc", 24*4882a593Smuzhiyun corresponding to entry in the clocks property. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunOptional properties: 27*4882a593Smuzhiyun - power-domains : power-domain property defined with a phandle 28*4882a593Smuzhiyun to respective power domain. 29*4882a593Smuzhiyun - memory-region : from reserved memory binding: phandles to two reserved 30*4882a593Smuzhiyun memory regions, first is for "left" mfc memory bus interfaces, 31*4882a593Smuzhiyun second if for the "right" mfc memory bus, used when no SYSMMU 32*4882a593Smuzhiyun support is available; used only by MFC v5 present in Exynos4 SoCs 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunObsolete properties: 35*4882a593Smuzhiyun - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region 36*4882a593Smuzhiyun property instead 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunExample: 40*4882a593SmuzhiyunSoC specific DT entry: 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunmfc: codec@13400000 { 43*4882a593Smuzhiyun compatible = "samsung,mfc-v5"; 44*4882a593Smuzhiyun reg = <0x13400000 0x10000>; 45*4882a593Smuzhiyun interrupts = <0 94 0>; 46*4882a593Smuzhiyun power-domains = <&pd_mfc>; 47*4882a593Smuzhiyun clocks = <&clock 273>; 48*4882a593Smuzhiyun clock-names = "mfc"; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunReserved memory specific DT entry for given board (see reserved memory binding 52*4882a593Smuzhiyunfor more information): 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunreserved-memory { 55*4882a593Smuzhiyun #address-cells = <1>; 56*4882a593Smuzhiyun #size-cells = <1>; 57*4882a593Smuzhiyun ranges; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun mfc_left: region@51000000 { 60*4882a593Smuzhiyun compatible = "shared-dma-pool"; 61*4882a593Smuzhiyun no-map; 62*4882a593Smuzhiyun reg = <0x51000000 0x800000>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun mfc_right: region@43000000 { 66*4882a593Smuzhiyun compatible = "shared-dma-pool"; 67*4882a593Smuzhiyun no-map; 68*4882a593Smuzhiyun reg = <0x43000000 0x800000>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593SmuzhiyunBoard specific DT entry: 73*4882a593Smuzhiyun 74*4882a593Smuzhiyuncodec@13400000 { 75*4882a593Smuzhiyun memory-region = <&mfc_left>, <&mfc_right>; 76*4882a593Smuzhiyun}; 77