| /OK3568_Linux_fs/kernel/drivers/ide/ |
| H A D | umc8672.c | 34 * in the beginning of the driver, which sets the speed of drive 0 to 11 (there 35 * are some lines present). 0 - 11 are allowed speed values. These values are 60 #define UMC_DRIVE1 1 /* 0 to 11 allowed */ 65 static const u8 pio_to_umc [5] = {0, 3, 7, 10, 11}; /* rough guesses */ 67 /* 0 1 2 3 4 5 6 7 8 9 10 11 */ 69 {0x0f, 0x0b, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1}, 70 {0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1}, 71 {0xff, 0xcb, 0xc0, 0x58, 0x36, 0x33, 0x23, 0x22, 0x21, 0x11, 0x10, 0x0} 76 outb_p(port, 0x108); in out_umc() 77 outb_p(wert, 0x109); in out_umc() [all …]
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| /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cmd_errata.c | 26 void __iomem *dcsr = (void *)CONFIG_SYS_DCSRBAR + 0xb0000; in check_erratum_a4849() 31 0x50, 0x54, 0x58, 0x90, 0x94, 0x98 in check_erratum_a4849() 36 0x60, 0x64, 0x68, 0x6c, 0xa0, 0xa4, 0xa8, 0xac in check_erratum_a4849() 39 uint32_t x108; /* The value that should be at offset 0x108 */ in check_erratum_a4849() local 41 for (i = 0; i < ARRAY_SIZE(offsets); i++) { in check_erratum_a4849() 49 x108 = 0x12; in check_erratum_a4849() 54 * For P4080, the erratum document says that the value at offset 0x108 in check_erratum_a4849() 55 * should be 0x12 on rev2, or 0x1c on rev3. in check_erratum_a4849() 58 x108 = 0x12; in check_erratum_a4849() 60 x108 = 0x1c; in check_erratum_a4849() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/ |
| H A D | bridge-regs.h | 14 #define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) 16 #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) 18 #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) 19 #define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) 21 #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) 23 #define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) 25 #define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) 27 #define BRIDGE_INT_TIMER1_CLR (~0x0004) 29 #define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) 31 #define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) [all …]
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| /OK3568_Linux_fs/kernel/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp.h | 10 #define QSERDES_COM_BG_TIMER 0x00c 11 #define QSERDES_COM_SSC_EN_CENTER 0x010 12 #define QSERDES_COM_SSC_ADJ_PER1 0x014 13 #define QSERDES_COM_SSC_ADJ_PER2 0x018 14 #define QSERDES_COM_SSC_PER1 0x01c 15 #define QSERDES_COM_SSC_PER2 0x020 16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024 17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028 18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034 19 #define QSERDES_COM_CLK_ENABLE1 0x038 [all …]
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| /OK3568_Linux_fs/kernel/drivers/media/pci/cx18/ |
| H A D | cx18-av-audio.c | 60 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in set_audclk_freq() 61 * AUX_PLL Integer = 0x0d, AUX PLL Post Divider = 0x20 in set_audclk_freq() 63 cx18_av_write4(cx, 0x108, 0x200d040f); in set_audclk_freq() 65 /* VID_PLL Fraction = 0x2be2fe */ in set_audclk_freq() 66 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq() 67 cx18_av_write4(cx, 0x10c, 0x002be2fe); in set_audclk_freq() 69 /* AUX_PLL Fraction = 0x176740c */ in set_audclk_freq() 70 /* xtal * 0xd.bb3a060/0x20 = 32000 * 384: 393 MHz p-pd*/ in set_audclk_freq() 71 cx18_av_write4(cx, 0x110, 0x0176740c); in set_audclk_freq() 74 /* 0x1.f77f = (4 * xtal/8*2/455) / 32000 */ in set_audclk_freq() [all …]
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| /OK3568_Linux_fs/kernel/drivers/media/i2c/cx25840/ |
| H A D | cx25840-audio.c | 39 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in cx25840_set_audclk_freq() 40 * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10 in cx25840_set_audclk_freq() 42 cx25840_write4(client, 0x108, 0x1006040f); in cx25840_set_audclk_freq() 45 * VID_PLL Fraction (register 0x10c) = 0x2be2fe in cx25840_set_audclk_freq() 46 * 28636360 * 0xf.15f17f0/4 = 108 MHz in cx25840_set_audclk_freq() 51 * AUX_PLL Fraction = 0x1bb39ee in cx25840_set_audclk_freq() 52 * 28636363 * 0x6.dd9cf70/0x10 = 32000 * 384 in cx25840_set_audclk_freq() 57 cx25840_write4(client, 0x110, 0x01bb39ee); in cx25840_set_audclk_freq() 61 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider in cx25840_set_audclk_freq() 63 cx25840_write(client, 0x127, 0x50); in cx25840_set_audclk_freq() [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/ |
| H A D | hpet.h | 9 #define HPET_ID 0x000 10 #define HPET_PERIOD 0x004 11 #define HPET_CFG 0x010 12 #define HPET_STATUS 0x020 13 #define HPET_COUNTER 0x0f0 15 #define HPET_Tn_CFG(n) (0x100 + 0x20 * n) 16 #define HPET_Tn_CMP(n) (0x108 + 0x20 * n) 17 #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n) 19 #define HPET_T0_IRS 0x001 20 #define HPET_T1_IRS 0x002 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-mmp/ |
| H A D | regs-icu.h | 11 #define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000) 14 #define ICU2_VIRT_BASE (AXI_VIRT_BASE + 0x84000) 18 #define ICU_INT_CONF_MASK (0xf) 25 #define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */ 26 #define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */ 27 #define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */ 28 #define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */ 29 #define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */ 41 #define MMP2_ICU_PJ4_IRQ_STATUS0 ICU_REG(0x138) 42 #define MMP2_ICU_PJ4_IRQ_STATUS1 ICU_REG(0x13c) [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-omap2/ |
| H A D | omap-secure.h | 16 #define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE 17 #define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF 20 #define API_HAL_RET_VALUE_OK 0x00 21 #define API_HAL_RET_VALUE_FAIL 0x01 24 #define FLAG_START_CRITICAL 0x4 25 #define FLAG_IRQFIQ_MASK 0x3 26 #define FLAG_IRQ_ENABLE 0x2 27 #define FLAG_FIQ_ENABLE 0x1 28 #define NO_FLAG 0x0 33 #define OMAP3_SAVE_SECURE_RAM_SZ 0x803F [all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/renesas/ |
| H A D | clk-sh73a0.c | 24 #define CPG_FRQCRA 0x00 25 #define CPG_FRQCRB 0x04 26 #define CPG_SD0CKCR 0x74 27 #define CPG_SD1CKCR 0x78 28 #define CPG_SD2CKCR 0x7c 29 #define CPG_PLLECR 0xd0 30 #define CPG_PLL0CR 0xd8 31 #define CPG_PLL1CR 0x28 32 #define CPG_PLL2CR 0x2c 33 #define CPG_PLL3CR 0xdc [all …]
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| /OK3568_Linux_fs/kernel/arch/x86/include/asm/ |
| H A D | hpet.h | 11 #define HPET_ID 0x000 12 #define HPET_PERIOD 0x004 13 #define HPET_CFG 0x010 14 #define HPET_STATUS 0x020 15 #define HPET_COUNTER 0x0f0 17 #define HPET_Tn_CFG(n) (0x100 + 0x20 * n) 18 #define HPET_Tn_CMP(n) (0x108 + 0x20 * n) 19 #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n) 21 #define HPET_T0_CFG 0x100 22 #define HPET_T0_CMP 0x108 [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/pci/ |
| H A D | pci-vr41xx.h | 12 #define PCIU_BASE 0x0f000c00UL 13 #define PCIU_SIZE 0x200UL 15 #define PCIMMAW1REG 0x00 16 #define PCIMMAW2REG 0x04 17 #define PCITAW1REG 0x08 18 #define PCITAW2REG 0x0c 19 #define PCIMIOAWREG 0x10 20 #define IBA(addr) ((addr) & 0xff000000U) 21 #define MASTER_MSK(mask) (((mask) >> 11) & 0x000fe000U) 22 #define PCIA(addr) (((addr) >> 24) & 0x000000ffU) [all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/hisilicon/ |
| H A D | clk-hi3660.c | 14 { HI3660_CLKIN_SYS, "clkin_sys", NULL, 0, 19200000, }, 15 { HI3660_CLKIN_REF, "clkin_ref", NULL, 0, 32764, }, 16 { HI3660_CLK_FLL_SRC, "clk_fll_src", NULL, 0, 128000000, }, 17 { HI3660_CLK_PPLL0, "clk_ppll0", NULL, 0, 1600000000, }, 18 { HI3660_CLK_PPLL1, "clk_ppll1", NULL, 0, 1866000000, }, 19 { HI3660_CLK_PPLL2, "clk_ppll2", NULL, 0, 2880000000UL, }, 20 { HI3660_CLK_PPLL3, "clk_ppll3", NULL, 0, 1290000000, }, 21 { HI3660_CLK_SCPLL, "clk_scpll", NULL, 0, 245760000, }, 22 { HI3660_PCLK, "pclk", NULL, 0, 20000000, }, 23 { HI3660_CLK_UART0_DBG, "clk_uart0_dbg", NULL, 0, 19200000, }, [all …]
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| H A D | clk-hi3620.c | 67 { HI3620_OSC32K, "osc32k", NULL, 0, 32768, }, 68 { HI3620_OSC26M, "osc26m", NULL, 0, 26000000, }, 69 { HI3620_PCLK, "pclk", NULL, 0, 26000000, }, 70 { HI3620_PLL_ARM0, "armpll0", NULL, 0, 1600000000, }, 71 { HI3620_PLL_ARM1, "armpll1", NULL, 0, 1600000000, }, 72 { HI3620_PLL_PERI, "armpll2", NULL, 0, 1440000000, }, 73 { HI3620_PLL_USB, "armpll3", NULL, 0, 1440000000, }, 74 { HI3620_PLL_HDMI, "armpll4", NULL, 0, 1188000000, }, 75 { HI3620_PLL_GPU, "armpll5", NULL, 0, 1300000000, }, 80 { HI3620_RCLK_TCXO, "rclk_tcxo", "osc26m", 1, 4, 0, }, [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
| H A D | immap_lsch3.h | 13 #define CONFIG_SYS_IMMR 0x01000000 14 #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) 15 #define CONFIG_SYS_FSL_DDR2_ADDR (CONFIG_SYS_IMMR + 0x00090000) 16 #define CONFIG_SYS_FSL_DDR3_ADDR 0x08210000 17 #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00E00000) 18 #define CONFIG_SYS_FSL_PMU_ADDR (CONFIG_SYS_IMMR + 0x00E30000) 19 #define CONFIG_SYS_FSL_RST_ADDR (CONFIG_SYS_IMMR + 0x00E60000) 20 #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR (CONFIG_SYS_IMMR + 0x00300000) 21 #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR (CONFIG_SYS_IMMR + 0x00310000) 22 #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x00370000) [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | vf610-pinfunc.h | 14 #define ALT0 0x0 15 #define ALT1 0x1 16 #define ALT2 0x2 17 #define ALT3 0x3 18 #define ALT4 0x4 19 #define ALT5 0x5 20 #define ALT6 0x6 21 #define ALT7 0x7 24 #define VF610_PAD_PTA6__GPIO_0 0x000 0x000 ALT0 0x0 25 #define VF610_PAD_PTA6__RMII_CLKOUT 0x000 0x000 ALT1 0x0 [all …]
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| H A D | omap4-mcpdm.dtsi | 12 /* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */ 13 OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) 15 /* 0x4a100108 abe_pdm_dl_data.abe_pdm_dl_data af25 */ 16 OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) 18 /* 0x4a10010a abe_pdm_frame.abe_pdm_frame ae25 */ 19 OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) 21 /* 0x4a10010c abe_pdm_lb_clk.abe_pdm_lb_clk af26 */ 22 OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) 24 /* 0x4a10010e abe_clks.abe_clks ah26 */ 25 OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | dram_sun6i.h | 18 u32 cr; /* 0x00 */ 19 u32 ccr; /* 0x04 controller configuration register */ 20 u32 dbgcr; /* 0x08 */ 21 u32 dbgcr1; /* 0x0c */ 22 u32 rmcr[8]; /* 0x10 */ 23 u32 mmcr[16]; /* 0x30 */ 24 u32 mbagcr[6]; /* 0x70 */ 25 u32 maer; /* 0x88 */ 26 u8 res0[0x14]; /* 0x8c */ 27 u32 mdfscr; /* 0x100 */ [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-s3c/ |
| H A D | regs-sys-s3c64xx.h | 16 #define S3C64XX_AHB_CON0 S3C_SYSREG(0x100) 17 #define S3C64XX_AHB_CON1 S3C_SYSREG(0x104) 18 #define S3C64XX_AHB_CON2 S3C_SYSREG(0x108) 20 #define S3C64XX_SDMA_SEL S3C_SYSREG(0x110) 22 #define S3C64XX_OTHERS S3C_SYSREG(0x900)
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_pdc.h | 11 u32 rpr; /* 0x100 Receive Pointer Register */ 12 u32 rcr; /* 0x104 Receive Counter Register */ 13 u32 tpr; /* 0x108 Transmit Pointer Register */ 14 u32 tcr; /* 0x10C Transmit Counter Register */ 15 u32 pnpr; /* 0x110 Receive Next Pointer Register */ 16 u32 pncr; /* 0x114 Receive Next Counter Register */ 17 u32 tnpr; /* 0x118 Transmit Next Pointer Register */ 18 u32 tncr; /* 0x11C Transmit Next Counter Register */ 19 u32 ptcr; /* 0x120 Transfer Control Register */ 20 u32 ptsr; /* 0x124 Transfer Status Register */
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| /OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| H A D | pipeline.json | 4 "EventCode": "0x108", 10 "EventCode": "0x109", 16 "EventCode": "0x10a", 22 "EventCode": "0x10b", 28 "EventCode": "0x10c", 34 "EventCode": "0x10d", 40 "EventCode": "0x10e", 46 "EventCode": "0x10f",
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/arm/display/komeda/d71/ |
| H A D | d71_regs.h | 11 #define BLK_BLOCK_INFO 0x000 12 #define BLK_PIPELINE_INFO 0x004 13 #define BLK_MAX_LINE_SIZE 0x008 14 #define BLK_VALID_INPUT_ID0 0x020 15 #define BLK_OUTPUT_ID0 0x060 16 #define BLK_INPUT_ID0 0x080 17 #define BLK_IRQ_RAW_STATUS 0x0A0 18 #define BLK_IRQ_CLEAR 0x0A4 19 #define BLK_IRQ_MASK 0x0A8 20 #define BLK_IRQ_STATUS 0x0AC [all …]
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| /OK3568_Linux_fs/kernel/drivers/mmc/host/ |
| H A D | sdhci_f_sdh30.h | 11 #define F_SDH30_AHB_CONFIG 0x100 18 #define F_SDH30_AHB_INCR_4 BIT(0) 20 #define F_SDH30_TUNING_SETTING 0x108 23 #define F_SDH30_IO_CONTROL2 0x114 27 #define F_SDH30_ESD_CONTROL 0x124
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| /OK3568_Linux_fs/u-boot/arch/arc/cpu/arcv1/ |
| H A D | ivt.S | 11 j _start /* 0 - 0x000 */ 12 j memory_error /* 1 - 0x008 */ 13 j instruction_error /* 2 - 0x010 */ 17 j interrupt_handler /* 3:31 - 0x018:0xF8 */ 20 j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */ 21 j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */ 22 j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */ 23 j EV_TLBProtV /* 0x118, Protection Violation (0x23) 25 j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */ 26 j EV_Trap /* 0x128, Trap exception (0x25) */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/tty/serial/8250/ |
| H A D | 8250_exar_st16c554.c | 16 SERIAL8250_PORT(0x100, 5), 17 SERIAL8250_PORT(0x108, 5), 18 SERIAL8250_PORT(0x110, 5), 19 SERIAL8250_PORT(0x118, 5),
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