| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
200 static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_saradc_set_clk()
225 static ulong rv1108_aclk_vio1_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_aclk_vio1_set_clk()
251 static ulong rv1108_aclk_vio0_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_aclk_vio0_set_clk()
286 static ulong rv1108_dclk_vop_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_dclk_vop_set_clk()
315 static ulong rv1108_aclk_bus_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_aclk_bus_set_clk()
367 static ulong rv1108_aclk_peri_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_aclk_peri_set_clk()
383 static ulong rv1108_hclk_peri_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_hclk_peri_set_clk()
398 static ulong rv1108_pclk_peri_set_clk(struct rv1108_cru *cru, uint hz) in rv1108_pclk_peri_set_clk()
446 static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz) in rv1108_i2c_set_clk()
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| H A D | clk_rk1808.c | 134 ulong clk_id, uint hz) in rk1808_i2c_set_clk()
305 static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz) in rk1808_saradc_set_clk()
348 ulong clk_id, uint hz) in rk1808_pwm_set_clk()
394 static ulong rk1808_tsadc_set_clk(struct rk1808_clk_priv *priv, uint hz) in rk1808_tsadc_set_clk()
436 ulong clk_id, uint hz) in rk1808_spi_set_clk()
517 ulong clk_id, uint hz) in rk1808_vop_set_clk()
594 static ulong rk1808_mac_set_clk(struct clk *clk, uint hz) in rk1808_mac_set_clk()
624 static int rk1808_mac_set_speed_clk(struct clk *clk, ulong clk_id, uint hz) in rk1808_mac_set_speed_clk()
679 ulong hz) in rk1808_crypto_set_clk()
743 ulong clk_id, ulong hz) in rk1808_bus_set_clk()
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| H A D | clk_rk3308.c | 137 static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz) in rk3308_armclk_set_clk()
226 static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz) in rk3308_i2c_set_clk()
260 static ulong rk3308_mac_set_clk(struct clk *clk, uint hz) in rk3308_mac_set_clk()
290 static int rk3308_mac_set_speed_clk(struct clk *clk, uint hz) in rk3308_mac_set_speed_clk()
392 static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz) in rk3308_saradc_set_clk()
420 static ulong rk3308_tsadc_set_clk(struct clk *clk, uint hz) in rk3308_tsadc_set_clk()
463 static ulong rk3308_spi_set_clk(struct clk *clk, uint hz) in rk3308_spi_set_clk()
507 static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz) in rk3308_pwm_set_clk()
560 static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz) in rk3308_vop_set_clk()
642 ulong hz) in rk3308_bus_set_clk()
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| H A D | clk_px30.c | 327 static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_i2c_set_clk()
453 static ulong px30_i2s_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_i2s_set_clk()
500 ulong hz) in px30_i2s1_mclk_set_clk()
672 static ulong px30_pwm_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_pwm_set_clk()
714 static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz) in px30_saradc_set_clk()
740 static ulong px30_tsadc_set_clk(struct px30_clk_priv *priv, uint hz) in px30_tsadc_set_clk()
777 static ulong px30_spi_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_spi_set_clk()
837 static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_vop_set_clk()
931 ulong hz) in px30_bus_set_clk()
997 ulong hz) in px30_peri_set_clk()
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| H A D | clk_rk3328.c | 118 static ulong rk3328_armclk_set_clk(struct rk3328_clk_priv *priv, ulong hz) in rk3328_armclk_set_clk()
198 ulong clk_id, uint hz) in rk3328_i2c_set_clk()
400 static ulong rk3328_spi_set_clk(struct rk3328_clk_priv *priv, uint hz) in rk3328_spi_set_clk()
425 static ulong rk3328_pwm_set_clk(struct rk3328_clk_priv *priv, uint hz) in rk3328_pwm_set_clk()
450 static ulong rk3328_saradc_set_clk(struct rk3328_clk_priv *priv, uint hz) in rk3328_saradc_set_clk()
477 static ulong rk3328_tsadc_set_clk(struct rk3328_clk_priv *priv, uint hz) in rk3328_tsadc_set_clk()
524 ulong clk_id, uint hz) in rk3328_vop_set_clk()
613 ulong clk_id, ulong hz) in rk3328_bus_set_clk()
687 ulong clk_id, ulong hz) in rk3328_peri_set_clk()
753 ulong hz) in rk3328_crypto_set_clk()
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| H A D | clk_rk3128.c | 91 static ulong rk3128_armclk_set_clk(struct rk3128_clk_priv *priv, ulong hz) in rk3128_armclk_set_clk()
259 ulong clk_id, uint hz) in rk3128_peri_set_clk()
334 ulong clk_id, uint hz) in rk3128_bus_set_clk()
386 static ulong rk3128_spi_set_clk(struct rk3128_clk_priv *priv, ulong hz) in rk3128_spi_set_clk()
413 static ulong rk3128_saradc_set_clk(struct rk3128_clk_priv *priv, uint hz) in rk3128_saradc_set_clk()
431 ulong clk_id, uint hz) in rk3128_vop_set_clk()
511 uint hz) in rk3128_crypto_set_rate()
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| H A D | clk_rk322x.c | 92 static ulong rk322x_armclk_set_clk(struct rk322x_clk_priv *priv, ulong hz) in rk322x_armclk_set_clk()
304 ulong clk_id, ulong hz) in rk322x_bus_set_clk()
377 ulong clk_id, ulong hz) in rk322x_peri_set_clk()
433 static ulong rk322x_spi_set_clk(struct rk322x_clk_priv *priv, ulong hz) in rk322x_spi_set_clk()
487 ulong clk_id, uint hz) in rk322x_vop_set_clk()
548 ulong hz) in rk322x_crypto_set_clk()
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| H A D | clk_rk3368.c | 106 #define PLL_DIVISORS(hz, _nr, _no) { \ argument
536 static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz) in rk3368_spi_set_clk()
574 static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz) in rk3368_saradc_set_clk()
620 ulong clk_id, ulong hz) in rk3368_bus_set_clk()
694 ulong clk_id, ulong hz) in rk3368_peri_set_clk()
768 static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz) in rk3368_vop_set_clk()
849 uint hz) in rk3368_crypto_set_rate()
868 int clk_id, ulong hz) in rk3368_armclk_set_clk()
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| H A D | clk_rk3188.c | 93 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
140 unsigned int hz, bool has_bwadj) in rkclk_configure_ddr()
186 unsigned int hz, bool has_bwadj) in rkclk_configure_cpu()
401 static ulong rk3188_saradc_set_clk(struct rk3188_cru *cru, uint hz) in rk3188_saradc_set_clk()
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| H A D | clk_rk3036.c | 49 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
348 ulong hz) in rk3036_spi_set_clk()
452 uint hz) in rk3036_peri_set_clk()
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| H A D | clk_rk3066.c | 95 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
142 unsigned int hz, bool has_bwadj) in rkclk_configure_ddr()
188 unsigned int hz, bool has_bwadj) in rkclk_configure_cpu()
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| H A D | clk_rk3399.c | 48 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
621 static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_i2c_set_clk()
720 static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_spi_set_clk()
749 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz) in rk3399_vop_set_clk()
969 static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz) in rk3399_saradc_set_clk()
994 static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz) in rk3399_tsadc_set_clk()
1033 ulong hz) in rk3399_crypto_set_clk()
1625 uint hz) in rk3399_i2c_set_pmuclk()
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| H A D | clk_rk3288.c | 212 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
303 unsigned int hz) in rkclk_configure_ddr()
957 static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz) in rockchip_saradc_set_clk()
982 static ulong rockchip_tsadc_set_clk(struct rk3288_cru *cru, uint hz) in rockchip_tsadc_set_clk()
1008 static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru, uint hz) in rockchip_crypto_set_clk()
1053 static ulong rockchip_test_set_clk(struct rk3288_cru *cru, int id, uint hz) in rockchip_test_set_clk()
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | cadence_qspi.c | 23 static int cadence_spi_write_speed(struct udevice *bus, uint hz) in cadence_spi_write_speed()
40 static int spi_calibration(struct udevice *bus, uint hz) in spi_calibration()
119 static int cadence_spi_set_speed(struct udevice *bus, uint hz) in cadence_spi_set_speed()
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| H A D | mvebu_a3700_spi.c | 177 static int mvebu_spi_set_speed(struct udevice *bus, uint hz) in mvebu_spi_set_speed()
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| H A D | kirkwood_spi.c | 258 static int mvebu_spi_set_speed(struct udevice *bus, uint hz) in mvebu_spi_set_speed()
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| /rk3399_rockchip-uboot/lib/ |
| H A D | strmhz.c | 9 char *strmhz (char *buf, unsigned long hz) in strmhz()
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| /rk3399_rockchip-uboot/arch/arm/mach-sunxi/ |
| H A D | clock_sun4i.c | 119 void clock_set_pll1(unsigned int hz) in clock_set_pll1()
228 void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz) in clock_set_de_mod_clock()
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| H A D | clock_sun6i.c | 332 void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz) in clock_set_de_mod_clock()
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| /rk3399_rockchip-uboot/lib/bzip2/ |
| H A D | bzlib_blocksort.c | 120 #define fpush(lz,hz) { stackLo[sp] = lz; \ argument
124 #define fpop(lz,hz) { sp--; \ argument
636 #define mpush(lz,hz,dz) { stackLo[sp] = lz; \ argument
641 #define mpop(lz,hz,dz) { sp--; \ argument
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| /rk3399_rockchip-uboot/board/Arcturus/ucp1020/ |
| H A D | ucp1020.c | 42 void spi_set_speed(struct spi_slave *slave, uint hz) in spi_set_speed()
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| /rk3399_rockchip-uboot/drivers/power/dvfs/ |
| H A D | rockchip_wtemp_dvfs.c | 82 u64 hz; member
320 uint64_t hz; in __wtemp_common_ofdata_to_platdata() local
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| /rk3399_rockchip-uboot/cmd/ |
| H A D | bdinfo.c | 65 static void print_mhz(const char *name, unsigned long hz) in print_mhz()
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| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | gen_atmel_mci.c | 79 static void mci_set_mode(struct udevice *dev, u32 hz, u32 blklen)
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| H A D | sunxi_mmc.c | 96 static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) in mmc_set_mod_clk()
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