| 837df485 | 24-Oct-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: remove unused tegra_mc_defs header
This patch removes the unused header from the Tegra194 platform files. As a result, the TSA MMIO would be removed from the memory map too.
Change-Id: I2
Tegra194: remove unused tegra_mc_defs header
This patch removes the unused header from the Tegra194 platform files. As a result, the TSA MMIO would be removed from the memory map too.
Change-Id: I2d38b3da7a119f5dfd6cfd429e481f4e6ad3481e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
show more ...
|
| 872a1c52 | 11-Apr-2019 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: memctrl: remove streamid security cfg registers
The stream ID security configuration settings shall be done by the previous level bootloader. This change removes the same settings from the
Tegra194: memctrl: remove streamid security cfg registers
The stream ID security configuration settings shall be done by the previous level bootloader. This change removes the same settings from the Tegra194 platform code as a result.
Change-Id: Ia170ca4c2119db8f1d0251f1c193add006f81004 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
show more ...
|
| bdd61c16 | 28-Apr-2019 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: memctrl: remove streamid override cfg registers
The stream ID override configuration is saved during System Suspend as part MB1 bct. This change removes the same support from the Tegra194
Tegra194: memctrl: remove streamid override cfg registers
The stream ID override configuration is saved during System Suspend as part MB1 bct. This change removes the same support from the Tegra194 platform code as a result.
Change-Id: I4c19dc0d8b29190908673fb5ed7ed892af8906ab Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
show more ...
|
| 5ce05d6b | 05-Feb-2020 |
Anthony Zhou <anzhou@nvidia.com> |
Tegra194: add strict checking mode verification
After enabling the strict checking mode, verify that the strict mode has really been enabled by querying the MCE.
If the mode is found to be disabled
Tegra194: add strict checking mode verification
After enabling the strict checking mode, verify that the strict mode has really been enabled by querying the MCE.
If the mode is found to be disabled, the code should assert.
Change-Id: I113ec8decb737f8208059a2a3ba3076fad77890e Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
show more ...
|
| 7e491133 | 22-Apr-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: memctrl: update TZDRAM base at 1MB granularity
The Memory controller expects the TZDRAM base value at 1MB granularity and the current driver does not respect that limitation. This patch fi
Tegra194: memctrl: update TZDRAM base at 1MB granularity
The Memory controller expects the TZDRAM base value at 1MB granularity and the current driver does not respect that limitation. This patch fixes that anomaly.
Change-Id: I6b72270f331ba5081e19811df4a78623e457341a Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
show more ...
|
| ebd720d0 | 07-Jun-2019 |
David Pu <dpu@nvidia.com> |
Tegra194: ras: split up RAS error clear SMC call.
In order to make sure SMC call is within 25us, this patch reduces number of RAS errors accessed to 8 at most for each SMC call and takes a input/out
Tegra194: ras: split up RAS error clear SMC call.
In order to make sure SMC call is within 25us, this patch reduces number of RAS errors accessed to 8 at most for each SMC call and takes a input/output parameter to specify in progress RAS error record index.
The measured SMC call latency is about 20us under Linux test kernel driver.
Change-Id: Ia1b57c8673e0193dc341a36af0b5c09fb48f965f Signed-off-by: David Pu <dpu@nvidia.com>
show more ...
|